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FEB_4047 10.07.24 13:03:49
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13:03:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:03:49:ST3_Shared:INFO: FEB-Microcable
13:03:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:03:49:febtest:INFO: Testing FEB with SN 4047
13:03:51:smx_tester:INFO: Scanning setup
13:03:51:elinks:INFO: Disabling clock on downlink 0
13:03:51:elinks:INFO: Disabling clock on downlink 1
13:03:51:elinks:INFO: Disabling clock on downlink 2
13:03:51:elinks:INFO: Disabling clock on downlink 3
13:03:51:elinks:INFO: Disabling clock on downlink 4
13:03:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:03:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:03:51:elinks:INFO: Disabling clock on downlink 0
13:03:51:elinks:INFO: Disabling clock on downlink 1
13:03:51:elinks:INFO: Disabling clock on downlink 2
13:03:51:elinks:INFO: Disabling clock on downlink 3
13:03:51:elinks:INFO: Disabling clock on downlink 4
13:03:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:03:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:03:51:elinks:INFO: Disabling clock on downlink 0
13:03:51:elinks:INFO: Disabling clock on downlink 1
13:03:51:elinks:INFO: Disabling clock on downlink 2
13:03:51:elinks:INFO: Disabling clock on downlink 3
13:03:51:elinks:INFO: Disabling clock on downlink 4
13:03:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:03:51:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:03:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:03:51:elinks:INFO: Disabling clock on downlink 0
13:03:51:elinks:INFO: Disabling clock on downlink 1
13:03:51:elinks:INFO: Disabling clock on downlink 2
13:03:51:elinks:INFO: Disabling clock on downlink 3
13:03:51:elinks:INFO: Disabling clock on downlink 4
13:03:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:03:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:03:51:elinks:INFO: Disabling clock on downlink 0
13:03:51:elinks:INFO: Disabling clock on downlink 1
13:03:51:elinks:INFO: Disabling clock on downlink 2
13:03:51:elinks:INFO: Disabling clock on downlink 3
13:03:51:elinks:INFO: Disabling clock on downlink 4
13:03:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:03:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:03:51:setup_element:INFO: Scanning clock phase
13:03:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:03:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:03:52:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:03:52:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXX___________
Clock Delay: 26
13:03:52:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXX___________
Clock Delay: 26
13:03:52:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:03:52:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:03:52:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXX____________
Clock Delay: 25
13:03:52:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXX____________
Clock Delay: 25
13:03:52:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________XXXXXX______________
Clock Delay: 22
13:03:52:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________XXXXXX______________
Clock Delay: 22
13:03:52:setup_element:INFO: Setting the clock phase to 24 for group 0, downlink 2
13:03:52:setup_element:INFO: Scanning data phases
13:03:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:03:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:03:57:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:03:57:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________
Data delay found: 28
13:03:57:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
13:03:57:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
13:03:57:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
13:03:57:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
13:03:57:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXX__________________
Data delay found: 37
13:03:57:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXXXX____________________
Data delay found: 35
13:03:57:setup_element:INFO: Eye window for uplink 31: _____________XXXXXX_____________________
Data delay found: 35
13:03:57:setup_element:INFO: Setting the data phase to 28 for uplink 24
13:03:57:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:03:57:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:03:57:setup_element:INFO: Setting the data phase to 34 for uplink 27
13:03:57:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:03:57:setup_element:INFO: Setting the data phase to 37 for uplink 29
13:03:57:setup_element:INFO: Setting the data phase to 35 for uplink 30
13:03:57:setup_element:INFO: Setting the data phase to 35 for uplink 31
13:03:57:setup_element:INFO: Beginning SMX ASICs map scan
13:03:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:03:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:03:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:03:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:03:57:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:03:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:03:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:03:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:03:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:03:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:03:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:03:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:03:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:03:59:setup_element:INFO: Performing Elink synchronization
13:03:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:03:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:03:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:03:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:03:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:03:59:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:04:00:febtest:INFO: Init all SMX (CSA): 30
13:04:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:04:07:febtest:INFO: 30-01 | XA-000-08-003-000-002-220-15 | 37.7 | 1159.7
13:04:07:febtest:INFO: 28-03 | XA-000-08-003-000-002-219-15 | 34.6 | 1177.4
13:04:08:febtest:INFO: 26-05 | XA-000-08-003-000-002-215-15 | 37.7 | 1147.8
13:04:08:febtest:INFO: 24-07 | XA-000-08-003-000-002-221-15 | 44.1 | 1135.9
13:04:09:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:04:11:ST3_smx:INFO: chip: 30-1 40.898880 C 1171.483840 mV
13:04:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:11:ST3_smx:INFO: Electrons
13:04:11:ST3_smx:INFO: # loops 0
13:04:12:ST3_smx:INFO: # loops 1
13:04:14:ST3_smx:INFO: # loops 2
13:04:16:ST3_smx:INFO: Total # of broken channels: 0
13:04:16:ST3_smx:INFO: List of broken channels: []
13:04:16:ST3_smx:INFO: Total # of broken channels: 0
13:04:16:ST3_smx:INFO: List of broken channels: []
13:04:17:ST3_smx:INFO: chip: 28-3 34.556970 C 1189.190035 mV
13:04:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:17:ST3_smx:INFO: Electrons
13:04:17:ST3_smx:INFO: # loops 0
13:04:19:ST3_smx:INFO: # loops 1
13:04:21:ST3_smx:INFO: # loops 2
13:04:22:ST3_smx:INFO: Total # of broken channels: 0
13:04:22:ST3_smx:INFO: List of broken channels: []
13:04:22:ST3_smx:INFO: Total # of broken channels: 0
13:04:22:ST3_smx:INFO: List of broken channels: []
13:04:24:ST3_smx:INFO: chip: 26-5 37.726682 C 1159.654860 mV
13:04:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:24:ST3_smx:INFO: Electrons
13:04:24:ST3_smx:INFO: # loops 0
13:04:25:ST3_smx:INFO: # loops 1
13:04:27:ST3_smx:INFO: # loops 2
13:04:29:ST3_smx:INFO: Total # of broken channels: 0
13:04:29:ST3_smx:INFO: List of broken channels: []
13:04:29:ST3_smx:INFO: Total # of broken channels: 0
13:04:29:ST3_smx:INFO: List of broken channels: []
13:04:30:ST3_smx:INFO: chip: 24-7 47.250730 C 1141.874115 mV
13:04:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:04:30:ST3_smx:INFO: Electrons
13:04:30:ST3_smx:INFO: # loops 0
13:04:32:ST3_smx:INFO: # loops 1
13:04:33:ST3_smx:INFO: # loops 2
13:04:35:ST3_smx:INFO: Total # of broken channels: 0
13:04:35:ST3_smx:INFO: List of broken channels: []
13:04:35:ST3_smx:INFO: Total # of broken channels: 0
13:04:35:ST3_smx:INFO: List of broken channels: []
13:04:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:04:35:febtest:INFO: 30-01 | XA-000-08-003-000-002-220-15 | 40.9 | 1189.2
13:04:36:febtest:INFO: 28-03 | XA-000-08-003-000-002-219-15 | 34.6 | 1206.9
13:04:36:febtest:INFO: 26-05 | XA-000-08-003-000-002-215-15 | 37.7 | 1177.4
13:04:36:febtest:INFO: 24-07 | XA-000-08-003-000-002-221-15 | 47.3 | 1159.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_10-13_03_49
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4047| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '0.7527', '1.850', '1.4830']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0140', '1.850', '1.3140']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9950', '1.850', '0.2713']