
FEB_4048 11.07.24 10:06:31
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10:06:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:06:31:ST3_Shared:INFO: FEB-Microcable 10:06:31:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:06:31:febtest:INFO: Testing FEB with SN 4048 10:06:33:smx_tester:INFO: Scanning setup 10:06:33:elinks:INFO: Disabling clock on downlink 0 10:06:33:elinks:INFO: Disabling clock on downlink 1 10:06:33:elinks:INFO: Disabling clock on downlink 2 10:06:33:elinks:INFO: Disabling clock on downlink 3 10:06:33:elinks:INFO: Disabling clock on downlink 4 10:06:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:06:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:06:33:elinks:INFO: Disabling clock on downlink 0 10:06:33:elinks:INFO: Disabling clock on downlink 1 10:06:33:elinks:INFO: Disabling clock on downlink 2 10:06:33:elinks:INFO: Disabling clock on downlink 3 10:06:33:elinks:INFO: Disabling clock on downlink 4 10:06:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:06:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:06:33:elinks:INFO: Disabling clock on downlink 0 10:06:33:elinks:INFO: Disabling clock on downlink 1 10:06:33:elinks:INFO: Disabling clock on downlink 2 10:06:33:elinks:INFO: Disabling clock on downlink 3 10:06:33:elinks:INFO: Disabling clock on downlink 4 10:06:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:06:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:06:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:06:33:elinks:INFO: Disabling clock on downlink 0 10:06:33:elinks:INFO: Disabling clock on downlink 1 10:06:33:elinks:INFO: Disabling clock on downlink 2 10:06:33:elinks:INFO: Disabling clock on downlink 3 10:06:33:elinks:INFO: Disabling clock on downlink 4 10:06:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:06:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:06:33:elinks:INFO: Disabling clock on downlink 0 10:06:33:elinks:INFO: Disabling clock on downlink 1 10:06:33:elinks:INFO: Disabling clock on downlink 2 10:06:33:elinks:INFO: Disabling clock on downlink 3 10:06:33:elinks:INFO: Disabling clock on downlink 4 10:06:33:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:06:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:06:33:setup_element:INFO: Scanning clock phase 10:06:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:06:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:06:34:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:06:34:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 10:06:34:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 10:06:34:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXX__________ Clock Delay: 26 10:06:34:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXX__________ Clock Delay: 26 10:06:34:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXX___________ Clock Delay: 25 10:06:34:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXX___________ Clock Delay: 25 10:06:34:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXX_________ Clock Delay: 27 10:06:34:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXX_________ Clock Delay: 27 10:06:34:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2 10:06:34:setup_element:INFO: Scanning data phases 10:06:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:06:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:06:39:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:06:39:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________ Data delay found: 28 10:06:39:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXX________________________ Data delay found: 31 10:06:39:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 10:06:39:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________ Data delay found: 34 10:06:39:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________ Data delay found: 33 10:06:39:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________ Data delay found: 36 10:06:39:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXXX________________ Data delay found: 39 10:06:39:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXX________________ Data delay found: 39 10:06:39:setup_element:INFO: Setting the data phase to 28 for uplink 24 10:06:39:setup_element:INFO: Setting the data phase to 31 for uplink 25 10:06:39:setup_element:INFO: Setting the data phase to 29 for uplink 26 10:06:39:setup_element:INFO: Setting the data phase to 34 for uplink 27 10:06:39:setup_element:INFO: Setting the data phase to 33 for uplink 28 10:06:39:setup_element:INFO: Setting the data phase to 36 for uplink 29 10:06:39:setup_element:INFO: Setting the data phase to 39 for uplink 30 10:06:39:setup_element:INFO: Setting the data phase to 39 for uplink 31 10:06:39:setup_element:INFO: Beginning SMX ASICs map scan 10:06:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:06:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:06:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:06:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:06:39:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 10:06:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:06:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:06:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:06:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:06:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:06:40:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:06:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:06:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:06:41:setup_element:INFO: Performing Elink synchronization 10:06:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:06:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:06:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:06:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:06:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:06:41:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:06:42:febtest:INFO: Init all SMX (CSA): 30 10:06:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:06:49:febtest:INFO: 30-01 | XA-000-08-003-000-002-179-04 | 37.7 | 1165.6 10:06:49:febtest:INFO: 28-03 | XA-000-08-003-000-002-184-04 | 21.9 | 1224.5 10:06:50:febtest:INFO: 26-05 | XA-000-08-003-000-002-183-04 | 31.4 | 1189.2 10:06:50:febtest:INFO: 24-07 | XA-000-08-003-000-002-182-04 | 50.4 | 1118.1 10:06:51:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:06:53:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV 10:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:06:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:06:53:ST3_smx:INFO: Electrons 10:06:53:ST3_smx:INFO: # loops 0 10:06:54:ST3_smx:INFO: # loops 1 10:06:56:ST3_smx:INFO: # loops 2 10:06:58:ST3_smx:INFO: Total # of broken channels: 0 10:06:58:ST3_smx:INFO: List of broken channels: [] 10:06:58:ST3_smx:INFO: Total # of broken channels: 0 10:06:58:ST3_smx:INFO: List of broken channels: [] 10:07:00:ST3_smx:INFO: chip: 28-3 21.902970 C 1236.187875 mV 10:07:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:00:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:00:ST3_smx:INFO: Electrons 10:07:00:ST3_smx:INFO: # loops 0 10:07:02:ST3_smx:INFO: # loops 1 10:07:03:ST3_smx:INFO: # loops 2 10:07:05:ST3_smx:INFO: Total # of broken channels: 0 10:07:05:ST3_smx:INFO: List of broken channels: [] 10:07:05:ST3_smx:INFO: Total # of broken channels: 0 10:07:05:ST3_smx:INFO: List of broken channels: [] 10:07:07:ST3_smx:INFO: chip: 26-5 31.389742 C 1200.969315 mV 10:07:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:07:ST3_smx:INFO: Electrons 10:07:07:ST3_smx:INFO: # loops 0 10:07:08:ST3_smx:INFO: # loops 1 10:07:10:ST3_smx:INFO: # loops 2 10:07:11:ST3_smx:INFO: Total # of broken channels: 0 10:07:11:ST3_smx:INFO: List of broken channels: [] 10:07:11:ST3_smx:INFO: Total # of broken channels: 0 10:07:11:ST3_smx:INFO: List of broken channels: [] 10:07:13:ST3_smx:INFO: chip: 24-7 50.430383 C 1129.995435 mV 10:07:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:07:13:ST3_smx:INFO: Electrons 10:07:13:ST3_smx:INFO: # loops 0 10:07:15:ST3_smx:INFO: # loops 1 10:07:16:ST3_smx:INFO: # loops 2 10:07:18:ST3_smx:INFO: Total # of broken channels: 0 10:07:18:ST3_smx:INFO: List of broken channels: [] 10:07:18:ST3_smx:INFO: Total # of broken channels: 0 10:07:18:ST3_smx:INFO: List of broken channels: [] 10:07:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:07:18:febtest:INFO: 30-01 | XA-000-08-003-000-002-179-04 | 37.7 | 1195.1 10:07:18:febtest:INFO: 28-03 | XA-000-08-003-000-002-184-04 | 25.1 | 1259.6 10:07:19:febtest:INFO: 26-05 | XA-000-08-003-000-002-183-04 | 34.6 | 1224.5 10:07:19:febtest:INFO: 24-07 | XA-000-08-003-000-002-182-04 | 50.4 | 1147.8 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_11-10_06_31 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4048| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0110', '1.849', '1.1910'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9896', '1.850', '1.2700'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9812', '1.850', '0.2613']