DTL-STS tests database

FEB_4048 11.07.24 14:51:33

link: XA-000-08-003-000-002-185-04
...SMX_0.root
link: XA-000-08-003-000-002-186-04
...SMX_2.root
link: XA-000-08-003-000-002-188-04
...SMX_4.root
link: XA-000-08-003-000-002-189-04
...SMX_6.root
link: XA-000-08-003-000-002-179-04
...SMX_1.root
link: XA-000-08-003-000-002-184-04
...SMX_3.root
link: XA-000-08-003-000-002-183-04
...SMX_5.root
link: XA-000-08-003-000-002-182-04
...SMX_7.root
link: XA-000-08-003-000-002-182-04
...VddmCSAstatus.root
Info
            14:51:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:51:33:ST3_Shared:INFO:	                       FEB-Microcable                       
14:51:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:51:33:febtest:INFO:	Testing FEB with SN 4048
14:51:34:smx_tester:INFO:	Scanning setup
14:51:34:elinks:INFO:	Disabling clock on downlink 0
14:51:34:elinks:INFO:	Disabling clock on downlink 1
14:51:34:elinks:INFO:	Disabling clock on downlink 2
14:51:34:elinks:INFO:	Disabling clock on downlink 3
14:51:34:elinks:INFO:	Disabling clock on downlink 4
14:51:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
14:51:34:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:34:elinks:INFO:	Disabling clock on downlink 0
14:51:34:elinks:INFO:	Disabling clock on downlink 1
14:51:34:elinks:INFO:	Disabling clock on downlink 2
14:51:34:elinks:INFO:	Disabling clock on downlink 3
14:51:34:elinks:INFO:	Disabling clock on downlink 4
14:51:34:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:34:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
14:51:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:35:elinks:INFO:	Disabling clock on downlink 0
14:51:35:elinks:INFO:	Disabling clock on downlink 1
14:51:35:elinks:INFO:	Disabling clock on downlink 2
14:51:35:elinks:INFO:	Disabling clock on downlink 3
14:51:35:elinks:INFO:	Disabling clock on downlink 4
14:51:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
14:51:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
14:51:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:35:elinks:INFO:	Disabling clock on downlink 0
14:51:35:elinks:INFO:	Disabling clock on downlink 1
14:51:35:elinks:INFO:	Disabling clock on downlink 2
14:51:35:elinks:INFO:	Disabling clock on downlink 3
14:51:35:elinks:INFO:	Disabling clock on downlink 4
14:51:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
14:51:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:35:elinks:INFO:	Disabling clock on downlink 0
14:51:35:elinks:INFO:	Disabling clock on downlink 1
14:51:35:elinks:INFO:	Disabling clock on downlink 2
14:51:35:elinks:INFO:	Disabling clock on downlink 3
14:51:35:elinks:INFO:	Disabling clock on downlink 4
14:51:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
14:51:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
14:51:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
14:51:35:setup_element:INFO:	Scanning clock phase
14:51:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:35:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
14:51:35:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________XXXX____________
Clock Delay: 25
14:51:35:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________XXXX____________
Clock Delay: 25
14:51:35:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 22: ____________________________________________________________________XXXXX_______
Clock Delay: 30
14:51:35:setup_element:INFO:	Eye window for uplink 23: ____________________________________________________________________XXXXX_______
Clock Delay: 30
14:51:35:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 26: _________________________________________________________________XXXXXXX________
Clock Delay: 28
14:51:35:setup_element:INFO:	Eye window for uplink 27: _________________________________________________________________XXXXXXX________
Clock Delay: 28
14:51:35:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:51:35:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
14:51:35:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
14:51:35:setup_element:INFO:	Setting the clock phase to 28 for group 0, downlink 2
14:51:35:setup_element:INFO:	Scanning data phases
14:51:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:35:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:40:setup_element:INFO:	Data phase scan results for group 0, downlink 2
14:51:40:setup_element:INFO:	Eye window for uplink 16: XXX________________________________XXXXX
Data delay found: 18
14:51:40:setup_element:INFO:	Eye window for uplink 17: _______________________________XXXXXXXXX
Data delay found: 15
14:51:40:setup_element:INFO:	Eye window for uplink 18: X___________________________________XXXX
Data delay found: 18
14:51:40:setup_element:INFO:	Eye window for uplink 19: _______________________________XXXXXXX__
Data delay found: 14
14:51:40:setup_element:INFO:	Eye window for uplink 20: XXX_________________________________XXXX
Data delay found: 19
14:51:40:setup_element:INFO:	Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
14:51:40:setup_element:INFO:	Eye window for uplink 22: XXXX________________________________XXXX
Data delay found: 19
14:51:40:setup_element:INFO:	Eye window for uplink 23: XXXXX____________________________XXXXXXX
Data delay found: 18
14:51:40:setup_element:INFO:	Eye window for uplink 24: __XXXXXXXX______________________________
Data delay found: 25
14:51:40:setup_element:INFO:	Eye window for uplink 25: ____XXXXXXXXX___________________________
Data delay found: 28
14:51:40:setup_element:INFO:	Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
14:51:40:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
14:51:40:setup_element:INFO:	Eye window for uplink 28: __________XXXXXXX_______________________
Data delay found: 33
14:51:40:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
14:51:40:setup_element:INFO:	Eye window for uplink 30: ________________XXXXXXX_________________
Data delay found: 39
14:51:40:setup_element:INFO:	Eye window for uplink 31: _________________XXXXXXX________________
Data delay found: 0
14:51:40:setup_element:INFO:	Setting the data phase to 18 for uplink 16
14:51:40:setup_element:INFO:	Setting the data phase to 15 for uplink 17
14:51:40:setup_element:INFO:	Setting the data phase to 18 for uplink 18
14:51:40:setup_element:INFO:	Setting the data phase to 14 for uplink 19
14:51:41:setup_element:INFO:	Setting the data phase to 19 for uplink 20
14:51:41:setup_element:INFO:	Setting the data phase to 17 for uplink 21
14:51:41:setup_element:INFO:	Setting the data phase to 19 for uplink 22
14:51:41:setup_element:INFO:	Setting the data phase to 18 for uplink 23
14:51:41:setup_element:INFO:	Setting the data phase to 25 for uplink 24
14:51:41:setup_element:INFO:	Setting the data phase to 28 for uplink 25
14:51:41:setup_element:INFO:	Setting the data phase to 29 for uplink 26
14:51:41:setup_element:INFO:	Setting the data phase to 34 for uplink 27
14:51:41:setup_element:INFO:	Setting the data phase to 33 for uplink 28
14:51:41:setup_element:INFO:	Setting the data phase to 36 for uplink 29
14:51:41:setup_element:INFO:	Setting the data phase to 39 for uplink 30
14:51:41:setup_element:INFO:	Setting the data phase to 0 for uplink 31
14:51:41:setup_element:INFO:	Beginning SMX ASICs map scan
14:51:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:51:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:51:41:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:51:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:51:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:51:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:51:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:51:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:51:41:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:51:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:51:41:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:51:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:51:41:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:51:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:51:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:51:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:51:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:51:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:51:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:51:43:setup_element:INFO:	Performing Elink synchronization
14:51:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
14:51:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:51:43:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
14:51:43:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
14:51:43:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
14:51:43:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:51:44:febtest:INFO:	Init all SMX (CSA): 30
14:52:01:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:52:01:febtest:INFO:	23-00 | XA-000-08-003-000-002-185-04 |  44.1 | 1147.8
14:52:01:febtest:INFO:	30-01 | XA-000-08-003-000-002-179-04 |  40.9 | 1159.7
14:52:02:febtest:INFO:	21-02 | XA-000-08-003-000-002-186-04 |  44.1 | 1147.8
14:52:02:febtest:INFO:	28-03 | XA-000-08-003-000-002-184-04 |  25.1 | 1224.5
14:52:02:febtest:INFO:	19-04 | XA-000-08-003-000-002-188-04 |  34.6 | 1183.3
14:52:02:febtest:INFO:	26-05 | XA-000-08-003-000-002-183-04 |  34.6 | 1189.2
14:52:03:febtest:INFO:	17-06 | XA-000-08-003-000-002-189-04 |  40.9 | 1153.7
14:52:03:febtest:INFO:	24-07 | XA-000-08-003-000-002-182-04 |  53.6 | 1112.1
14:52:04:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:52:06:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1159.654860 mV
14:52:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:06:ST3_smx:INFO:		Electrons
14:52:06:ST3_smx:INFO:	# loops 0
14:52:07:ST3_smx:INFO:	# loops 1
14:52:09:ST3_smx:INFO:	# loops 2
14:52:11:ST3_smx:INFO:	Total # of broken channels: 0
14:52:11:ST3_smx:INFO:	List of broken channels: []
14:52:11:ST3_smx:INFO:	Total # of broken channels: 0
14:52:11:ST3_smx:INFO:	List of broken channels: []
14:52:12:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1171.483840 mV
14:52:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:12:ST3_smx:INFO:		Electrons
14:52:12:ST3_smx:INFO:	# loops 0
14:52:14:ST3_smx:INFO:	# loops 1
14:52:16:ST3_smx:INFO:	# loops 2
14:52:18:ST3_smx:INFO:	Total # of broken channels: 0
14:52:18:ST3_smx:INFO:	List of broken channels: []
14:52:18:ST3_smx:INFO:	Total # of broken channels: 0
14:52:18:ST3_smx:INFO:	List of broken channels: []
14:52:19:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1159.654860 mV
14:52:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:19:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:19:ST3_smx:INFO:		Electrons
14:52:19:ST3_smx:INFO:	# loops 0
14:52:21:ST3_smx:INFO:	# loops 1
14:52:23:ST3_smx:INFO:	# loops 2
14:52:24:ST3_smx:INFO:	Total # of broken channels: 0
14:52:24:ST3_smx:INFO:	List of broken channels: []
14:52:24:ST3_smx:INFO:	Total # of broken channels: 0
14:52:24:ST3_smx:INFO:	List of broken channels: []
14:52:26:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1236.187875 mV
14:52:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:26:ST3_smx:INFO:		Electrons
14:52:26:ST3_smx:INFO:	# loops 0
14:52:28:ST3_smx:INFO:	# loops 1
14:52:29:ST3_smx:INFO:	# loops 2
14:52:31:ST3_smx:INFO:	Total # of broken channels: 1
14:52:31:ST3_smx:INFO:	List of broken channels: [1]
14:52:31:ST3_smx:INFO:	Total # of broken channels: 1
14:52:31:ST3_smx:INFO:	List of broken channels: [1]
14:52:32:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1189.190035 mV
14:52:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:33:ST3_smx:INFO:		Electrons
14:52:33:ST3_smx:INFO:	# loops 0
14:52:34:ST3_smx:INFO:	# loops 1
14:52:36:ST3_smx:INFO:	# loops 2
14:52:37:ST3_smx:INFO:	Total # of broken channels: 0
14:52:37:ST3_smx:INFO:	List of broken channels: []
14:52:37:ST3_smx:INFO:	Total # of broken channels: 0
14:52:37:ST3_smx:INFO:	List of broken channels: []
14:52:39:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1200.969315 mV
14:52:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:39:ST3_smx:INFO:		Electrons
14:52:39:ST3_smx:INFO:	# loops 0
14:52:41:ST3_smx:INFO:	# loops 1
14:52:43:ST3_smx:INFO:	# loops 2
14:52:44:ST3_smx:INFO:	Total # of broken channels: 0
14:52:44:ST3_smx:INFO:	List of broken channels: []
14:52:44:ST3_smx:INFO:	Total # of broken channels: 0
14:52:44:ST3_smx:INFO:	List of broken channels: []
14:52:46:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1159.654860 mV
14:52:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:46:ST3_smx:INFO:		Electrons
14:52:46:ST3_smx:INFO:	# loops 0
14:52:48:ST3_smx:INFO:	# loops 1
14:52:49:ST3_smx:INFO:	# loops 2
14:52:51:ST3_smx:INFO:	Total # of broken channels: 0
14:52:51:ST3_smx:INFO:	List of broken channels: []
14:52:51:ST3_smx:INFO:	Total # of broken channels: 0
14:52:51:ST3_smx:INFO:	List of broken channels: []
14:52:52:ST3_smx:INFO:	chip: 24-7 	 53.612520 C 	 1124.048640 mV
14:52:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:52:52:ST3_smx:INFO:		Electrons
14:52:52:ST3_smx:INFO:	# loops 0
14:52:54:ST3_smx:INFO:	# loops 1
14:52:57:ST3_smx:INFO:	# loops 2
14:52:59:ST3_smx:INFO:	Total # of broken channels: 0
14:52:59:ST3_smx:INFO:	List of broken channels: []
14:52:59:ST3_smx:INFO:	Total # of broken channels: 11
14:52:59:ST3_smx:INFO:	List of broken channels: [1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21]
14:52:59:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:52:59:febtest:INFO:	23-00 | XA-000-08-003-000-002-185-04 |  47.3 | 1177.4
14:53:00:febtest:INFO:	30-01 | XA-000-08-003-000-002-179-04 |  44.1 | 1189.2
14:53:00:febtest:INFO:	21-02 | XA-000-08-003-000-002-186-04 |  47.3 | 1177.4
14:53:00:febtest:INFO:	28-03 | XA-000-08-003-000-002-184-04 |  28.2 | 1253.7
14:53:00:febtest:INFO:	19-04 | XA-000-08-003-000-002-188-04 |  37.7 | 1212.7
14:53:00:febtest:INFO:	26-05 | XA-000-08-003-000-002-183-04 |  37.7 | 1218.6
14:53:01:febtest:INFO:	17-06 | XA-000-08-003-000-002-189-04 |  44.1 | 1177.4
14:53:01:febtest:INFO:	24-07 | XA-000-08-003-000-002-182-04 |  56.8 | 1141.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_11-14_51_33
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4048| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5630', '1.849', '2.7350']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '2.5480']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9560', '1.850', '0.5201']
Comment