DTL-STS tests database

FEB_4048 16.07.24 09:02:40

link: XA-000-08-003-000-002-185-04
...SMX_0.root
link: XA-000-08-003-000-002-186-04
...SMX_2.root
link: XA-000-08-003-000-002-188-04
...SMX_4.root
link: XA-000-08-003-000-002-189-04
...SMX_6.root
link: XA-000-08-003-000-002-179-04
...SMX_1.root
link: XA-000-08-003-000-002-184-04
...SMX_3.root
link: XA-000-08-003-000-002-183-04
...SMX_5.root
link: XA-000-08-003-000-002-182-04
...SMX_7.root
link: XA-000-08-003-000-002-182-04
...VddmCSAstatus.root
TextEdit.txt
            09:02:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:40:ST3_Shared:INFO:	                         FEB-Sensor                         
09:02:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:02:57:ST3_ModuleSelector:INFO:	L6UL401036 M6UL4T1010361B2 62 B

09:02:57:ST3_ModuleSelector:INFO:	25233

09:02:57:febtest:INFO:	Testing FEB with SN 4048
09:02:59:smx_tester:INFO:	Scanning setup
09:02:59:elinks:INFO:	Disabling clock on downlink 0
09:02:59:elinks:INFO:	Disabling clock on downlink 1
09:02:59:elinks:INFO:	Disabling clock on downlink 2
09:02:59:elinks:INFO:	Disabling clock on downlink 3
09:02:59:elinks:INFO:	Disabling clock on downlink 4
09:02:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:02:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:02:59:elinks:INFO:	Disabling clock on downlink 0
09:02:59:elinks:INFO:	Disabling clock on downlink 1
09:02:59:elinks:INFO:	Disabling clock on downlink 2
09:02:59:elinks:INFO:	Disabling clock on downlink 3
09:02:59:elinks:INFO:	Disabling clock on downlink 4
09:02:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:02:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:02:59:elinks:INFO:	Disabling clock on downlink 0
09:02:59:elinks:INFO:	Disabling clock on downlink 1
09:02:59:elinks:INFO:	Disabling clock on downlink 2
09:02:59:elinks:INFO:	Disabling clock on downlink 3
09:02:59:elinks:INFO:	Disabling clock on downlink 4
09:02:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:02:59:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:02:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:02:59:elinks:INFO:	Disabling clock on downlink 0
09:02:59:elinks:INFO:	Disabling clock on downlink 1
09:02:59:elinks:INFO:	Disabling clock on downlink 2
09:02:59:elinks:INFO:	Disabling clock on downlink 3
09:02:59:elinks:INFO:	Disabling clock on downlink 4
09:02:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:02:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:02:59:elinks:INFO:	Disabling clock on downlink 0
09:02:59:elinks:INFO:	Disabling clock on downlink 1
09:02:59:elinks:INFO:	Disabling clock on downlink 2
09:02:59:elinks:INFO:	Disabling clock on downlink 3
09:02:59:elinks:INFO:	Disabling clock on downlink 4
09:02:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:02:59:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:02:59:setup_element:INFO:	Scanning clock phase
09:02:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:02:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:02:59:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:02:59:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________XXXXX___________
Clock Delay: 26
09:02:59:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________XXXXX___________
Clock Delay: 26
09:03:00:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 22: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:03:00:setup_element:INFO:	Eye window for uplink 23: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
09:03:00:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:03:00:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:03:00:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
09:03:00:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
09:03:00:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
09:03:00:setup_element:INFO:	Setting the clock phase to 28 for group 0, downlink 2
09:03:00:setup_element:INFO:	Scanning data phases
09:03:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:05:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:03:05:setup_element:INFO:	Eye window for uplink 16: XXXX______________________________XXXXXX
Data delay found: 18
09:03:05:setup_element:INFO:	Eye window for uplink 17: ________________________________XXXXXX_X
Data delay found: 15
09:03:05:setup_element:INFO:	Eye window for uplink 18: XX__________________________________XXXX
Data delay found: 18
09:03:05:setup_element:INFO:	Eye window for uplink 19: ________________________________XXXXXXX_
Data delay found: 15
09:03:05:setup_element:INFO:	Eye window for uplink 20: XXX_________________________________XXXX
Data delay found: 19
09:03:05:setup_element:INFO:	Eye window for uplink 21: XX_________________________________XXXXX
Data delay found: 18
09:03:05:setup_element:INFO:	Eye window for uplink 22: XXXXX_________________________________XX
Data delay found: 21
09:03:05:setup_element:INFO:	Eye window for uplink 23: XXXXXX____________________________XXXXXX
Data delay found: 19
09:03:05:setup_element:INFO:	Eye window for uplink 24: ____XXXXXXX_____________________________
Data delay found: 27
09:03:05:setup_element:INFO:	Eye window for uplink 25: _______XXXXXXXX_________________________
Data delay found: 30
09:03:05:setup_element:INFO:	Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
09:03:05:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
09:03:05:setup_element:INFO:	Eye window for uplink 28: ___________XXXXXXX______________________
Data delay found: 34
09:03:05:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
09:03:05:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXXXX_______________
Data delay found: 0
09:03:05:setup_element:INFO:	Eye window for uplink 31: __________________XXXXXXX_______________
Data delay found: 1
09:03:05:setup_element:INFO:	Setting the data phase to 18 for uplink 16
09:03:05:setup_element:INFO:	Setting the data phase to 15 for uplink 17
09:03:05:setup_element:INFO:	Setting the data phase to 18 for uplink 18
09:03:05:setup_element:INFO:	Setting the data phase to 15 for uplink 19
09:03:05:setup_element:INFO:	Setting the data phase to 19 for uplink 20
09:03:05:setup_element:INFO:	Setting the data phase to 18 for uplink 21
09:03:05:setup_element:INFO:	Setting the data phase to 21 for uplink 22
09:03:05:setup_element:INFO:	Setting the data phase to 19 for uplink 23
09:03:05:setup_element:INFO:	Setting the data phase to 27 for uplink 24
09:03:05:setup_element:INFO:	Setting the data phase to 30 for uplink 25
09:03:05:setup_element:INFO:	Setting the data phase to 29 for uplink 26
09:03:05:setup_element:INFO:	Setting the data phase to 34 for uplink 27
09:03:05:setup_element:INFO:	Setting the data phase to 34 for uplink 28
09:03:05:setup_element:INFO:	Setting the data phase to 37 for uplink 29
09:03:05:setup_element:INFO:	Setting the data phase to 0 for uplink 30
09:03:05:setup_element:INFO:	Setting the data phase to 1 for uplink 31
09:03:05:setup_element:INFO:	Beginning SMX ASICs map scan
09:03:05:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:05:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:05:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:03:05:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:05:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:03:05:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:03:05:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:03:05:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:03:05:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:03:05:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:03:05:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:03:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:03:05:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:03:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:03:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:03:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:03:06:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:03:06:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:03:06:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:03:06:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:03:06:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:03:07:setup_element:INFO:	Performing Elink synchronization
09:03:07:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:03:07:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:07:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:03:07:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:07:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:03:07:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:03:08:febtest:INFO:	Init all SMX (CSA): 30
09:03:22:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:03:23:febtest:INFO:	23-00 | XA-000-08-003-000-002-185-04 |  37.7 | 1153.7
09:03:23:febtest:INFO:	30-01 | XA-000-08-003-000-002-179-04 |  37.7 | 1159.7
09:03:23:febtest:INFO:	21-02 | XA-000-08-003-000-002-186-04 |  37.7 | 1153.7
09:03:23:febtest:INFO:	28-03 | XA-000-08-003-000-002-184-04 |  21.9 | 1224.5
09:03:23:febtest:INFO:	19-04 | XA-000-08-003-000-002-188-04 |  31.4 | 1183.3
09:03:24:febtest:INFO:	26-05 | XA-000-08-003-000-002-183-04 |  28.2 | 1201.0
09:03:24:febtest:INFO:	17-06 | XA-000-08-003-000-002-189-04 |  40.9 | 1153.7
09:03:24:febtest:INFO:	24-07 | XA-000-08-003-000-002-182-04 |  50.4 | 1118.1
09:03:25:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:03:27:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1165.571835 mV
09:03:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:27:ST3_smx:INFO:		Electrons
09:03:27:ST3_smx:INFO:	# loops 0
09:03:28:ST3_smx:INFO:	# loops 1
09:03:30:ST3_smx:INFO:	# loops 2
09:03:32:ST3_smx:INFO:	Total # of broken channels: 0
09:03:32:ST3_smx:INFO:	List of broken channels: []
09:03:32:ST3_smx:INFO:	Total # of broken channels: 0
09:03:32:ST3_smx:INFO:	List of broken channels: []
09:03:34:ST3_smx:INFO:	chip: 30-1 	 37.726682 C 	 1177.390875 mV
09:03:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:34:ST3_smx:INFO:		Electrons
09:03:34:ST3_smx:INFO:	# loops 0
09:03:36:ST3_smx:INFO:	# loops 1
09:03:37:ST3_smx:INFO:	# loops 2
09:03:39:ST3_smx:INFO:	Total # of broken channels: 0
09:03:39:ST3_smx:INFO:	List of broken channels: []
09:03:39:ST3_smx:INFO:	Total # of broken channels: 0
09:03:39:ST3_smx:INFO:	List of broken channels: []
09:03:41:ST3_smx:INFO:	chip: 21-2 	 40.898880 C 	 1165.571835 mV
09:03:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:41:ST3_smx:INFO:		Electrons
09:03:41:ST3_smx:INFO:	# loops 0
09:03:42:ST3_smx:INFO:	# loops 1
09:03:44:ST3_smx:INFO:	# loops 2
09:03:45:ST3_smx:INFO:	Total # of broken channels: 0
09:03:45:ST3_smx:INFO:	List of broken channels: []
09:03:45:ST3_smx:INFO:	Total # of broken channels: 0
09:03:45:ST3_smx:INFO:	List of broken channels: []
09:03:47:ST3_smx:INFO:	chip: 28-3 	 21.902970 C 	 1236.187875 mV
09:03:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:47:ST3_smx:INFO:		Electrons
09:03:47:ST3_smx:INFO:	# loops 0
09:03:48:ST3_smx:INFO:	# loops 1
09:03:50:ST3_smx:INFO:	# loops 2
09:03:52:ST3_smx:INFO:	Total # of broken channels: 0
09:03:52:ST3_smx:INFO:	List of broken channels: []
09:03:52:ST3_smx:INFO:	Total # of broken channels: 1
09:03:52:ST3_smx:INFO:	List of broken channels: [1]
09:03:53:ST3_smx:INFO:	chip: 19-4 	 31.389742 C 	 1195.082160 mV
09:03:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:53:ST3_smx:INFO:		Electrons
09:03:53:ST3_smx:INFO:	# loops 0
09:03:55:ST3_smx:INFO:	# loops 1
09:03:56:ST3_smx:INFO:	# loops 2
09:03:58:ST3_smx:INFO:	Total # of broken channels: 0
09:03:58:ST3_smx:INFO:	List of broken channels: []
09:03:58:ST3_smx:INFO:	Total # of broken channels: 0
09:03:58:ST3_smx:INFO:	List of broken channels: []
09:03:59:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1206.851500 mV
09:03:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:03:59:ST3_smx:INFO:		Electrons
09:03:59:ST3_smx:INFO:	# loops 0
09:04:01:ST3_smx:INFO:	# loops 1
09:04:02:ST3_smx:INFO:	# loops 2
09:04:04:ST3_smx:INFO:	Total # of broken channels: 0
09:04:04:ST3_smx:INFO:	List of broken channels: []
09:04:04:ST3_smx:INFO:	Total # of broken channels: 0
09:04:04:ST3_smx:INFO:	List of broken channels: []
09:04:06:ST3_smx:INFO:	chip: 17-6 	 40.898880 C 	 1159.654860 mV
09:04:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:06:ST3_smx:INFO:		Electrons
09:04:06:ST3_smx:INFO:	# loops 0
09:04:07:ST3_smx:INFO:	# loops 1
09:04:09:ST3_smx:INFO:	# loops 2
09:04:10:ST3_smx:INFO:	Total # of broken channels: 0
09:04:10:ST3_smx:INFO:	List of broken channels: []
09:04:10:ST3_smx:INFO:	Total # of broken channels: 0
09:04:10:ST3_smx:INFO:	List of broken channels: []
09:04:12:ST3_smx:INFO:	chip: 24-7 	 53.612520 C 	 1124.048640 mV
09:04:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:04:12:ST3_smx:INFO:		Electrons
09:04:12:ST3_smx:INFO:	# loops 0
09:04:14:ST3_smx:INFO:	# loops 1
09:04:15:ST3_smx:INFO:	# loops 2
09:04:17:ST3_smx:INFO:	Total # of broken channels: 0
09:04:17:ST3_smx:INFO:	List of broken channels: []
09:04:17:ST3_smx:INFO:	Total # of broken channels: 0
09:04:17:ST3_smx:INFO:	List of broken channels: []
09:04:17:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:18:febtest:INFO:	23-00 | XA-000-08-003-000-002-185-04 |  40.9 | 1183.3
09:04:18:febtest:INFO:	30-01 | XA-000-08-003-000-002-179-04 |  40.9 | 1195.1
09:04:18:febtest:INFO:	21-02 | XA-000-08-003-000-002-186-04 |  44.1 | 1183.3
09:04:18:febtest:INFO:	28-03 | XA-000-08-003-000-002-184-04 |  25.1 | 1259.6
09:04:18:febtest:INFO:	19-04 | XA-000-08-003-000-002-188-04 |  34.6 | 1212.7
09:04:19:febtest:INFO:	26-05 | XA-000-08-003-000-002-183-04 |  31.4 | 1230.3
09:04:19:febtest:INFO:	17-06 | XA-000-08-003-000-002-189-04 |  40.9 | 1183.3
09:04:19:febtest:INFO:	24-07 | XA-000-08-003-000-002-182-04 |  53.6 | 1141.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_07_16-09_02_40
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4048| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	25233

MODULE_NAME:	L6UL401036 M6UL4T1010361B2 62 B

MODULE_TYPE:	
MODULE_LADDER:	L6UL401036
MODULE_MODULE:	M6UL4T1010361B2
MODULE_SIZE:	62
MODULE_GRADE:	B
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.6440', '1.850', '2.7370']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9990', '1.850', '2.4330']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9560', '1.850', '0.5204']
Comment.txt