09:25:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:25:17:ST3_Shared:INFO:	                       FEB-Microcable                       
09:25:17:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:25:17:febtest:INFO:	Testing FEB with SN 4050
09:25:19:smx_tester:INFO:	Scanning setup
09:25:19:elinks:INFO:	Disabling clock on downlink 0
09:25:19:elinks:INFO:	Disabling clock on downlink 1
09:25:19:elinks:INFO:	Disabling clock on downlink 2
09:25:19:elinks:INFO:	Disabling clock on downlink 3
09:25:19:elinks:INFO:	Disabling clock on downlink 4
09:25:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:25:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
09:25:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:25:19:elinks:INFO:	Disabling clock on downlink 0
09:25:19:elinks:INFO:	Disabling clock on downlink 1
09:25:19:elinks:INFO:	Disabling clock on downlink 2
09:25:19:elinks:INFO:	Disabling clock on downlink 3
09:25:19:elinks:INFO:	Disabling clock on downlink 4
09:25:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:25:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
09:25:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:25:19:elinks:INFO:	Disabling clock on downlink 0
09:25:19:elinks:INFO:	Disabling clock on downlink 1
09:25:19:elinks:INFO:	Disabling clock on downlink 2
09:25:19:elinks:INFO:	Disabling clock on downlink 3
09:25:19:elinks:INFO:	Disabling clock on downlink 4
09:25:19:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:25:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
09:25:19:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
09:25:19:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:25:19:elinks:INFO:	Disabling clock on downlink 0
09:25:19:elinks:INFO:	Disabling clock on downlink 1
09:25:19:elinks:INFO:	Disabling clock on downlink 2
09:25:19:elinks:INFO:	Disabling clock on downlink 3
09:25:19:elinks:INFO:	Disabling clock on downlink 4
09:25:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:25:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
09:25:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:25:20:elinks:INFO:	Disabling clock on downlink 0
09:25:20:elinks:INFO:	Disabling clock on downlink 1
09:25:20:elinks:INFO:	Disabling clock on downlink 2
09:25:20:elinks:INFO:	Disabling clock on downlink 3
09:25:20:elinks:INFO:	Disabling clock on downlink 4
09:25:20:setup_element:INFO:	Checking SOS, encoding_mode: SOS
09:25:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
09:25:20:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
09:25:20:setup_element:INFO:	Scanning clock phase
09:25:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:25:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:25:20:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
09:25:20:setup_element:INFO:	Eye window for uplink 24: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:25:20:setup_element:INFO:	Eye window for uplink 25: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:25:20:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:25:20:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:25:20:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:25:20:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:25:20:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:25:20:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________XXXXXX___________
Clock Delay: 25
09:25:20:setup_element:INFO:	Setting the clock phase to 27 for group 0, downlink 2
09:25:20:setup_element:INFO:	Scanning data phases
09:25:20:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:25:20:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:25:25:setup_element:INFO:	Data phase scan results for group 0, downlink 2
09:25:25:setup_element:INFO:	Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
09:25:25:setup_element:INFO:	Eye window for uplink 25: _________XXXXXXX________________________
Data delay found: 32
09:25:25:setup_element:INFO:	Eye window for uplink 26: _____XXXXXXX____________________________
Data delay found: 28
09:25:25:setup_element:INFO:	Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
09:25:25:setup_element:INFO:	Eye window for uplink 28: __________XXXXXXX_______________________
Data delay found: 33
09:25:25:setup_element:INFO:	Eye window for uplink 29: _____________XXXXXXXX___________________
Data delay found: 36
09:25:25:setup_element:INFO:	Eye window for uplink 30: ___________XXXXXXXX_________________XXXX
Data delay found: 27
09:25:25:setup_element:INFO:	Eye window for uplink 31: ____________XXXXXXX_________________XXXX
Data delay found: 27
09:25:25:setup_element:INFO:	Setting the data phase to 28 for uplink 24
09:25:25:setup_element:INFO:	Setting the data phase to 32 for uplink 25
09:25:25:setup_element:INFO:	Setting the data phase to 28 for uplink 26
09:25:25:setup_element:INFO:	Setting the data phase to 33 for uplink 27
09:25:25:setup_element:INFO:	Setting the data phase to 33 for uplink 28
09:25:25:setup_element:INFO:	Setting the data phase to 36 for uplink 29
09:25:25:setup_element:INFO:	Setting the data phase to 27 for uplink 30
09:25:25:setup_element:INFO:	Setting the data phase to 27 for uplink 31
09:25:25:setup_element:INFO:	Beginning SMX ASICs map scan
09:25:25:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:25:25:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:25:25:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:25:25:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:25:25:uplink:INFO:	Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:25:25:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:25:26:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:25:26:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:25:26:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:25:26:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:25:26:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:25:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:25:27:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:25:28:setup_element:INFO:	Performing Elink synchronization
09:25:28:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
09:25:28:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:25:28:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
09:25:28:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
09:25:28:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
09:25:28:uplink:INFO:	Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:25:28:febtest:INFO:	Init all SMX (CSA): 30
09:25:37:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:25:37:febtest:INFO:	30-01 | XA-000-08-003-000-002-144-10 |  44.1 | 1147.8
09:25:37:febtest:INFO:	28-03 | XA-000-08-003-000-002-138-13 |  37.7 | 1159.7
09:25:38:febtest:INFO:	26-05 | XA-000-08-003-000-002-150-10 |  28.2 | 1189.2
09:25:38:febtest:INFO:	24-07 | XA-000-08-003-000-002-137-13 |  31.4 | 1177.4
09:25:39:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:25:41:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1159.654860 mV
09:25:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:41:ST3_smx:INFO:		Electrons
09:25:41:ST3_smx:INFO:	# loops 0
09:25:43:ST3_smx:INFO:	# loops 1
09:25:45:ST3_smx:INFO:	# loops 2
09:25:47:ST3_smx:INFO:	Total # of broken channels: 0
09:25:47:ST3_smx:INFO:	List of broken channels: []
09:25:47:ST3_smx:INFO:	Total # of broken channels: 0
09:25:47:ST3_smx:INFO:	List of broken channels: []
09:25:49:ST3_smx:INFO:	chip: 28-3 	 37.726682 C 	 1171.483840 mV
09:25:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:49:ST3_smx:INFO:		Electrons
09:25:49:ST3_smx:INFO:	# loops 0
09:25:50:ST3_smx:INFO:	# loops 1
09:25:52:ST3_smx:INFO:	# loops 2
09:25:54:ST3_smx:INFO:	Total # of broken channels: 0
09:25:54:ST3_smx:INFO:	List of broken channels: []
09:25:54:ST3_smx:INFO:	Total # of broken channels: 0
09:25:54:ST3_smx:INFO:	List of broken channels: []
09:25:56:ST3_smx:INFO:	chip: 26-5 	 28.225000 C 	 1200.969315 mV
09:25:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:25:56:ST3_smx:INFO:		Electrons
09:25:56:ST3_smx:INFO:	# loops 0
09:25:58:ST3_smx:INFO:	# loops 1
09:26:00:ST3_smx:INFO:	# loops 2
09:26:02:ST3_smx:INFO:	Total # of broken channels: 0
09:26:02:ST3_smx:INFO:	List of broken channels: []
09:26:02:ST3_smx:INFO:	Total # of broken channels: 0
09:26:02:ST3_smx:INFO:	List of broken channels: []
09:26:03:ST3_smx:INFO:	chip: 24-7 	 31.389742 C 	 1183.292940 mV
09:26:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:26:03:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
09:26:03:ST3_smx:INFO:		Electrons
09:26:03:ST3_smx:INFO:	# loops 0
09:26:05:ST3_smx:INFO:	# loops 1
09:26:07:ST3_smx:INFO:	# loops 2
09:26:09:ST3_smx:INFO:	Total # of broken channels: 0
09:26:09:ST3_smx:INFO:	List of broken channels: []
09:26:09:ST3_smx:INFO:	Total # of broken channels: 0
09:26:09:ST3_smx:INFO:	List of broken channels: []
09:26:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:26:10:febtest:INFO:	30-01 | XA-000-08-003-000-002-144-10 |  44.1 | 1177.4
09:26:10:febtest:INFO:	28-03 | XA-000-08-003-000-002-138-13 |  37.7 | 1195.1
09:26:10:febtest:INFO:	26-05 | XA-000-08-003-000-002-150-10 |  28.2 | 1224.5
09:26:10:febtest:INFO:	24-07 | XA-000-08-003-000-002-137-13 |  31.4 | 1206.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_12-09_25_17
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4050| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0550', '1.850', '1.2160']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0260', '1.849', '1.3060']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9892', '1.850', '0.2628']