FEB_4053 16.07.24 13:04:35
Info
13:04:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:35:ST3_Shared:INFO: FEB-Microcable
13:04:35:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:04:35:febtest:INFO: Testing FEB with SN 4053
13:04:36:smx_tester:INFO: Scanning setup
13:04:36:elinks:INFO: Disabling clock on downlink 0
13:04:36:elinks:INFO: Disabling clock on downlink 1
13:04:36:elinks:INFO: Disabling clock on downlink 2
13:04:36:elinks:INFO: Disabling clock on downlink 3
13:04:36:elinks:INFO: Disabling clock on downlink 4
13:04:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:04:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:36:elinks:INFO: Disabling clock on downlink 0
13:04:36:elinks:INFO: Disabling clock on downlink 1
13:04:36:elinks:INFO: Disabling clock on downlink 2
13:04:36:elinks:INFO: Disabling clock on downlink 3
13:04:36:elinks:INFO: Disabling clock on downlink 4
13:04:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:04:36:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:36:elinks:INFO: Disabling clock on downlink 0
13:04:36:elinks:INFO: Disabling clock on downlink 1
13:04:36:elinks:INFO: Disabling clock on downlink 2
13:04:36:elinks:INFO: Disabling clock on downlink 3
13:04:36:elinks:INFO: Disabling clock on downlink 4
13:04:36:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:04:37:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:04:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:37:elinks:INFO: Disabling clock on downlink 0
13:04:37:elinks:INFO: Disabling clock on downlink 1
13:04:37:elinks:INFO: Disabling clock on downlink 2
13:04:37:elinks:INFO: Disabling clock on downlink 3
13:04:37:elinks:INFO: Disabling clock on downlink 4
13:04:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:04:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:37:elinks:INFO: Disabling clock on downlink 0
13:04:37:elinks:INFO: Disabling clock on downlink 1
13:04:37:elinks:INFO: Disabling clock on downlink 2
13:04:37:elinks:INFO: Disabling clock on downlink 3
13:04:37:elinks:INFO: Disabling clock on downlink 4
13:04:37:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:04:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:04:37:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:04:37:setup_element:INFO: Scanning clock phase
13:04:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:37:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:04:37:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________XXXXXXX________
Clock Delay: 28
13:04:37:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________XXXXXXX________
Clock Delay: 28
13:04:37:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:04:37:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
13:04:37:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:04:37:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:04:37:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
13:04:37:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
13:04:37:setup_element:INFO: Scanning data phases
13:04:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:42:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:04:42:setup_element:INFO: Eye window for uplink 16: XX_______________________________XXXXXXX
Data delay found: 17
13:04:42:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXXXX__
Data delay found: 14
13:04:42:setup_element:INFO: Eye window for uplink 18: XXX_______________________________XXXXXX
Data delay found: 18
13:04:42:setup_element:INFO: Eye window for uplink 19: X_______________________________XXXXXXXX
Data delay found: 16
13:04:42:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
13:04:42:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXX___
Data delay found: 14
13:04:42:setup_element:INFO: Eye window for uplink 22: X_________________________________XXXXXX
Data delay found: 17
13:04:42:setup_element:INFO: Eye window for uplink 23: XXX___________________________XXXXXXXXXX
Data delay found: 16
13:04:42:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
13:04:42:setup_element:INFO: Eye window for uplink 25: ________XXXXXXX_________________________
Data delay found: 31
13:04:42:setup_element:INFO: Eye window for uplink 26: _____XXXXXXX____________________________
Data delay found: 28
13:04:42:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
13:04:42:setup_element:INFO: Eye window for uplink 28: __________XXXXXXX_______________________
Data delay found: 33
13:04:42:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________
Data delay found: 36
13:04:42:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
13:04:42:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
13:04:42:setup_element:INFO: Setting the data phase to 17 for uplink 16
13:04:42:setup_element:INFO: Setting the data phase to 14 for uplink 17
13:04:42:setup_element:INFO: Setting the data phase to 18 for uplink 18
13:04:42:setup_element:INFO: Setting the data phase to 16 for uplink 19
13:04:42:setup_element:INFO: Setting the data phase to 16 for uplink 20
13:04:42:setup_element:INFO: Setting the data phase to 14 for uplink 21
13:04:42:setup_element:INFO: Setting the data phase to 17 for uplink 22
13:04:42:setup_element:INFO: Setting the data phase to 16 for uplink 23
13:04:42:setup_element:INFO: Setting the data phase to 27 for uplink 24
13:04:42:setup_element:INFO: Setting the data phase to 31 for uplink 25
13:04:42:setup_element:INFO: Setting the data phase to 28 for uplink 26
13:04:42:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:04:42:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:04:42:setup_element:INFO: Setting the data phase to 36 for uplink 29
13:04:42:setup_element:INFO: Setting the data phase to 36 for uplink 30
13:04:42:setup_element:INFO: Setting the data phase to 37 for uplink 31
13:04:42:setup_element:INFO: Beginning SMX ASICs map scan
13:04:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:42:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:42:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:04:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:04:43:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:04:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:04:43:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:04:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:04:43:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:04:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:04:43:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:04:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:04:43:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:04:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:04:43:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:04:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:04:43:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:04:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:04:44:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:04:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:04:44:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:04:45:setup_element:INFO: Performing Elink synchronization
13:04:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:04:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:04:45:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:04:45:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:04:45:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:04:45:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:04:46:febtest:INFO: Init all SMX (CSA): 30
13:05:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:05:00:febtest:INFO: 23-00 | XA-000-08-003-000-002-126-11 | 47.3 | 1130.0
13:05:00:febtest:INFO: 30-01 | XA-000-08-003-000-002-059-14 | 47.3 | 1130.0
13:05:01:febtest:INFO: 21-02 | XA-000-08-003-000-002-130-13 | 44.1 | 1147.8
13:05:01:febtest:INFO: 28-03 | XA-000-08-003-000-002-065-02 | 50.4 | 1118.1
13:05:01:febtest:INFO: 19-04 | XA-000-08-003-000-002-136-13 | 53.6 | 1118.1
13:05:01:febtest:INFO: 26-05 | XA-000-08-003-000-002-062-14 | 40.9 | 1141.9
13:05:01:febtest:INFO: 17-06 | XA-000-08-003-000-002-125-11 | 37.7 | 1165.6
13:05:02:febtest:INFO: 24-07 | XA-000-08-003-000-002-057-14 | 34.6 | 1171.5
13:05:03:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:05:05:ST3_smx:INFO: chip: 23-0 50.430383 C 1141.874115 mV
13:05:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:05:ST3_smx:INFO: Electrons
13:05:05:ST3_smx:INFO: # loops 0
13:05:06:ST3_smx:INFO: # loops 1
13:05:08:ST3_smx:INFO: # loops 2
13:05:09:ST3_smx:INFO: Total # of broken channels: 0
13:05:09:ST3_smx:INFO: List of broken channels: []
13:05:09:ST3_smx:INFO: Total # of broken channels: 0
13:05:09:ST3_smx:INFO: List of broken channels: []
13:05:11:ST3_smx:INFO: chip: 30-1 47.250730 C 1141.874115 mV
13:05:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:11:ST3_smx:INFO: Electrons
13:05:11:ST3_smx:INFO: # loops 0
13:05:13:ST3_smx:INFO: # loops 1
13:05:14:ST3_smx:INFO: # loops 2
13:05:16:ST3_smx:INFO: Total # of broken channels: 0
13:05:16:ST3_smx:INFO: List of broken channels: []
13:05:16:ST3_smx:INFO: Total # of broken channels: 0
13:05:16:ST3_smx:INFO: List of broken channels: []
13:05:17:ST3_smx:INFO: chip: 21-2 44.073563 C 1159.654860 mV
13:05:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:17:ST3_smx:INFO: Electrons
13:05:17:ST3_smx:INFO: # loops 0
13:05:19:ST3_smx:INFO: # loops 1
13:05:20:ST3_smx:INFO: # loops 2
13:05:22:ST3_smx:INFO: Total # of broken channels: 0
13:05:22:ST3_smx:INFO: List of broken channels: []
13:05:22:ST3_smx:INFO: Total # of broken channels: 0
13:05:22:ST3_smx:INFO: List of broken channels: []
13:05:24:ST3_smx:INFO: chip: 28-3 50.430383 C 1135.937260 mV
13:05:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:24:ST3_smx:INFO: Electrons
13:05:24:ST3_smx:INFO: # loops 0
13:05:25:ST3_smx:INFO: # loops 1
13:05:27:ST3_smx:INFO: # loops 2
13:05:29:ST3_smx:INFO: Total # of broken channels: 0
13:05:29:ST3_smx:INFO: List of broken channels: []
13:05:29:ST3_smx:INFO: Total # of broken channels: 0
13:05:29:ST3_smx:INFO: List of broken channels: []
13:05:30:ST3_smx:INFO: chip: 19-4 53.612520 C 1124.048640 mV
13:05:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:30:ST3_smx:INFO: Electrons
13:05:30:ST3_smx:INFO: # loops 0
13:05:32:ST3_smx:INFO: # loops 1
13:05:34:ST3_smx:INFO: # loops 2
13:05:35:ST3_smx:INFO: Total # of broken channels: 0
13:05:35:ST3_smx:INFO: List of broken channels: []
13:05:35:ST3_smx:INFO: Total # of broken channels: 0
13:05:35:ST3_smx:INFO: List of broken channels: []
13:05:37:ST3_smx:INFO: chip: 26-5 44.073563 C 1153.732915 mV
13:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:37:ST3_smx:INFO: Electrons
13:05:37:ST3_smx:INFO: # loops 0
13:05:39:ST3_smx:INFO: # loops 1
13:05:40:ST3_smx:INFO: # loops 2
13:05:42:ST3_smx:INFO: Total # of broken channels: 0
13:05:42:ST3_smx:INFO: List of broken channels: []
13:05:42:ST3_smx:INFO: Total # of broken channels: 0
13:05:42:ST3_smx:INFO: List of broken channels: []
13:05:43:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
13:05:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:43:ST3_smx:INFO: Electrons
13:05:43:ST3_smx:INFO: # loops 0
13:05:45:ST3_smx:INFO: # loops 1
13:05:47:ST3_smx:INFO: # loops 2
13:05:48:ST3_smx:INFO: Total # of broken channels: 0
13:05:48:ST3_smx:INFO: List of broken channels: []
13:05:48:ST3_smx:INFO: Total # of broken channels: 0
13:05:48:ST3_smx:INFO: List of broken channels: []
13:05:50:ST3_smx:INFO: chip: 24-7 34.556970 C 1183.292940 mV
13:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:05:50:ST3_smx:INFO: Electrons
13:05:50:ST3_smx:INFO: # loops 0
13:05:52:ST3_smx:INFO: # loops 1
13:05:53:ST3_smx:INFO: # loops 2
13:05:55:ST3_smx:INFO: Total # of broken channels: 0
13:05:55:ST3_smx:INFO: List of broken channels: []
13:05:55:ST3_smx:INFO: Total # of broken channels: 0
13:05:55:ST3_smx:INFO: List of broken channels: []
13:05:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:05:55:febtest:INFO: 23-00 | XA-000-08-003-000-002-126-11 | 50.4 | 1159.7
13:05:56:febtest:INFO: 30-01 | XA-000-08-003-000-002-059-14 | 50.4 | 1159.7
13:05:56:febtest:INFO: 21-02 | XA-000-08-003-000-002-130-13 | 47.3 | 1183.3
13:05:56:febtest:INFO: 28-03 | XA-000-08-003-000-002-065-02 | 50.4 | 1153.7
13:05:56:febtest:INFO: 19-04 | XA-000-08-003-000-002-136-13 | 56.8 | 1147.8
13:05:56:febtest:INFO: 26-05 | XA-000-08-003-000-002-062-14 | 47.3 | 1171.5
13:05:57:febtest:INFO: 17-06 | XA-000-08-003-000-002-125-11 | 40.9 | 1195.1
13:05:57:febtest:INFO: 24-07 | XA-000-08-003-000-002-057-14 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_16-13_04_35
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4053| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.4340', '1.849', '2.5850']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9960', '1.850', '2.5990']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9750', '1.850', '0.5271']