Go Back
FEB_4054 15.07.24 12:59:47
TextEdit.txt
12:59:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:59:47:ST3_Shared:INFO: FEB-Microcable
12:59:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:59:48:febtest:INFO: Testing FEB with SN 4054
12:59:49:smx_tester:INFO: Scanning setup
12:59:49:elinks:INFO: Disabling clock on downlink 0
12:59:49:elinks:INFO: Disabling clock on downlink 1
12:59:49:elinks:INFO: Disabling clock on downlink 2
12:59:49:elinks:INFO: Disabling clock on downlink 3
12:59:49:elinks:INFO: Disabling clock on downlink 4
12:59:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:59:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
12:59:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:59:49:elinks:INFO: Disabling clock on downlink 0
12:59:49:elinks:INFO: Disabling clock on downlink 1
12:59:49:elinks:INFO: Disabling clock on downlink 2
12:59:49:elinks:INFO: Disabling clock on downlink 3
12:59:49:elinks:INFO: Disabling clock on downlink 4
12:59:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:59:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
12:59:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:59:49:elinks:INFO: Disabling clock on downlink 0
12:59:49:elinks:INFO: Disabling clock on downlink 1
12:59:49:elinks:INFO: Disabling clock on downlink 2
12:59:49:elinks:INFO: Disabling clock on downlink 3
12:59:49:elinks:INFO: Disabling clock on downlink 4
12:59:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:59:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
12:59:50:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
12:59:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:59:50:elinks:INFO: Disabling clock on downlink 0
12:59:50:elinks:INFO: Disabling clock on downlink 1
12:59:50:elinks:INFO: Disabling clock on downlink 2
12:59:50:elinks:INFO: Disabling clock on downlink 3
12:59:50:elinks:INFO: Disabling clock on downlink 4
12:59:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:59:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
12:59:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:59:50:elinks:INFO: Disabling clock on downlink 0
12:59:50:elinks:INFO: Disabling clock on downlink 1
12:59:50:elinks:INFO: Disabling clock on downlink 2
12:59:50:elinks:INFO: Disabling clock on downlink 3
12:59:50:elinks:INFO: Disabling clock on downlink 4
12:59:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
12:59:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
12:59:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
12:59:50:setup_element:INFO: Scanning clock phase
12:59:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:59:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:59:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2
12:59:50:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________XXXXXX___________
Clock Delay: 25
12:59:50:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________XXXXXX___________
Clock Delay: 25
12:59:50:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
12:59:50:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
12:59:50:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:59:50:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXX__________
Clock Delay: 26
12:59:50:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:59:50:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:59:50:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:59:50:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
12:59:50:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXX________
Clock Delay: 28
12:59:50:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXX________
Clock Delay: 28
12:59:50:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
12:59:50:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXXX________
Clock Delay: 28
12:59:50:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
12:59:50:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
12:59:50:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
12:59:50:setup_element:INFO: Scanning data phases
12:59:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:59:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:59:55:setup_element:INFO: Data phase scan results for group 0, downlink 2
12:59:55:setup_element:INFO: Eye window for uplink 16: X_______________________________X_XXXXXX
Data delay found: 16
12:59:55:setup_element:INFO: Eye window for uplink 17: _______________________________XXXXXX___
Data delay found: 13
12:59:55:setup_element:INFO: Eye window for uplink 18: X________________________________XXXXXXX
Data delay found: 16
12:59:55:setup_element:INFO: Eye window for uplink 19: ______________________________XXXXXXX___
Data delay found: 13
12:59:55:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXXX_
Data delay found: 15
12:59:55:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXXX___
Data delay found: 13
12:59:55:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX
Data delay found: 18
12:59:55:setup_element:INFO: Eye window for uplink 23: XXXX___________________________XXXXXXXXX
Data delay found: 17
12:59:55:setup_element:INFO: Eye window for uplink 24: __XXXXXXXX______________________________
Data delay found: 25
12:59:55:setup_element:INFO: Eye window for uplink 25: _____XXXXXXXXX__________________________
Data delay found: 29
12:59:55:setup_element:INFO: Eye window for uplink 26: ___XXXXXXXXX____________________________
Data delay found: 27
12:59:55:setup_element:INFO: Eye window for uplink 27: _______XXXXXXXXXXX______________________
Data delay found: 32
12:59:55:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXX______________________
Data delay found: 33
12:59:55:setup_element:INFO: Eye window for uplink 29: ____________XXXXXXX_____________________
Data delay found: 35
12:59:55:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXXX_____________________
Data delay found: 34
12:59:55:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXX_____________________
Data delay found: 35
12:59:55:setup_element:INFO: Setting the data phase to 16 for uplink 16
12:59:55:setup_element:INFO: Setting the data phase to 13 for uplink 17
12:59:55:setup_element:INFO: Setting the data phase to 16 for uplink 18
12:59:55:setup_element:INFO: Setting the data phase to 13 for uplink 19
12:59:55:setup_element:INFO: Setting the data phase to 15 for uplink 20
12:59:56:setup_element:INFO: Setting the data phase to 13 for uplink 21
12:59:56:setup_element:INFO: Setting the data phase to 18 for uplink 22
12:59:56:setup_element:INFO: Setting the data phase to 17 for uplink 23
12:59:56:setup_element:INFO: Setting the data phase to 25 for uplink 24
12:59:56:setup_element:INFO: Setting the data phase to 29 for uplink 25
12:59:56:setup_element:INFO: Setting the data phase to 27 for uplink 26
12:59:56:setup_element:INFO: Setting the data phase to 32 for uplink 27
12:59:56:setup_element:INFO: Setting the data phase to 33 for uplink 28
12:59:56:setup_element:INFO: Setting the data phase to 35 for uplink 29
12:59:56:setup_element:INFO: Setting the data phase to 34 for uplink 30
12:59:56:setup_element:INFO: Setting the data phase to 35 for uplink 31
12:59:56:setup_element:INFO: Beginning SMX ASICs map scan
12:59:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:59:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:59:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:59:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:59:56:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:59:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:59:56:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:59:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:59:56:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:59:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:59:56:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:59:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:59:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:59:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:59:56:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:59:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:59:57:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:59:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:59:57:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:59:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:59:57:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:59:58:setup_element:INFO: Performing Elink synchronization
12:59:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
12:59:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:59:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
12:59:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
12:59:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
12:59:58:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:59:59:febtest:INFO: Init all SMX (CSA): 30
13:00:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:00:16:febtest:INFO: 23-00 | XA-000-08-003-000-002-115-11 | 44.1 | 1147.8
13:00:17:febtest:INFO: 30-01 | XA-000-08-003-000-002-112-11 | 56.8 | 1112.1
13:00:17:febtest:INFO: 21-02 | XA-000-08-003-000-002-121-11 | 47.3 | 1141.9
13:00:17:febtest:INFO: 28-03 | XA-000-08-003-000-002-117-11 | 44.1 | 1147.8
13:00:17:febtest:INFO: 19-04 | XA-000-08-003-000-002-110-12 | 47.3 | 1141.9
13:00:18:febtest:INFO: 26-05 | XA-000-08-003-000-002-122-11 | 40.9 | 1159.7
13:00:18:febtest:INFO: 17-06 | XA-000-08-003-000-002-114-11 | 40.9 | 1177.4
13:00:18:febtest:INFO: 24-07 | XA-000-08-003-000-002-111-12 | 34.6 | 1177.4
13:00:19:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:00:21:ST3_smx:INFO: chip: 23-0 44.073563 C 1165.571835 mV
13:00:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:21:ST3_smx:INFO: Electrons
13:00:21:ST3_smx:INFO: # loops 0
13:00:23:ST3_smx:INFO: # loops 1
13:00:25:ST3_smx:INFO: # loops 2
13:00:28:ST3_smx:INFO: Total # of broken channels: 0
13:00:28:ST3_smx:INFO: List of broken channels: []
13:00:28:ST3_smx:INFO: Total # of broken channels: 0
13:00:28:ST3_smx:INFO: List of broken channels: []
13:00:29:ST3_smx:INFO: chip: 30-1 56.797143 C 1124.048640 mV
13:00:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:29:ST3_smx:INFO: Electrons
13:00:29:ST3_smx:INFO: # loops 0
13:00:31:ST3_smx:INFO: # loops 1
13:00:33:ST3_smx:INFO: # loops 2
13:00:35:ST3_smx:INFO: Total # of broken channels: 0
13:00:35:ST3_smx:INFO: List of broken channels: []
13:00:35:ST3_smx:INFO: Total # of broken channels: 0
13:00:35:ST3_smx:INFO: List of broken channels: []
13:00:37:ST3_smx:INFO: chip: 21-2 47.250730 C 1153.732915 mV
13:00:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:37:ST3_smx:INFO: Electrons
13:00:37:ST3_smx:INFO: # loops 0
13:00:39:ST3_smx:INFO: # loops 1
13:00:41:ST3_smx:INFO: # loops 2
13:00:43:ST3_smx:INFO: Total # of broken channels: 0
13:00:43:ST3_smx:INFO: List of broken channels: []
13:00:43:ST3_smx:INFO: Total # of broken channels: 0
13:00:43:ST3_smx:INFO: List of broken channels: []
13:00:44:ST3_smx:INFO: chip: 28-3 47.250730 C 1159.654860 mV
13:00:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:44:ST3_smx:INFO: Electrons
13:00:44:ST3_smx:INFO: # loops 0
13:00:46:ST3_smx:INFO: # loops 1
13:00:49:ST3_smx:INFO: # loops 2
13:00:51:ST3_smx:INFO: Total # of broken channels: 0
13:00:51:ST3_smx:INFO: List of broken channels: []
13:00:51:ST3_smx:INFO: Total # of broken channels: 0
13:00:51:ST3_smx:INFO: List of broken channels: []
13:00:53:ST3_smx:INFO: chip: 19-4 50.430383 C 1153.732915 mV
13:00:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:00:53:ST3_smx:INFO: Electrons
13:00:53:ST3_smx:INFO: # loops 0
13:00:55:ST3_smx:INFO: # loops 1
13:00:56:ST3_smx:INFO: # loops 2
13:00:58:ST3_smx:INFO: Total # of broken channels: 0
13:00:58:ST3_smx:INFO: List of broken channels: []
13:00:58:ST3_smx:INFO: Total # of broken channels: 0
13:00:58:ST3_smx:INFO: List of broken channels: []
13:01:00:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
13:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:00:ST3_smx:INFO: Electrons
13:01:00:ST3_smx:INFO: # loops 0
13:01:02:ST3_smx:INFO: # loops 1
13:01:04:ST3_smx:INFO: # loops 2
13:01:06:ST3_smx:INFO: Total # of broken channels: 0
13:01:06:ST3_smx:INFO: List of broken channels: []
13:01:06:ST3_smx:INFO: Total # of broken channels: 0
13:01:06:ST3_smx:INFO: List of broken channels: []
13:01:08:ST3_smx:INFO: chip: 17-6 40.898880 C 1183.292940 mV
13:01:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:08:ST3_smx:INFO: Electrons
13:01:08:ST3_smx:INFO: # loops 0
13:01:10:ST3_smx:INFO: # loops 1
13:01:12:ST3_smx:INFO: # loops 2
13:01:14:ST3_smx:INFO: Total # of broken channels: 0
13:01:14:ST3_smx:INFO: List of broken channels: []
13:01:14:ST3_smx:INFO: Total # of broken channels: 0
13:01:14:ST3_smx:INFO: List of broken channels: []
13:01:16:ST3_smx:INFO: chip: 24-7 37.726682 C 1189.190035 mV
13:01:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:01:16:ST3_smx:INFO: Electrons
13:01:16:ST3_smx:INFO: # loops 0
13:01:17:ST3_smx:INFO: # loops 1
13:01:20:ST3_smx:INFO: # loops 2
13:01:21:ST3_smx:INFO: Total # of broken channels: 0
13:01:21:ST3_smx:INFO: List of broken channels: []
13:01:21:ST3_smx:INFO: Total # of broken channels: 0
13:01:22:ST3_smx:INFO: List of broken channels: []
13:01:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:01:22:febtest:INFO: 23-00 | XA-000-08-003-000-002-115-11 | 47.3 | 1189.2
13:01:22:febtest:INFO: 30-01 | XA-000-08-003-000-002-112-11 | 60.0 | 1141.9
13:01:22:febtest:INFO: 21-02 | XA-000-08-003-000-002-121-11 | 50.4 | 1177.4
13:01:23:febtest:INFO: 28-03 | XA-000-08-003-000-002-117-11 | 47.3 | 1183.3
13:01:23:febtest:INFO: 19-04 | XA-000-08-003-000-002-110-12 | 50.4 | 1177.4
13:01:23:febtest:INFO: 26-05 | XA-000-08-003-000-002-122-11 | 44.1 | 1195.1
13:01:23:febtest:INFO: 17-06 | XA-000-08-003-000-002-114-11 | 40.9 | 1206.9
13:01:24:febtest:INFO: 24-07 | XA-000-08-003-000-002-111-12 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_15-12_59_47
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4054| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5800', '1.849', '2.5810']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0140', '1.850', '2.5560']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5305']