
FEB_4055 23.07.24 07:52:59
TextEdit.txt
07:52:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:52:59:ST3_Shared:INFO: FEB-Microcable 07:52:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:52:59:febtest:INFO: Testing FEB with SN 4055 07:53:01:smx_tester:INFO: Scanning setup 07:53:01:elinks:INFO: Disabling clock on downlink 0 07:53:01:elinks:INFO: Disabling clock on downlink 1 07:53:01:elinks:INFO: Disabling clock on downlink 2 07:53:01:elinks:INFO: Disabling clock on downlink 3 07:53:01:elinks:INFO: Disabling clock on downlink 4 07:53:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:53:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:53:01:elinks:INFO: Disabling clock on downlink 0 07:53:01:elinks:INFO: Disabling clock on downlink 1 07:53:01:elinks:INFO: Disabling clock on downlink 2 07:53:01:elinks:INFO: Disabling clock on downlink 3 07:53:01:elinks:INFO: Disabling clock on downlink 4 07:53:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:53:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:53:01:elinks:INFO: Disabling clock on downlink 0 07:53:01:elinks:INFO: Disabling clock on downlink 1 07:53:01:elinks:INFO: Disabling clock on downlink 2 07:53:01:elinks:INFO: Disabling clock on downlink 3 07:53:01:elinks:INFO: Disabling clock on downlink 4 07:53:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:53:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:53:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:53:01:elinks:INFO: Disabling clock on downlink 0 07:53:01:elinks:INFO: Disabling clock on downlink 1 07:53:01:elinks:INFO: Disabling clock on downlink 2 07:53:01:elinks:INFO: Disabling clock on downlink 3 07:53:01:elinks:INFO: Disabling clock on downlink 4 07:53:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:53:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:53:01:elinks:INFO: Disabling clock on downlink 0 07:53:01:elinks:INFO: Disabling clock on downlink 1 07:53:01:elinks:INFO: Disabling clock on downlink 2 07:53:01:elinks:INFO: Disabling clock on downlink 3 07:53:01:elinks:INFO: Disabling clock on downlink 4 07:53:01:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:53:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:53:01:setup_element:INFO: Scanning clock phase 07:53:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:53:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:53:02:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:53:02:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:53:02:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:53:02:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:53:02:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:53:02:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXX__________ Clock Delay: 27 07:53:02:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXX__________ Clock Delay: 27 07:53:02:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:53:02:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:53:02:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 07:53:02:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 07:53:02:setup_element:INFO: Scanning data phases 07:53:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:53:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:53:07:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:53:07:setup_element:INFO: Eye window for uplink 16: XXX_________________________________XXXX Data delay found: 19 07:53:07:setup_element:INFO: Eye window for uplink 17: XX______________________________XXXXXXX_ Data delay found: 16 07:53:07:setup_element:INFO: Eye window for uplink 18: XXX________________________________X_XXX Data delay found: 18 07:53:07:setup_element:INFO: Eye window for uplink 19: X_________________________________XXXXXX Data delay found: 17 07:53:07:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX Data delay found: 17 07:53:07:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX Data delay found: 17 07:53:07:setup_element:INFO: Eye window for uplink 22: XX___________________________________XXX Data delay found: 19 07:53:07:setup_element:INFO: Eye window for uplink 23: XXXXX___________________________XXXXXXXX Data delay found: 18 07:53:07:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________ Data delay found: 29 07:53:07:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________ Data delay found: 31 07:53:07:setup_element:INFO: Eye window for uplink 26: ______XXXXXXXX__________________________ Data delay found: 29 07:53:07:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________ Data delay found: 34 07:53:07:setup_element:INFO: Eye window for uplink 28: __________XXXXXXX_______________________ Data delay found: 33 07:53:07:setup_element:INFO: Eye window for uplink 29: ______________XXXXXX____________________ Data delay found: 36 07:53:07:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXXX__________________ Data delay found: 37 07:53:07:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 07:53:07:setup_element:INFO: Setting the data phase to 19 for uplink 16 07:53:07:setup_element:INFO: Setting the data phase to 16 for uplink 17 07:53:07:setup_element:INFO: Setting the data phase to 18 for uplink 18 07:53:07:setup_element:INFO: Setting the data phase to 17 for uplink 19 07:53:07:setup_element:INFO: Setting the data phase to 17 for uplink 20 07:53:07:setup_element:INFO: Setting the data phase to 17 for uplink 21 07:53:07:setup_element:INFO: Setting the data phase to 19 for uplink 22 07:53:07:setup_element:INFO: Setting the data phase to 18 for uplink 23 07:53:07:setup_element:INFO: Setting the data phase to 29 for uplink 24 07:53:07:setup_element:INFO: Setting the data phase to 31 for uplink 25 07:53:07:setup_element:INFO: Setting the data phase to 29 for uplink 26 07:53:07:setup_element:INFO: Setting the data phase to 34 for uplink 27 07:53:07:setup_element:INFO: Setting the data phase to 33 for uplink 28 07:53:07:setup_element:INFO: Setting the data phase to 36 for uplink 29 07:53:07:setup_element:INFO: Setting the data phase to 37 for uplink 30 07:53:07:setup_element:INFO: Setting the data phase to 38 for uplink 31 07:53:07:setup_element:INFO: Beginning SMX ASICs map scan 07:53:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:53:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:53:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:53:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:53:07:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 07:53:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 07:53:07:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 07:53:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:53:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:53:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 07:53:07:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 07:53:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:53:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:53:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 07:53:08:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 07:53:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:53:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:53:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 07:53:08:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 07:53:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:53:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:53:09:setup_element:INFO: Performing Elink synchronization 07:53:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:53:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:53:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:53:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:53:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:53:09:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:53:10:febtest:INFO: Init all SMX (CSA): 30 07:53:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:53:27:febtest:INFO: 23-00 | XA-000-08-003-000-005-127-03 | 34.6 | 1171.5 07:53:27:febtest:INFO: 30-01 | XA-000-08-003-000-005-136-05 | 21.9 | 1218.6 07:53:27:febtest:INFO: 21-02 | XA-000-08-003-000-005-126-03 | 44.1 | 1135.9 07:53:28:febtest:INFO: 28-03 | XA-000-08-003-000-005-134-05 | 44.1 | 1147.8 07:53:28:febtest:INFO: 19-04 | XA-000-08-003-000-005-125-03 | 44.1 | 1135.9 07:53:28:febtest:INFO: 26-05 | XA-000-08-003-000-005-133-05 | 40.9 | 1147.8 07:53:28:febtest:INFO: 17-06 | XA-000-08-003-000-005-124-03 | 37.7 | 1165.6 07:53:28:febtest:INFO: 24-07 | XA-000-08-003-000-005-132-05 | 40.9 | 1141.9 07:53:29:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:53:31:ST3_smx:INFO: chip: 23-0 37.726682 C 1183.292940 mV 07:53:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:31:ST3_smx:INFO: Electrons 07:53:31:ST3_smx:INFO: # loops 0 07:53:33:ST3_smx:INFO: # loops 1 07:53:34:ST3_smx:INFO: # loops 2 07:53:36:ST3_smx:INFO: Total # of broken channels: 0 07:53:36:ST3_smx:INFO: List of broken channels: [] 07:53:36:ST3_smx:INFO: Total # of broken channels: 0 07:53:36:ST3_smx:INFO: List of broken channels: [] 07:53:38:ST3_smx:INFO: chip: 30-1 21.902970 C 1230.330540 mV 07:53:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:38:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:38:ST3_smx:INFO: Electrons 07:53:38:ST3_smx:INFO: # loops 0 07:53:39:ST3_smx:INFO: # loops 1 07:53:41:ST3_smx:INFO: # loops 2 07:53:43:ST3_smx:INFO: Total # of broken channels: 0 07:53:43:ST3_smx:INFO: List of broken channels: [] 07:53:43:ST3_smx:INFO: Total # of broken channels: 0 07:53:43:ST3_smx:INFO: List of broken channels: [] 07:53:45:ST3_smx:INFO: chip: 21-2 44.073563 C 1147.806000 mV 07:53:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:45:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:45:ST3_smx:INFO: Electrons 07:53:45:ST3_smx:INFO: # loops 0 07:53:46:ST3_smx:INFO: # loops 1 07:53:48:ST3_smx:INFO: # loops 2 07:53:50:ST3_smx:INFO: Total # of broken channels: 0 07:53:50:ST3_smx:INFO: List of broken channels: [] 07:53:50:ST3_smx:INFO: Total # of broken channels: 0 07:53:50:ST3_smx:INFO: List of broken channels: [] 07:53:51:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV 07:53:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:51:ST3_smx:INFO: Electrons 07:53:51:ST3_smx:INFO: # loops 0 07:53:53:ST3_smx:INFO: # loops 1 07:53:54:ST3_smx:INFO: # loops 2 07:53:56:ST3_smx:INFO: Total # of broken channels: 0 07:53:56:ST3_smx:INFO: List of broken channels: [] 07:53:56:ST3_smx:INFO: Total # of broken channels: 0 07:53:56:ST3_smx:INFO: List of broken channels: [] 07:53:58:ST3_smx:INFO: chip: 19-4 47.250730 C 1147.806000 mV 07:53:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:58:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:53:58:ST3_smx:INFO: Electrons 07:53:58:ST3_smx:INFO: # loops 0 07:53:59:ST3_smx:INFO: # loops 1 07:54:01:ST3_smx:INFO: # loops 2 07:54:02:ST3_smx:INFO: Total # of broken channels: 0 07:54:02:ST3_smx:INFO: List of broken channels: [] 07:54:02:ST3_smx:INFO: Total # of broken channels: 0 07:54:02:ST3_smx:INFO: List of broken channels: [] 07:54:04:ST3_smx:INFO: chip: 26-5 44.073563 C 1159.654860 mV 07:54:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:04:ST3_smx:INFO: Electrons 07:54:04:ST3_smx:INFO: # loops 0 07:54:05:ST3_smx:INFO: # loops 1 07:54:07:ST3_smx:INFO: # loops 2 07:54:09:ST3_smx:INFO: Total # of broken channels: 0 07:54:09:ST3_smx:INFO: List of broken channels: [] 07:54:09:ST3_smx:INFO: Total # of broken channels: 1 07:54:09:ST3_smx:INFO: List of broken channels: [105] 07:54:11:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV 07:54:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:11:ST3_smx:INFO: Electrons 07:54:11:ST3_smx:INFO: # loops 0 07:54:13:ST3_smx:INFO: # loops 1 07:54:14:ST3_smx:INFO: # loops 2 07:54:16:ST3_smx:INFO: Total # of broken channels: 0 07:54:16:ST3_smx:INFO: List of broken channels: [] 07:54:16:ST3_smx:INFO: Total # of broken channels: 0 07:54:16:ST3_smx:INFO: List of broken channels: [] 07:54:18:ST3_smx:INFO: chip: 24-7 40.898880 C 1153.732915 mV 07:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:54:18:ST3_smx:INFO: Electrons 07:54:18:ST3_smx:INFO: # loops 0 07:54:19:ST3_smx:INFO: # loops 1 07:54:21:ST3_smx:INFO: # loops 2 07:54:23:ST3_smx:INFO: Total # of broken channels: 0 07:54:23:ST3_smx:INFO: List of broken channels: [] 07:54:23:ST3_smx:INFO: Total # of broken channels: 0 07:54:23:ST3_smx:INFO: List of broken channels: [] 07:54:23:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:54:24:febtest:INFO: 23-00 | XA-000-08-003-000-005-127-03 | 40.9 | 1206.9 07:54:24:febtest:INFO: 30-01 | XA-000-08-003-000-005-136-05 | 25.1 | 1253.7 07:54:24:febtest:INFO: 21-02 | XA-000-08-003-000-005-126-03 | 47.3 | 1171.5 07:54:24:febtest:INFO: 28-03 | XA-000-08-003-000-005-134-05 | 44.1 | 1177.4 07:54:25:febtest:INFO: 19-04 | XA-000-08-003-000-005-125-03 | 47.3 | 1165.6 07:54:25:febtest:INFO: 26-05 | XA-000-08-003-000-005-133-05 | 44.1 | 1177.4 07:54:25:febtest:INFO: 17-06 | XA-000-08-003-000-005-124-03 | 40.9 | 1195.1 07:54:25:febtest:INFO: 24-07 | XA-000-08-003-000-005-132-05 | 44.1 | 1171.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_23-07_52_59 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4055| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.4670', '1.850', '1.8710'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0070', '1.850', '2.5200'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9600', '1.850', '0.5207']