
FEB_4056 23.07.24 10:28:27
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10:28:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:28:27:ST3_Shared:INFO: FEB-Microcable 10:28:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:28:27:febtest:INFO: Testing FEB with SN 4056 10:28:28:smx_tester:INFO: Scanning setup 10:28:28:elinks:INFO: Disabling clock on downlink 0 10:28:28:elinks:INFO: Disabling clock on downlink 1 10:28:28:elinks:INFO: Disabling clock on downlink 2 10:28:28:elinks:INFO: Disabling clock on downlink 3 10:28:28:elinks:INFO: Disabling clock on downlink 4 10:28:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:28:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:28:elinks:INFO: Disabling clock on downlink 0 10:28:28:elinks:INFO: Disabling clock on downlink 1 10:28:28:elinks:INFO: Disabling clock on downlink 2 10:28:28:elinks:INFO: Disabling clock on downlink 3 10:28:28:elinks:INFO: Disabling clock on downlink 4 10:28:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:28:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:28:elinks:INFO: Disabling clock on downlink 0 10:28:28:elinks:INFO: Disabling clock on downlink 1 10:28:28:elinks:INFO: Disabling clock on downlink 2 10:28:29:elinks:INFO: Disabling clock on downlink 3 10:28:29:elinks:INFO: Disabling clock on downlink 4 10:28:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:28:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:28:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:29:elinks:INFO: Disabling clock on downlink 0 10:28:29:elinks:INFO: Disabling clock on downlink 1 10:28:29:elinks:INFO: Disabling clock on downlink 2 10:28:29:elinks:INFO: Disabling clock on downlink 3 10:28:29:elinks:INFO: Disabling clock on downlink 4 10:28:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:28:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:29:elinks:INFO: Disabling clock on downlink 0 10:28:29:elinks:INFO: Disabling clock on downlink 1 10:28:29:elinks:INFO: Disabling clock on downlink 2 10:28:29:elinks:INFO: Disabling clock on downlink 3 10:28:29:elinks:INFO: Disabling clock on downlink 4 10:28:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:28:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:28:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:28:29:setup_element:INFO: Scanning clock phase 10:28:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:28:29:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:28:29:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 10:28:29:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 10:28:29:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXX___________ Clock Delay: 26 10:28:29:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXX___________ Clock Delay: 26 10:28:29:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:28:29:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:28:29:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:28:29:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:28:29:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2 10:28:29:setup_element:INFO: Scanning data phases 10:28:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:28:34:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:28:34:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 10:28:34:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________ Data delay found: 32 10:28:34:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX___________________________ Data delay found: 29 10:28:34:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 10:28:34:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________ Data delay found: 34 10:28:34:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 10:28:34:setup_element:INFO: Eye window for uplink 30: ____________XXXXXXXXX___________________ Data delay found: 36 10:28:34:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXXXXX__________________ Data delay found: 36 10:28:34:setup_element:INFO: Setting the data phase to 28 for uplink 24 10:28:34:setup_element:INFO: Setting the data phase to 32 for uplink 25 10:28:34:setup_element:INFO: Setting the data phase to 29 for uplink 26 10:28:34:setup_element:INFO: Setting the data phase to 33 for uplink 27 10:28:34:setup_element:INFO: Setting the data phase to 34 for uplink 28 10:28:34:setup_element:INFO: Setting the data phase to 37 for uplink 29 10:28:34:setup_element:INFO: Setting the data phase to 36 for uplink 30 10:28:34:setup_element:INFO: Setting the data phase to 36 for uplink 31 10:28:34:setup_element:INFO: Beginning SMX ASICs map scan 10:28:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:34:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:28:34:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:28:34:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:28:34:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 10:28:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:28:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:28:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:28:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:28:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:28:35:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:28:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:28:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:28:37:setup_element:INFO: Performing Elink synchronization 10:28:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:28:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:28:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:28:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:28:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:28:37:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:28:37:febtest:INFO: Init all SMX (CSA): 30 10:28:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:28:45:febtest:INFO: 30-01 | XA-000-08-003-000-005-145-02 | 44.1 | 1141.9 10:28:46:febtest:INFO: 28-03 | XA-000-08-003-000-005-144-02 | 44.1 | 1153.7 10:28:46:febtest:INFO: 26-05 | XA-000-08-003-000-005-143-05 | 25.1 | 1195.1 10:28:46:febtest:INFO: 24-07 | XA-000-08-003-000-005-142-05 | 21.9 | 1212.7 10:28:47:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:28:49:ST3_smx:INFO: chip: 30-1 44.073563 C 1153.732915 mV 10:28:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:28:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:28:49:ST3_smx:INFO: Electrons 10:28:49:ST3_smx:INFO: # loops 0 10:28:51:ST3_smx:INFO: # loops 1 10:28:53:ST3_smx:INFO: # loops 2 10:28:54:ST3_smx:INFO: Total # of broken channels: 0 10:28:54:ST3_smx:INFO: List of broken channels: [] 10:28:54:ST3_smx:INFO: Total # of broken channels: 0 10:28:54:ST3_smx:INFO: List of broken channels: [] 10:28:56:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV 10:28:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:28:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:28:56:ST3_smx:INFO: Electrons 10:28:56:ST3_smx:INFO: # loops 0 10:28:58:ST3_smx:INFO: # loops 1 10:28:59:ST3_smx:INFO: # loops 2 10:29:01:ST3_smx:INFO: Total # of broken channels: 0 10:29:01:ST3_smx:INFO: List of broken channels: [] 10:29:01:ST3_smx:INFO: Total # of broken channels: 0 10:29:01:ST3_smx:INFO: List of broken channels: [] 10:29:03:ST3_smx:INFO: chip: 26-5 25.062742 C 1206.851500 mV 10:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:03:ST3_smx:INFO: Electrons 10:29:03:ST3_smx:INFO: # loops 0 10:29:05:ST3_smx:INFO: # loops 1 10:29:06:ST3_smx:INFO: # loops 2 10:29:08:ST3_smx:INFO: Total # of broken channels: 0 10:29:08:ST3_smx:INFO: List of broken channels: [] 10:29:08:ST3_smx:INFO: Total # of broken channels: 0 10:29:08:ST3_smx:INFO: List of broken channels: [] 10:29:10:ST3_smx:INFO: chip: 24-7 21.902970 C 1218.600960 mV 10:29:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:10:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:29:10:ST3_smx:INFO: Electrons 10:29:10:ST3_smx:INFO: # loops 0 10:29:11:ST3_smx:INFO: # loops 1 10:29:13:ST3_smx:INFO: # loops 2 10:29:15:ST3_smx:INFO: Total # of broken channels: 0 10:29:15:ST3_smx:INFO: List of broken channels: [] 10:29:15:ST3_smx:INFO: Total # of broken channels: 0 10:29:15:ST3_smx:INFO: List of broken channels: [] 10:29:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:29:15:febtest:INFO: 30-01 | XA-000-08-003-000-005-145-02 | 44.1 | 1171.5 10:29:16:febtest:INFO: 28-03 | XA-000-08-003-000-005-144-02 | 44.1 | 1177.4 10:29:16:febtest:INFO: 26-05 | XA-000-08-003-000-005-143-05 | 28.2 | 1224.5 10:29:16:febtest:INFO: 24-07 | XA-000-08-003-000-005-142-05 | 21.9 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_23-10_28_27 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4056| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8103', '1.850', '1.1860'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '1.2990'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9808', '1.851', '0.2666']