
FEB_4056 24.07.24 07:33:03
TextEdit.txt
07:33:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:33:03:ST3_Shared:INFO: FEB-Microcable 07:33:03:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:33:03:febtest:INFO: Testing FEB with SN 4056 07:33:05:smx_tester:INFO: Scanning setup 07:33:05:elinks:INFO: Disabling clock on downlink 0 07:33:05:elinks:INFO: Disabling clock on downlink 1 07:33:05:elinks:INFO: Disabling clock on downlink 2 07:33:05:elinks:INFO: Disabling clock on downlink 3 07:33:05:elinks:INFO: Disabling clock on downlink 4 07:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:33:05:elinks:INFO: Disabling clock on downlink 0 07:33:05:elinks:INFO: Disabling clock on downlink 1 07:33:05:elinks:INFO: Disabling clock on downlink 2 07:33:05:elinks:INFO: Disabling clock on downlink 3 07:33:05:elinks:INFO: Disabling clock on downlink 4 07:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:33:05:elinks:INFO: Disabling clock on downlink 0 07:33:05:elinks:INFO: Disabling clock on downlink 1 07:33:05:elinks:INFO: Disabling clock on downlink 2 07:33:05:elinks:INFO: Disabling clock on downlink 3 07:33:05:elinks:INFO: Disabling clock on downlink 4 07:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:33:05:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:33:05:elinks:INFO: Disabling clock on downlink 0 07:33:05:elinks:INFO: Disabling clock on downlink 1 07:33:05:elinks:INFO: Disabling clock on downlink 2 07:33:05:elinks:INFO: Disabling clock on downlink 3 07:33:05:elinks:INFO: Disabling clock on downlink 4 07:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:33:05:elinks:INFO: Disabling clock on downlink 0 07:33:05:elinks:INFO: Disabling clock on downlink 1 07:33:05:elinks:INFO: Disabling clock on downlink 2 07:33:05:elinks:INFO: Disabling clock on downlink 3 07:33:05:elinks:INFO: Disabling clock on downlink 4 07:33:05:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:33:05:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:33:05:setup_element:INFO: Scanning clock phase 07:33:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:33:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:33:06:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:33:06:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 07:33:06:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 07:33:06:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:33:06:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________XXXXX___________ Clock Delay: 26 07:33:06:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________XXXXXXX________ Clock Delay: 28 07:33:06:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________XXXXXXX________ Clock Delay: 28 07:33:06:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXX_________ Clock Delay: 27 07:33:06:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXX________ Clock Delay: 28 07:33:06:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXX________ Clock Delay: 28 07:33:06:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 07:33:06:setup_element:INFO: Scanning data phases 07:33:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:33:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:33:11:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:33:11:setup_element:INFO: Eye window for uplink 16: XXXXX_______________________________XXXX Data delay found: 20 07:33:11:setup_element:INFO: Eye window for uplink 17: X______________________________XXXXXXXXX Data delay found: 15 07:33:11:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX Data delay found: 18 07:33:11:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__ Data delay found: 15 07:33:11:setup_element:INFO: Eye window for uplink 20: XXX_______________________________XXXXXX Data delay found: 18 07:33:11:setup_element:INFO: Eye window for uplink 21: XX________________________________XXXXXX Data delay found: 17 07:33:11:setup_element:INFO: Eye window for uplink 22: X_X_________________________________XXXX Data delay found: 19 07:33:11:setup_element:INFO: Eye window for uplink 23: XXXX___________________________XXXXXXXXX Data delay found: 17 07:33:11:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________ Data delay found: 28 07:33:11:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________ Data delay found: 32 07:33:11:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXX___________________________ Data delay found: 28 07:33:11:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 07:33:11:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXXX____________________ Data delay found: 35 07:33:11:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________ Data delay found: 38 07:33:11:setup_element:INFO: Eye window for uplink 30: _____________X_XXXXXXXX_________________ Data delay found: 37 07:33:11:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________ Data delay found: 39 07:33:11:setup_element:INFO: Setting the data phase to 20 for uplink 16 07:33:11:setup_element:INFO: Setting the data phase to 15 for uplink 17 07:33:11:setup_element:INFO: Setting the data phase to 18 for uplink 18 07:33:11:setup_element:INFO: Setting the data phase to 15 for uplink 19 07:33:11:setup_element:INFO: Setting the data phase to 18 for uplink 20 07:33:11:setup_element:INFO: Setting the data phase to 17 for uplink 21 07:33:11:setup_element:INFO: Setting the data phase to 19 for uplink 22 07:33:11:setup_element:INFO: Setting the data phase to 17 for uplink 23 07:33:11:setup_element:INFO: Setting the data phase to 28 for uplink 24 07:33:11:setup_element:INFO: Setting the data phase to 32 for uplink 25 07:33:11:setup_element:INFO: Setting the data phase to 28 for uplink 26 07:33:11:setup_element:INFO: Setting the data phase to 33 for uplink 27 07:33:11:setup_element:INFO: Setting the data phase to 35 for uplink 28 07:33:11:setup_element:INFO: Setting the data phase to 38 for uplink 29 07:33:11:setup_element:INFO: Setting the data phase to 37 for uplink 30 07:33:11:setup_element:INFO: Setting the data phase to 39 for uplink 31 07:33:11:setup_element:INFO: Beginning SMX ASICs map scan 07:33:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:33:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:33:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:33:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:33:11:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 07:33:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 07:33:11:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 07:33:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:33:11:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:33:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 07:33:11:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 07:33:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:33:11:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:33:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 07:33:12:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 07:33:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:33:12:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:33:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 07:33:12:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 07:33:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:33:12:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:33:13:setup_element:INFO: Performing Elink synchronization 07:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:33:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:33:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:33:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:33:13:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:33:13:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:33:14:febtest:INFO: Init all SMX (CSA): 30 07:33:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:33:28:febtest:INFO: 23-00 | XA-000-08-003-000-005-141-05 | 31.4 | 1183.3 07:33:29:febtest:INFO: 30-01 | XA-000-08-003-000-005-145-02 | 44.1 | 1141.9 07:33:29:febtest:INFO: 21-02 | XA-000-08-003-000-005-140-05 | 31.4 | 1177.4 07:33:29:febtest:INFO: 28-03 | XA-000-08-003-000-005-144-02 | 44.1 | 1141.9 07:33:29:febtest:INFO: 19-04 | XA-000-08-003-000-005-139-05 | 28.2 | 1195.1 07:33:29:febtest:INFO: 26-05 | XA-000-08-003-000-005-143-05 | 25.1 | 1195.1 07:33:30:febtest:INFO: 17-06 | XA-000-08-003-000-005-138-05 | 40.9 | 1147.8 07:33:30:febtest:INFO: 24-07 | XA-000-08-003-000-005-142-05 | 21.9 | 1206.9 07:33:31:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:33:33:ST3_smx:INFO: chip: 23-0 34.556970 C 1189.190035 mV 07:33:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:33:ST3_smx:INFO: Electrons 07:33:33:ST3_smx:INFO: # loops 0 07:33:34:ST3_smx:INFO: # loops 1 07:33:36:ST3_smx:INFO: # loops 2 07:33:37:ST3_smx:INFO: Total # of broken channels: 0 07:33:37:ST3_smx:INFO: List of broken channels: [] 07:33:37:ST3_smx:INFO: Total # of broken channels: 0 07:33:37:ST3_smx:INFO: List of broken channels: [] 07:33:39:ST3_smx:INFO: chip: 30-1 44.073563 C 1147.806000 mV 07:33:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:39:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:39:ST3_smx:INFO: Electrons 07:33:39:ST3_smx:INFO: # loops 0 07:33:41:ST3_smx:INFO: # loops 1 07:33:43:ST3_smx:INFO: # loops 2 07:33:45:ST3_smx:INFO: Total # of broken channels: 0 07:33:45:ST3_smx:INFO: List of broken channels: [] 07:33:45:ST3_smx:INFO: Total # of broken channels: 0 07:33:45:ST3_smx:INFO: List of broken channels: [] 07:33:47:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV 07:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:47:ST3_smx:INFO: Electrons 07:33:47:ST3_smx:INFO: # loops 0 07:33:49:ST3_smx:INFO: # loops 1 07:33:51:ST3_smx:INFO: # loops 2 07:33:52:ST3_smx:INFO: Total # of broken channels: 0 07:33:52:ST3_smx:INFO: List of broken channels: [] 07:33:52:ST3_smx:INFO: Total # of broken channels: 0 07:33:52:ST3_smx:INFO: List of broken channels: [] 07:33:54:ST3_smx:INFO: chip: 28-3 47.250730 C 1159.654860 mV 07:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:33:54:ST3_smx:INFO: Electrons 07:33:54:ST3_smx:INFO: # loops 0 07:33:56:ST3_smx:INFO: # loops 1 07:33:58:ST3_smx:INFO: # loops 2 07:33:59:ST3_smx:INFO: Total # of broken channels: 0 07:33:59:ST3_smx:INFO: List of broken channels: [] 07:33:59:ST3_smx:INFO: Total # of broken channels: 0 07:33:59:ST3_smx:INFO: List of broken channels: [] 07:34:01:ST3_smx:INFO: chip: 19-4 28.225000 C 1212.728715 mV 07:34:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:01:ST3_smx:INFO: Electrons 07:34:01:ST3_smx:INFO: # loops 0 07:34:03:ST3_smx:INFO: # loops 1 07:34:04:ST3_smx:INFO: # loops 2 07:34:06:ST3_smx:INFO: Total # of broken channels: 0 07:34:06:ST3_smx:INFO: List of broken channels: [] 07:34:06:ST3_smx:INFO: Total # of broken channels: 0 07:34:06:ST3_smx:INFO: List of broken channels: [] 07:34:07:ST3_smx:INFO: chip: 26-5 28.225000 C 1200.969315 mV 07:34:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:07:ST3_smx:INFO: Electrons 07:34:07:ST3_smx:INFO: # loops 0 07:34:09:ST3_smx:INFO: # loops 1 07:34:10:ST3_smx:INFO: # loops 2 07:34:12:ST3_smx:INFO: Total # of broken channels: 0 07:34:12:ST3_smx:INFO: List of broken channels: [] 07:34:12:ST3_smx:INFO: Total # of broken channels: 0 07:34:12:ST3_smx:INFO: List of broken channels: [] 07:34:14:ST3_smx:INFO: chip: 17-6 44.073563 C 1153.732915 mV 07:34:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:14:ST3_smx:INFO: Electrons 07:34:14:ST3_smx:INFO: # loops 0 07:34:16:ST3_smx:INFO: # loops 1 07:34:17:ST3_smx:INFO: # loops 2 07:34:19:ST3_smx:INFO: Total # of broken channels: 0 07:34:19:ST3_smx:INFO: List of broken channels: [] 07:34:19:ST3_smx:INFO: Total # of broken channels: 0 07:34:19:ST3_smx:INFO: List of broken channels: [] 07:34:20:ST3_smx:INFO: chip: 24-7 25.062742 C 1218.600960 mV 07:34:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:34:20:ST3_smx:INFO: Electrons 07:34:20:ST3_smx:INFO: # loops 0 07:34:22:ST3_smx:INFO: # loops 1 07:34:23:ST3_smx:INFO: # loops 2 07:34:25:ST3_smx:INFO: Total # of broken channels: 0 07:34:25:ST3_smx:INFO: List of broken channels: [] 07:34:25:ST3_smx:INFO: Total # of broken channels: 0 07:34:25:ST3_smx:INFO: List of broken channels: [] 07:34:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:34:25:febtest:INFO: 23-00 | XA-000-08-003-000-005-141-05 | 37.7 | 1212.7 07:34:26:febtest:INFO: 30-01 | XA-000-08-003-000-005-145-02 | 47.3 | 1171.5 07:34:26:febtest:INFO: 21-02 | XA-000-08-003-000-005-140-05 | 37.7 | 1206.9 07:34:26:febtest:INFO: 28-03 | XA-000-08-003-000-005-144-02 | 50.4 | 1177.4 07:34:26:febtest:INFO: 19-04 | XA-000-08-003-000-005-139-05 | 31.4 | 1230.3 07:34:27:febtest:INFO: 26-05 | XA-000-08-003-000-005-143-05 | 31.4 | 1224.5 07:34:27:febtest:INFO: 17-06 | XA-000-08-003-000-005-138-05 | 47.3 | 1171.5 07:34:27:febtest:INFO: 24-07 | XA-000-08-003-000-005-142-05 | 25.1 | 1236.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_24-07_33_03 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4056| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.6000', '1.850', '2.4040'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9730', '1.849', '2.4750'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9430', '1.850', '0.5229']