
FEB_4057 30.07.24 07:55:25
TextEdit.txt
07:55:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:55:25:ST3_Shared:INFO: FEB-Microcable 07:55:25:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 07:55:25:febtest:INFO: Testing FEB with SN 4057 07:55:27:smx_tester:INFO: Scanning setup 07:55:27:elinks:INFO: Disabling clock on downlink 0 07:55:27:elinks:INFO: Disabling clock on downlink 1 07:55:27:elinks:INFO: Disabling clock on downlink 2 07:55:27:elinks:INFO: Disabling clock on downlink 3 07:55:27:elinks:INFO: Disabling clock on downlink 4 07:55:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:55:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 07:55:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:55:27:elinks:INFO: Disabling clock on downlink 0 07:55:27:elinks:INFO: Disabling clock on downlink 1 07:55:27:elinks:INFO: Disabling clock on downlink 2 07:55:27:elinks:INFO: Disabling clock on downlink 3 07:55:27:elinks:INFO: Disabling clock on downlink 4 07:55:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:55:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 07:55:27:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:55:27:elinks:INFO: Disabling clock on downlink 0 07:55:27:elinks:INFO: Disabling clock on downlink 1 07:55:27:elinks:INFO: Disabling clock on downlink 2 07:55:27:elinks:INFO: Disabling clock on downlink 3 07:55:27:elinks:INFO: Disabling clock on downlink 4 07:55:27:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:55:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 07:55:27:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 07:55:28:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 07:55:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:55:28:elinks:INFO: Disabling clock on downlink 0 07:55:28:elinks:INFO: Disabling clock on downlink 1 07:55:28:elinks:INFO: Disabling clock on downlink 2 07:55:28:elinks:INFO: Disabling clock on downlink 3 07:55:28:elinks:INFO: Disabling clock on downlink 4 07:55:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:55:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 07:55:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:55:28:elinks:INFO: Disabling clock on downlink 0 07:55:28:elinks:INFO: Disabling clock on downlink 1 07:55:28:elinks:INFO: Disabling clock on downlink 2 07:55:28:elinks:INFO: Disabling clock on downlink 3 07:55:28:elinks:INFO: Disabling clock on downlink 4 07:55:28:setup_element:INFO: Checking SOS, encoding_mode: SOS 07:55:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 07:55:28:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 07:55:28:setup_element:INFO: Scanning clock phase 07:55:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:55:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:55:28:setup_element:INFO: Clock phase scan results for group 0, downlink 2 07:55:28:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 07:55:28:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 07:55:28:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:55:28:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:55:28:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 07:55:28:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 07:55:28:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:55:28:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXX_________ Clock Delay: 28 07:55:28:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 07:55:28:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2 07:55:28:setup_element:INFO: Scanning data phases 07:55:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:55:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:55:33:setup_element:INFO: Data phase scan results for group 0, downlink 2 07:55:33:setup_element:INFO: Eye window for uplink 16: XX_______________________________X_XXXXX Data delay found: 17 07:55:33:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXXX__ Data delay found: 14 07:55:33:setup_element:INFO: Eye window for uplink 18: XXXX__________________________________XX Data delay found: 20 07:55:33:setup_element:INFO: Eye window for uplink 19: X__________________________________XXXXX Data delay found: 17 07:55:33:setup_element:INFO: Eye window for uplink 20: X_________________________________XXXXXX Data delay found: 17 07:55:33:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX Data delay found: 17 07:55:33:setup_element:INFO: Eye window for uplink 22: XXX________________________________XXXXX Data delay found: 18 07:55:33:setup_element:INFO: Eye window for uplink 23: XXXX____________________________XXXXXXXX Data delay found: 17 07:55:33:setup_element:INFO: Eye window for uplink 24: __XXXXXXXX______________________________ Data delay found: 25 07:55:33:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________ Data delay found: 29 07:55:33:setup_element:INFO: Eye window for uplink 26: _____XXXXXXX____________________________ Data delay found: 28 07:55:33:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 07:55:33:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________ Data delay found: 34 07:55:33:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________ Data delay found: 37 07:55:33:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXX_________________ Data delay found: 38 07:55:33:setup_element:INFO: Eye window for uplink 31: ________________XXXXXX__________________ Data delay found: 38 07:55:33:setup_element:INFO: Setting the data phase to 17 for uplink 16 07:55:33:setup_element:INFO: Setting the data phase to 14 for uplink 17 07:55:33:setup_element:INFO: Setting the data phase to 20 for uplink 18 07:55:33:setup_element:INFO: Setting the data phase to 17 for uplink 19 07:55:33:setup_element:INFO: Setting the data phase to 17 for uplink 20 07:55:33:setup_element:INFO: Setting the data phase to 17 for uplink 21 07:55:33:setup_element:INFO: Setting the data phase to 18 for uplink 22 07:55:33:setup_element:INFO: Setting the data phase to 17 for uplink 23 07:55:33:setup_element:INFO: Setting the data phase to 25 for uplink 24 07:55:33:setup_element:INFO: Setting the data phase to 29 for uplink 25 07:55:33:setup_element:INFO: Setting the data phase to 28 for uplink 26 07:55:33:setup_element:INFO: Setting the data phase to 33 for uplink 27 07:55:33:setup_element:INFO: Setting the data phase to 34 for uplink 28 07:55:33:setup_element:INFO: Setting the data phase to 37 for uplink 29 07:55:33:setup_element:INFO: Setting the data phase to 38 for uplink 30 07:55:33:setup_element:INFO: Setting the data phase to 38 for uplink 31 07:55:33:setup_element:INFO: Beginning SMX ASICs map scan 07:55:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:55:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:55:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:55:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:55:33:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 07:55:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 07:55:33:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 07:55:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 07:55:34:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 07:55:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 07:55:34:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 07:55:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 07:55:34:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 07:55:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 07:55:34:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 07:55:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 07:55:34:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 07:55:34:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 07:55:35:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 07:55:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 07:55:35:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 07:55:36:setup_element:INFO: Performing Elink synchronization 07:55:36:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 07:55:36:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 07:55:36:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 07:55:36:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 07:55:36:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 07:55:36:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 07:55:37:febtest:INFO: Init all SMX (CSA): 30 07:55:51:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:55:51:febtest:INFO: 23-00 | XA-000-08-003-000-005-069-10 | 44.1 | 1135.9 07:55:51:febtest:INFO: 30-01 | XA-000-08-003-000-005-074-10 | 47.3 | 1118.1 07:55:51:febtest:INFO: 21-02 | XA-000-08-003-000-005-065-10 | 34.6 | 1177.4 07:55:51:febtest:INFO: 28-03 | XA-000-08-003-000-005-072-10 | 44.1 | 1130.0 07:55:52:febtest:INFO: 19-04 | XA-000-08-003-000-005-066-10 | 25.1 | 1212.7 07:55:52:febtest:INFO: 26-05 | XA-000-08-003-000-005-071-10 | 28.2 | 1183.3 07:55:52:febtest:INFO: 17-06 | XA-000-08-003-000-005-067-10 | 25.1 | 1218.6 07:55:52:febtest:INFO: 24-07 | XA-000-08-003-000-005-070-10 | 40.9 | 1135.9 07:55:53:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 07:55:55:ST3_smx:INFO: chip: 23-0 44.073563 C 1147.806000 mV 07:55:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:55:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:55:55:ST3_smx:INFO: Electrons 07:55:55:ST3_smx:INFO: # loops 0 07:55:57:ST3_smx:INFO: # loops 1 07:55:58:ST3_smx:INFO: # loops 2 07:56:00:ST3_smx:INFO: Total # of broken channels: 0 07:56:00:ST3_smx:INFO: List of broken channels: [] 07:56:00:ST3_smx:INFO: Total # of broken channels: 0 07:56:00:ST3_smx:INFO: List of broken channels: [] 07:56:02:ST3_smx:INFO: chip: 30-1 47.250730 C 1129.995435 mV 07:56:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:02:ST3_smx:INFO: Electrons 07:56:02:ST3_smx:INFO: # loops 0 07:56:03:ST3_smx:INFO: # loops 1 07:56:05:ST3_smx:INFO: # loops 2 07:56:06:ST3_smx:INFO: Total # of broken channels: 0 07:56:06:ST3_smx:INFO: List of broken channels: [] 07:56:06:ST3_smx:INFO: Total # of broken channels: 0 07:56:06:ST3_smx:INFO: List of broken channels: [] 07:56:08:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV 07:56:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:08:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:08:ST3_smx:INFO: Electrons 07:56:08:ST3_smx:INFO: # loops 0 07:56:10:ST3_smx:INFO: # loops 1 07:56:11:ST3_smx:INFO: # loops 2 07:56:13:ST3_smx:INFO: Total # of broken channels: 0 07:56:13:ST3_smx:INFO: List of broken channels: [] 07:56:13:ST3_smx:INFO: Total # of broken channels: 0 07:56:13:ST3_smx:INFO: List of broken channels: [] 07:56:14:ST3_smx:INFO: chip: 28-3 44.073563 C 1141.874115 mV 07:56:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:14:ST3_smx:INFO: Electrons 07:56:14:ST3_smx:INFO: # loops 0 07:56:16:ST3_smx:INFO: # loops 1 07:56:18:ST3_smx:INFO: # loops 2 07:56:19:ST3_smx:INFO: Total # of broken channels: 0 07:56:19:ST3_smx:INFO: List of broken channels: [] 07:56:19:ST3_smx:INFO: Total # of broken channels: 0 07:56:19:ST3_smx:INFO: List of broken channels: [] 07:56:21:ST3_smx:INFO: chip: 19-4 25.062742 C 1218.600960 mV 07:56:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:21:ST3_smx:INFO: Electrons 07:56:21:ST3_smx:INFO: # loops 0 07:56:22:ST3_smx:INFO: # loops 1 07:56:24:ST3_smx:INFO: # loops 2 07:56:25:ST3_smx:INFO: Total # of broken channels: 0 07:56:25:ST3_smx:INFO: List of broken channels: [] 07:56:25:ST3_smx:INFO: Total # of broken channels: 0 07:56:25:ST3_smx:INFO: List of broken channels: [] 07:56:27:ST3_smx:INFO: chip: 26-5 31.389742 C 1189.190035 mV 07:56:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:27:ST3_smx:INFO: Electrons 07:56:27:ST3_smx:INFO: # loops 0 07:56:29:ST3_smx:INFO: # loops 1 07:56:30:ST3_smx:INFO: # loops 2 07:56:32:ST3_smx:INFO: Total # of broken channels: 0 07:56:32:ST3_smx:INFO: List of broken channels: [] 07:56:32:ST3_smx:INFO: Total # of broken channels: 0 07:56:32:ST3_smx:INFO: List of broken channels: [] 07:56:33:ST3_smx:INFO: chip: 17-6 28.225000 C 1224.468235 mV 07:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:33:ST3_smx:INFO: Electrons 07:56:33:ST3_smx:INFO: # loops 0 07:56:35:ST3_smx:INFO: # loops 1 07:56:37:ST3_smx:INFO: # loops 2 07:56:38:ST3_smx:INFO: Total # of broken channels: 0 07:56:38:ST3_smx:INFO: List of broken channels: [] 07:56:38:ST3_smx:INFO: Total # of broken channels: 0 07:56:38:ST3_smx:INFO: List of broken channels: [] 07:56:40:ST3_smx:INFO: chip: 24-7 44.073563 C 1147.806000 mV 07:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 07:56:40:ST3_smx:INFO: Electrons 07:56:40:ST3_smx:INFO: # loops 0 07:56:41:ST3_smx:INFO: # loops 1 07:56:43:ST3_smx:INFO: # loops 2 07:56:45:ST3_smx:INFO: Total # of broken channels: 0 07:56:45:ST3_smx:INFO: List of broken channels: [] 07:56:45:ST3_smx:INFO: Total # of broken channels: 0 07:56:45:ST3_smx:INFO: List of broken channels: [] 07:56:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 07:56:45:febtest:INFO: 23-00 | XA-000-08-003-000-005-069-10 | 47.3 | 1171.5 07:56:45:febtest:INFO: 30-01 | XA-000-08-003-000-005-074-10 | 47.3 | 1153.7 07:56:46:febtest:INFO: 21-02 | XA-000-08-003-000-005-065-10 | 34.6 | 1212.7 07:56:46:febtest:INFO: 28-03 | XA-000-08-003-000-005-072-10 | 47.3 | 1159.7 07:56:46:febtest:INFO: 19-04 | XA-000-08-003-000-005-066-10 | 28.2 | 1236.2 07:56:46:febtest:INFO: 26-05 | XA-000-08-003-000-005-071-10 | 34.6 | 1212.7 07:56:46:febtest:INFO: 17-06 | XA-000-08-003-000-005-067-10 | 28.2 | 1242.0 07:56:47:febtest:INFO: 24-07 | XA-000-08-003-000-005-070-10 | 44.1 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_30-07_55_25 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4057| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.5750', '1.850', '2.3890'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0660', '1.850', '2.5370'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0440', '1.850', '0.5213']