
FEB_4058 30.07.24 10:36:52
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10:36:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:36:52:ST3_Shared:INFO: FEB-Microcable 10:36:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 10:36:52:febtest:INFO: Testing FEB with SN 4058 10:36:54:smx_tester:INFO: Scanning setup 10:36:54:elinks:INFO: Disabling clock on downlink 0 10:36:54:elinks:INFO: Disabling clock on downlink 1 10:36:54:elinks:INFO: Disabling clock on downlink 2 10:36:54:elinks:INFO: Disabling clock on downlink 3 10:36:54:elinks:INFO: Disabling clock on downlink 4 10:36:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 10:36:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:54:elinks:INFO: Disabling clock on downlink 0 10:36:54:elinks:INFO: Disabling clock on downlink 1 10:36:54:elinks:INFO: Disabling clock on downlink 2 10:36:54:elinks:INFO: Disabling clock on downlink 3 10:36:54:elinks:INFO: Disabling clock on downlink 4 10:36:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 10:36:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:54:elinks:INFO: Disabling clock on downlink 0 10:36:54:elinks:INFO: Disabling clock on downlink 1 10:36:54:elinks:INFO: Disabling clock on downlink 2 10:36:54:elinks:INFO: Disabling clock on downlink 3 10:36:54:elinks:INFO: Disabling clock on downlink 4 10:36:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 10:36:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 10:36:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:54:elinks:INFO: Disabling clock on downlink 0 10:36:54:elinks:INFO: Disabling clock on downlink 1 10:36:54:elinks:INFO: Disabling clock on downlink 2 10:36:54:elinks:INFO: Disabling clock on downlink 3 10:36:54:elinks:INFO: Disabling clock on downlink 4 10:36:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 10:36:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:54:elinks:INFO: Disabling clock on downlink 0 10:36:54:elinks:INFO: Disabling clock on downlink 1 10:36:54:elinks:INFO: Disabling clock on downlink 2 10:36:54:elinks:INFO: Disabling clock on downlink 3 10:36:54:elinks:INFO: Disabling clock on downlink 4 10:36:54:setup_element:INFO: Checking SOS, encoding_mode: SOS 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 10:36:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 10:36:54:setup_element:INFO: Scanning clock phase 10:36:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:36:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2 10:36:55:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXX__________ Clock Delay: 27 10:36:55:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXX__________ Clock Delay: 27 10:36:55:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:36:55:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________XXXXXXX__________ Clock Delay: 26 10:36:55:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXX____________ Clock Delay: 25 10:36:55:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXX____________ Clock Delay: 25 10:36:55:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________XXXXXX_____________ Clock Delay: 23 10:36:55:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________XXXXXX_____________ Clock Delay: 23 10:36:55:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 2 10:36:55:setup_element:INFO: Scanning data phases 10:36:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:36:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:00:setup_element:INFO: Data phase scan results for group 0, downlink 2 10:37:00:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________ Data delay found: 29 10:37:00:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________ Data delay found: 32 10:37:00:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________ Data delay found: 30 10:37:00:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________ Data delay found: 34 10:37:00:setup_element:INFO: Eye window for uplink 28: __________XXXXXXX____XXXXXXXXXXXXXXXXXXX Data delay found: 4 10:37:00:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 10:37:00:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXXX_____________________ Data delay found: 34 10:37:00:setup_element:INFO: Eye window for uplink 31: ____________XXXXXX______________________ Data delay found: 34 10:37:00:setup_element:INFO: Setting the data phase to 29 for uplink 24 10:37:00:setup_element:INFO: Setting the data phase to 32 for uplink 25 10:37:00:setup_element:INFO: Setting the data phase to 30 for uplink 26 10:37:00:setup_element:INFO: Setting the data phase to 34 for uplink 27 10:37:00:setup_element:INFO: Setting the data phase to 4 for uplink 28 10:37:00:setup_element:INFO: Setting the data phase to 6 for uplink 29 10:37:00:setup_element:INFO: Setting the data phase to 34 for uplink 30 10:37:00:setup_element:INFO: Setting the data phase to 34 for uplink 31 10:37:00:setup_element:INFO: Beginning SMX ASICs map scan 10:37:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:37:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:37:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:37:00:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 10:37:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 10:37:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 10:37:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 10:37:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 10:37:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 10:37:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 10:37:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 10:37:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 10:37:02:setup_element:INFO: Performing Elink synchronization 10:37:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 10:37:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 10:37:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 10:37:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 10:37:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 10:37:02:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 10:37:03:febtest:INFO: Init all SMX (CSA): 30 10:37:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:37:11:febtest:INFO: 30-01 | XA-000-08-003-000-004-185-01 | 28.2 | 1171.5 10:37:11:febtest:INFO: 28-03 | XA-000-08-003-000-004-184-01 | 34.6 | 1147.8 10:37:11:febtest:INFO: 26-05 | XA-000-08-003-000-005-137-05 | 31.4 | 1165.6 10:37:11:febtest:INFO: 24-07 | XA-000-08-003-000-005-061-06 | 31.4 | 1159.7 10:37:12:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 10:37:14:ST3_smx:INFO: chip: 30-1 28.225000 C 1183.292940 mV 10:37:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:14:ST3_smx:INFO: Electrons 10:37:14:ST3_smx:INFO: # loops 0 10:37:16:ST3_smx:INFO: # loops 1 10:37:18:ST3_smx:INFO: # loops 2 10:37:19:ST3_smx:INFO: Total # of broken channels: 0 10:37:19:ST3_smx:INFO: List of broken channels: [] 10:37:19:ST3_smx:INFO: Total # of broken channels: 0 10:37:19:ST3_smx:INFO: List of broken channels: [] 10:37:21:ST3_smx:INFO: chip: 28-3 37.726682 C 1159.654860 mV 10:37:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:21:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:21:ST3_smx:INFO: Electrons 10:37:21:ST3_smx:INFO: # loops 0 10:37:23:ST3_smx:INFO: # loops 1 10:37:24:ST3_smx:INFO: # loops 2 10:37:26:ST3_smx:INFO: Total # of broken channels: 0 10:37:26:ST3_smx:INFO: List of broken channels: [] 10:37:26:ST3_smx:INFO: Total # of broken channels: 0 10:37:26:ST3_smx:INFO: List of broken channels: [] 10:37:27:ST3_smx:INFO: chip: 26-5 31.389742 C 1171.483840 mV 10:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:27:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:27:ST3_smx:INFO: Electrons 10:37:27:ST3_smx:INFO: # loops 0 10:37:29:ST3_smx:INFO: # loops 1 10:37:30:ST3_smx:INFO: # loops 2 10:37:32:ST3_smx:INFO: Total # of broken channels: 0 10:37:32:ST3_smx:INFO: List of broken channels: [] 10:37:32:ST3_smx:INFO: Total # of broken channels: 0 10:37:32:ST3_smx:INFO: List of broken channels: [] 10:37:33:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV 10:37:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:33:ST3_discr_histo:WARNING: Not enough entries for fit!!! 10:37:33:ST3_smx:INFO: Electrons 10:37:33:ST3_smx:INFO: # loops 0 10:37:35:ST3_smx:INFO: # loops 1 10:37:37:ST3_smx:INFO: # loops 2 10:37:38:ST3_smx:INFO: Total # of broken channels: 0 10:37:38:ST3_smx:INFO: List of broken channels: [] 10:37:38:ST3_smx:INFO: Total # of broken channels: 0 10:37:38:ST3_smx:INFO: List of broken channels: [] 10:37:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 10:37:39:febtest:INFO: 30-01 | XA-000-08-003-000-004-185-01 | 28.2 | 1206.9 10:37:39:febtest:INFO: 28-03 | XA-000-08-003-000-004-184-01 | 37.7 | 1177.4 10:37:39:febtest:INFO: 26-05 | XA-000-08-003-000-005-137-05 | 31.4 | 1195.1 10:37:39:febtest:INFO: 24-07 | XA-000-08-003-000-005-061-06 | 34.6 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_07_30-10_36_52 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4058| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8249', '1.849', '1.3300'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '1.3010'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9899', '1.850', '0.2663']