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FEB_4058 31.07.24 07:53:40
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07:53:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:53:40:ST3_Shared:INFO: FEB-Microcable
07:53:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:53:40:febtest:INFO: Testing FEB with SN 4058
07:53:42:smx_tester:INFO: Scanning setup
07:53:42:elinks:INFO: Disabling clock on downlink 0
07:53:42:elinks:INFO: Disabling clock on downlink 1
07:53:42:elinks:INFO: Disabling clock on downlink 2
07:53:42:elinks:INFO: Disabling clock on downlink 3
07:53:42:elinks:INFO: Disabling clock on downlink 4
07:53:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:53:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:53:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:53:42:elinks:INFO: Disabling clock on downlink 0
07:53:42:elinks:INFO: Disabling clock on downlink 1
07:53:42:elinks:INFO: Disabling clock on downlink 2
07:53:42:elinks:INFO: Disabling clock on downlink 3
07:53:42:elinks:INFO: Disabling clock on downlink 4
07:53:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:53:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:53:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:53:42:elinks:INFO: Disabling clock on downlink 0
07:53:42:elinks:INFO: Disabling clock on downlink 1
07:53:42:elinks:INFO: Disabling clock on downlink 2
07:53:42:elinks:INFO: Disabling clock on downlink 3
07:53:42:elinks:INFO: Disabling clock on downlink 4
07:53:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:53:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:53:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:53:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:53:42:elinks:INFO: Disabling clock on downlink 0
07:53:42:elinks:INFO: Disabling clock on downlink 1
07:53:42:elinks:INFO: Disabling clock on downlink 2
07:53:42:elinks:INFO: Disabling clock on downlink 3
07:53:42:elinks:INFO: Disabling clock on downlink 4
07:53:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:53:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:53:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:53:42:elinks:INFO: Disabling clock on downlink 0
07:53:42:elinks:INFO: Disabling clock on downlink 1
07:53:42:elinks:INFO: Disabling clock on downlink 2
07:53:42:elinks:INFO: Disabling clock on downlink 3
07:53:42:elinks:INFO: Disabling clock on downlink 4
07:53:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:53:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:53:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:53:43:setup_element:INFO: Scanning clock phase
07:53:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:53:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:53:43:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:53:43:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
07:53:43:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
07:53:43:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:53:43:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:53:43:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
07:53:43:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
07:53:43:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXX_________
Clock Delay: 28
07:53:43:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXX_________
Clock Delay: 28
07:53:43:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
07:53:43:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:53:43:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:53:43:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
07:53:43:setup_element:INFO: Scanning data phases
07:53:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:53:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:53:48:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:53:48:setup_element:INFO: Eye window for uplink 16: XXXX______________________________X_XXXX
Data delay found: 18
07:53:48:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXX__
Data delay found: 15
07:53:48:setup_element:INFO: Eye window for uplink 18: XXXX_______________________________XXXXX
Data delay found: 19
07:53:48:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXXX_
Data delay found: 15
07:53:48:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
07:53:48:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
07:53:48:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX
Data delay found: 20
07:53:48:setup_element:INFO: Eye window for uplink 23: XXXXXX__________________________XXXXXXXX
Data delay found: 18
07:53:48:setup_element:INFO: Eye window for uplink 24: _XXXXXXXXX______________________________
Data delay found: 25
07:53:48:setup_element:INFO: Eye window for uplink 25: ______XXXXXXX___________________________
Data delay found: 29
07:53:48:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXX___________________________
Data delay found: 28
07:53:48:setup_element:INFO: Eye window for uplink 27: __________XXXXXXX_______________________
Data delay found: 33
07:53:48:setup_element:INFO: Eye window for uplink 28: __________XXXXXXX_______________________
Data delay found: 33
07:53:48:setup_element:INFO: Eye window for uplink 29: ____________XXXXXXXX____________________
Data delay found: 35
07:53:48:setup_element:INFO: Eye window for uplink 30: __________XXXXXXXX______________________
Data delay found: 33
07:53:48:setup_element:INFO: Eye window for uplink 31: ___________XXXXXXX______________________
Data delay found: 34
07:53:48:setup_element:INFO: Setting the data phase to 18 for uplink 16
07:53:48:setup_element:INFO: Setting the data phase to 15 for uplink 17
07:53:48:setup_element:INFO: Setting the data phase to 19 for uplink 18
07:53:48:setup_element:INFO: Setting the data phase to 15 for uplink 19
07:53:48:setup_element:INFO: Setting the data phase to 16 for uplink 20
07:53:48:setup_element:INFO: Setting the data phase to 14 for uplink 21
07:53:48:setup_element:INFO: Setting the data phase to 20 for uplink 22
07:53:48:setup_element:INFO: Setting the data phase to 18 for uplink 23
07:53:48:setup_element:INFO: Setting the data phase to 25 for uplink 24
07:53:48:setup_element:INFO: Setting the data phase to 29 for uplink 25
07:53:48:setup_element:INFO: Setting the data phase to 28 for uplink 26
07:53:48:setup_element:INFO: Setting the data phase to 33 for uplink 27
07:53:48:setup_element:INFO: Setting the data phase to 33 for uplink 28
07:53:48:setup_element:INFO: Setting the data phase to 35 for uplink 29
07:53:48:setup_element:INFO: Setting the data phase to 33 for uplink 30
07:53:48:setup_element:INFO: Setting the data phase to 34 for uplink 31
07:53:48:setup_element:INFO: Beginning SMX ASICs map scan
07:53:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:53:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:53:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:53:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:53:48:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:53:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:53:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:53:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:53:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:53:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:53:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:53:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:53:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:53:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:53:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:53:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:53:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:53:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:53:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:53:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:53:49:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:53:51:setup_element:INFO: Performing Elink synchronization
07:53:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:53:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:53:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:53:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:53:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:53:51:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:53:52:febtest:INFO: Init all SMX (CSA): 30
07:54:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:54:07:febtest:INFO: 23-00 | XA-000-08-003-000-005-059-06 | 34.6 | 1171.5
07:54:07:febtest:INFO: 30-01 | XA-000-08-003-000-004-185-01 | 31.4 | 1165.6
07:54:07:febtest:INFO: 21-02 | XA-000-08-003-000-005-060-06 | 40.9 | 1141.9
07:54:07:febtest:INFO: 28-03 | XA-000-08-003-000-004-184-01 | 37.7 | 1147.8
07:54:07:febtest:INFO: 19-04 | XA-000-08-003-000-005-058-06 | 31.4 | 1183.3
07:54:08:febtest:INFO: 26-05 | XA-000-08-003-000-005-137-05 | 34.6 | 1159.7
07:54:08:febtest:INFO: 17-06 | XA-000-08-003-000-005-057-06 | 31.4 | 1177.4
07:54:08:febtest:INFO: 24-07 | XA-000-08-003-000-005-061-06 | 34.6 | 1153.7
07:54:09:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:54:11:ST3_smx:INFO: chip: 23-0 34.556970 C 1189.190035 mV
07:54:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:11:ST3_smx:INFO: Electrons
07:54:11:ST3_smx:INFO: # loops 0
07:54:13:ST3_smx:INFO: # loops 1
07:54:15:ST3_smx:INFO: # loops 2
07:54:17:ST3_smx:INFO: Total # of broken channels: 0
07:54:17:ST3_smx:INFO: List of broken channels: []
07:54:17:ST3_smx:INFO: Total # of broken channels: 0
07:54:17:ST3_smx:INFO: List of broken channels: []
07:54:18:ST3_smx:INFO: chip: 30-1 31.389742 C 1177.390875 mV
07:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:18:ST3_smx:INFO: Electrons
07:54:18:ST3_smx:INFO: # loops 0
07:54:20:ST3_smx:INFO: # loops 1
07:54:21:ST3_smx:INFO: # loops 2
07:54:23:ST3_smx:INFO: Total # of broken channels: 0
07:54:23:ST3_smx:INFO: List of broken channels: []
07:54:23:ST3_smx:INFO: Total # of broken channels: 0
07:54:23:ST3_smx:INFO: List of broken channels: []
07:54:25:ST3_smx:INFO: chip: 21-2 40.898880 C 1159.654860 mV
07:54:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:25:ST3_smx:INFO: Electrons
07:54:25:ST3_smx:INFO: # loops 0
07:54:26:ST3_smx:INFO: # loops 1
07:54:28:ST3_smx:INFO: # loops 2
07:54:30:ST3_smx:INFO: Total # of broken channels: 0
07:54:30:ST3_smx:INFO: List of broken channels: []
07:54:30:ST3_smx:INFO: Total # of broken channels: 0
07:54:30:ST3_smx:INFO: List of broken channels: []
07:54:31:ST3_smx:INFO: chip: 28-3 37.726682 C 1159.654860 mV
07:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:31:ST3_smx:INFO: Electrons
07:54:31:ST3_smx:INFO: # loops 0
07:54:33:ST3_smx:INFO: # loops 1
07:54:34:ST3_smx:INFO: # loops 2
07:54:36:ST3_smx:INFO: Total # of broken channels: 0
07:54:36:ST3_smx:INFO: List of broken channels: []
07:54:36:ST3_smx:INFO: Total # of broken channels: 0
07:54:36:ST3_smx:INFO: List of broken channels: []
07:54:38:ST3_smx:INFO: chip: 19-4 31.389742 C 1195.082160 mV
07:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:38:ST3_smx:INFO: Electrons
07:54:38:ST3_smx:INFO: # loops 0
07:54:39:ST3_smx:INFO: # loops 1
07:54:41:ST3_smx:INFO: # loops 2
07:54:42:ST3_smx:INFO: Total # of broken channels: 0
07:54:42:ST3_smx:INFO: List of broken channels: []
07:54:42:ST3_smx:INFO: Total # of broken channels: 0
07:54:42:ST3_smx:INFO: List of broken channels: []
07:54:44:ST3_smx:INFO: chip: 26-5 34.556970 C 1171.483840 mV
07:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:44:ST3_smx:INFO: Electrons
07:54:44:ST3_smx:INFO: # loops 0
07:54:45:ST3_smx:INFO: # loops 1
07:54:47:ST3_smx:INFO: # loops 2
07:54:49:ST3_smx:INFO: Total # of broken channels: 0
07:54:49:ST3_smx:INFO: List of broken channels: []
07:54:49:ST3_smx:INFO: Total # of broken channels: 0
07:54:49:ST3_smx:INFO: List of broken channels: []
07:54:50:ST3_smx:INFO: chip: 17-6 34.556970 C 1189.190035 mV
07:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:50:ST3_smx:INFO: Electrons
07:54:50:ST3_smx:INFO: # loops 0
07:54:52:ST3_smx:INFO: # loops 1
07:54:54:ST3_smx:INFO: # loops 2
07:54:55:ST3_smx:INFO: Total # of broken channels: 0
07:54:55:ST3_smx:INFO: List of broken channels: []
07:54:55:ST3_smx:INFO: Total # of broken channels: 0
07:54:55:ST3_smx:INFO: List of broken channels: []
07:54:57:ST3_smx:INFO: chip: 24-7 37.726682 C 1165.571835 mV
07:54:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:54:57:ST3_smx:INFO: Electrons
07:54:57:ST3_smx:INFO: # loops 0
07:54:59:ST3_smx:INFO: # loops 1
07:55:00:ST3_smx:INFO: # loops 2
07:55:02:ST3_smx:INFO: Total # of broken channels: 0
07:55:02:ST3_smx:INFO: List of broken channels: []
07:55:02:ST3_smx:INFO: Total # of broken channels: 0
07:55:02:ST3_smx:INFO: List of broken channels: []
07:55:02:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:55:02:febtest:INFO: 23-00 | XA-000-08-003-000-005-059-06 | 34.6 | 1253.7
07:55:02:febtest:INFO: 30-01 | XA-000-08-003-000-004-185-01 | 31.4 | 1201.0
07:55:03:febtest:INFO: 21-02 | XA-000-08-003-000-005-060-06 | 40.9 | 1177.4
07:55:03:febtest:INFO: 28-03 | XA-000-08-003-000-004-184-01 | 40.9 | 1183.3
07:55:03:febtest:INFO: 19-04 | XA-000-08-003-000-005-058-06 | 34.6 | 1212.7
07:55:03:febtest:INFO: 26-05 | XA-000-08-003-000-005-137-05 | 37.7 | 1189.2
07:55:04:febtest:INFO: 17-06 | XA-000-08-003-000-005-057-06 | 34.6 | 1212.7
07:55:04:febtest:INFO: 24-07 | XA-000-08-003-000-005-061-06 | 40.9 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_31-07_53_40
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4058| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.5100', '1.850', '2.7990']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9950', '1.850', '2.6000']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9660', '1.850', '0.5263']