FEB_4059 31.07.24 10:16:19
Info
10:16:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:16:19:ST3_Shared:INFO: FEB-Microcable
10:16:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:16:19:febtest:INFO: Testing FEB with SN 4059
10:16:21:smx_tester:INFO: Scanning setup
10:16:21:elinks:INFO: Disabling clock on downlink 0
10:16:21:elinks:INFO: Disabling clock on downlink 1
10:16:21:elinks:INFO: Disabling clock on downlink 2
10:16:21:elinks:INFO: Disabling clock on downlink 3
10:16:21:elinks:INFO: Disabling clock on downlink 4
10:16:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:16:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:16:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:16:21:elinks:INFO: Disabling clock on downlink 0
10:16:21:elinks:INFO: Disabling clock on downlink 1
10:16:21:elinks:INFO: Disabling clock on downlink 2
10:16:21:elinks:INFO: Disabling clock on downlink 3
10:16:21:elinks:INFO: Disabling clock on downlink 4
10:16:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:16:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:16:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:16:21:elinks:INFO: Disabling clock on downlink 0
10:16:21:elinks:INFO: Disabling clock on downlink 1
10:16:21:elinks:INFO: Disabling clock on downlink 2
10:16:21:elinks:INFO: Disabling clock on downlink 3
10:16:21:elinks:INFO: Disabling clock on downlink 4
10:16:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:16:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:16:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:16:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:16:22:elinks:INFO: Disabling clock on downlink 0
10:16:22:elinks:INFO: Disabling clock on downlink 1
10:16:22:elinks:INFO: Disabling clock on downlink 2
10:16:22:elinks:INFO: Disabling clock on downlink 3
10:16:22:elinks:INFO: Disabling clock on downlink 4
10:16:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:16:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:16:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:16:22:elinks:INFO: Disabling clock on downlink 0
10:16:22:elinks:INFO: Disabling clock on downlink 1
10:16:22:elinks:INFO: Disabling clock on downlink 2
10:16:22:elinks:INFO: Disabling clock on downlink 3
10:16:22:elinks:INFO: Disabling clock on downlink 4
10:16:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:16:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:16:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:16:22:setup_element:INFO: Scanning clock phase
10:16:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:16:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:16:22:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:16:22:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
10:16:22:setup_element:INFO: Scanning data phases
10:16:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:16:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:27:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:16:27:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:16:27:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________
Data delay found: 32
10:16:27:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX_______________XXXXXXXXXXXX
Data delay found: 20
10:16:27:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXX_________XXXXXXXXXXXX
Data delay found: 4
10:16:27:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
10:16:27:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXX_________________
Data delay found: 38
10:16:27:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXXXX_________XXXXXXXX
Data delay found: 6
10:16:27:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXXX_________XXXXXXXX
Data delay found: 6
10:16:27:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:16:27:setup_element:INFO: Setting the data phase to 32 for uplink 25
10:16:27:setup_element:INFO: Setting the data phase to 20 for uplink 26
10:16:27:setup_element:INFO: Setting the data phase to 4 for uplink 27
10:16:27:setup_element:INFO: Setting the data phase to 34 for uplink 28
10:16:27:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:16:27:setup_element:INFO: Setting the data phase to 6 for uplink 30
10:16:27:setup_element:INFO: Setting the data phase to 6 for uplink 31
10:16:27:setup_element:INFO: Beginning SMX ASICs map scan
10:16:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:16:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:16:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:16:27:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:16:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:16:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:16:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:16:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:16:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:16:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:16:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:16:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:16:30:setup_element:INFO: Performing Elink synchronization
10:16:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:16:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:16:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:16:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:16:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:16:30:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:16:30:febtest:INFO: Init all SMX (CSA): 30
10:16:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:16:39:febtest:INFO: 30-01 | XA-000-08-003-000-005-024-08 | 28.2 | 1183.3
10:16:39:febtest:INFO: 28-03 | XA-000-08-003-000-005-023-08 | 44.1 | 1130.0
10:16:40:febtest:INFO: 26-05 | XA-000-08-003-000-005-021-08 | 25.1 | 1201.0
10:16:40:febtest:INFO: 24-07 | XA-000-08-003-000-005-020-08 | 34.6 | 1171.5
10:16:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:16:43:ST3_smx:INFO: chip: 30-1 28.225000 C 1195.082160 mV
10:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:43:ST3_smx:INFO: Electrons
10:16:43:ST3_smx:INFO: # loops 0
10:16:44:ST3_smx:INFO: # loops 1
10:16:46:ST3_smx:INFO: # loops 2
10:16:47:ST3_smx:INFO: Total # of broken channels: 0
10:16:47:ST3_smx:INFO: List of broken channels: []
10:16:47:ST3_smx:INFO: Total # of broken channels: 0
10:16:47:ST3_smx:INFO: List of broken channels: []
10:16:49:ST3_smx:INFO: chip: 28-3 44.073563 C 1135.937260 mV
10:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:49:ST3_smx:INFO: Electrons
10:16:49:ST3_smx:INFO: # loops 0
10:16:51:ST3_smx:INFO: # loops 1
10:16:53:ST3_smx:INFO: # loops 2
10:16:55:ST3_smx:INFO: Total # of broken channels: 0
10:16:55:ST3_smx:INFO: List of broken channels: []
10:16:55:ST3_smx:INFO: Total # of broken channels: 0
10:16:55:ST3_smx:INFO: List of broken channels: []
10:16:57:ST3_smx:INFO: chip: 26-5 28.225000 C 1212.728715 mV
10:16:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:16:57:ST3_smx:INFO: Electrons
10:16:57:ST3_smx:INFO: # loops 0
10:16:58:ST3_smx:INFO: # loops 1
10:17:00:ST3_smx:INFO: # loops 2
10:17:02:ST3_smx:INFO: Total # of broken channels: 0
10:17:02:ST3_smx:INFO: List of broken channels: []
10:17:02:ST3_smx:INFO: Total # of broken channels: 0
10:17:02:ST3_smx:INFO: List of broken channels: []
10:17:04:ST3_smx:INFO: chip: 24-7 37.726682 C 1177.390875 mV
10:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:17:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:17:04:ST3_smx:INFO: Electrons
10:17:04:ST3_smx:INFO: # loops 0
10:17:06:ST3_smx:INFO: # loops 1
10:17:08:ST3_smx:INFO: # loops 2
10:17:10:ST3_smx:INFO: Total # of broken channels: 0
10:17:10:ST3_smx:INFO: List of broken channels: []
10:17:10:ST3_smx:INFO: Total # of broken channels: 0
10:17:10:ST3_smx:INFO: List of broken channels: []
10:17:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:17:11:febtest:INFO: 30-01 | XA-000-08-003-000-005-024-08 | 28.2 | 1212.7
10:17:11:febtest:INFO: 28-03 | XA-000-08-003-000-005-023-08 | 47.3 | 1159.7
10:17:11:febtest:INFO: 26-05 | XA-000-08-003-000-005-021-08 | 28.2 | 1230.3
10:17:11:febtest:INFO: 24-07 | XA-000-08-003-000-005-020-08 | 40.9 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_31-10_16_19
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4059| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7230', '1.849', '1.2650']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9794', '1.850', '1.2640']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9662', '1.850', '0.2595']