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FEB_4059 01.08.24 07:31:20
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07:31:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:31:20:ST3_Shared:INFO: FEB-Microcable
07:31:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:31:20:febtest:INFO: Testing FEB with SN 4059
07:31:21:smx_tester:INFO: Scanning setup
07:31:21:elinks:INFO: Disabling clock on downlink 0
07:31:21:elinks:INFO: Disabling clock on downlink 1
07:31:21:elinks:INFO: Disabling clock on downlink 2
07:31:21:elinks:INFO: Disabling clock on downlink 3
07:31:21:elinks:INFO: Disabling clock on downlink 4
07:31:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:31:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:31:22:elinks:INFO: Disabling clock on downlink 0
07:31:22:elinks:INFO: Disabling clock on downlink 1
07:31:22:elinks:INFO: Disabling clock on downlink 2
07:31:22:elinks:INFO: Disabling clock on downlink 3
07:31:22:elinks:INFO: Disabling clock on downlink 4
07:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:31:22:elinks:INFO: Disabling clock on downlink 0
07:31:22:elinks:INFO: Disabling clock on downlink 1
07:31:22:elinks:INFO: Disabling clock on downlink 2
07:31:22:elinks:INFO: Disabling clock on downlink 3
07:31:22:elinks:INFO: Disabling clock on downlink 4
07:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:31:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:31:22:elinks:INFO: Disabling clock on downlink 0
07:31:22:elinks:INFO: Disabling clock on downlink 1
07:31:22:elinks:INFO: Disabling clock on downlink 2
07:31:22:elinks:INFO: Disabling clock on downlink 3
07:31:22:elinks:INFO: Disabling clock on downlink 4
07:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:31:22:elinks:INFO: Disabling clock on downlink 0
07:31:22:elinks:INFO: Disabling clock on downlink 1
07:31:22:elinks:INFO: Disabling clock on downlink 2
07:31:22:elinks:INFO: Disabling clock on downlink 3
07:31:22:elinks:INFO: Disabling clock on downlink 4
07:31:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:31:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:31:22:setup_element:INFO: Scanning clock phase
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:31:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:31:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:31:22:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________XXXXXX___________
Clock Delay: 25
07:31:22:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________XXXXXX___________
Clock Delay: 25
07:31:22:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
07:31:22:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
07:31:22:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXX_________
Clock Delay: 28
07:31:22:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXX_________
Clock Delay: 28
07:31:22:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:31:22:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:31:22:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
07:31:22:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
07:31:22:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
07:31:22:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
07:31:22:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
07:31:22:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
07:31:22:setup_element:INFO: Eye window for uplink 30: ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:31:22:setup_element:INFO: Eye window for uplink 31: ____________________________________________________________________XXXXXX______
Clock Delay: 30
07:31:22:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
07:31:22:setup_element:INFO: Scanning data phases
07:31:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:31:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:31:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:31:28:setup_element:INFO: Eye window for uplink 16: X_________________________________XXXXXX
Data delay found: 17
07:31:28:setup_element:INFO: Eye window for uplink 17: ______________________________XXXXXX____
Data delay found: 12
07:31:28:setup_element:INFO: Eye window for uplink 18: X________________________________XXXXXXX
Data delay found: 16
07:31:28:setup_element:INFO: Eye window for uplink 19: ______________________________XXXXXX_X__
Data delay found: 13
07:31:28:setup_element:INFO: Eye window for uplink 20: XXX_______________________________X_XXXX
Data delay found: 18
07:31:28:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX
Data delay found: 17
07:31:28:setup_element:INFO: Eye window for uplink 22: XXXXXX_________________________________X
Data delay found: 22
07:31:28:setup_element:INFO: Eye window for uplink 23: XXXXXXXX____________________________XXXX
Data delay found: 21
07:31:28:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________
Data delay found: 29
07:31:28:setup_element:INFO: Eye window for uplink 25: _________XXXXXXXX_______________________
Data delay found: 32
07:31:28:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
07:31:28:setup_element:INFO: Eye window for uplink 27: __________X_XXXXXX______________________
Data delay found: 33
07:31:28:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXXXX___________________
Data delay found: 36
07:31:28:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXXX________________
Data delay found: 38
07:31:28:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXXXXX_______________
Data delay found: 39
07:31:28:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXX_______________
Data delay found: 0
07:31:28:setup_element:INFO: Setting the data phase to 17 for uplink 16
07:31:28:setup_element:INFO: Setting the data phase to 12 for uplink 17
07:31:28:setup_element:INFO: Setting the data phase to 16 for uplink 18
07:31:28:setup_element:INFO: Setting the data phase to 13 for uplink 19
07:31:28:setup_element:INFO: Setting the data phase to 18 for uplink 20
07:31:28:setup_element:INFO: Setting the data phase to 17 for uplink 21
07:31:28:setup_element:INFO: Setting the data phase to 22 for uplink 22
07:31:28:setup_element:INFO: Setting the data phase to 21 for uplink 23
07:31:28:setup_element:INFO: Setting the data phase to 29 for uplink 24
07:31:28:setup_element:INFO: Setting the data phase to 32 for uplink 25
07:31:28:setup_element:INFO: Setting the data phase to 30 for uplink 26
07:31:28:setup_element:INFO: Setting the data phase to 33 for uplink 27
07:31:28:setup_element:INFO: Setting the data phase to 36 for uplink 28
07:31:28:setup_element:INFO: Setting the data phase to 38 for uplink 29
07:31:28:setup_element:INFO: Setting the data phase to 39 for uplink 30
07:31:28:setup_element:INFO: Setting the data phase to 0 for uplink 31
07:31:28:setup_element:INFO: Beginning SMX ASICs map scan
07:31:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:31:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:31:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:31:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:31:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:31:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:31:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:31:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:31:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:31:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:31:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:31:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:31:28:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:31:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:31:28:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:31:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:31:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:31:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:31:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:31:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:31:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:31:30:setup_element:INFO: Performing Elink synchronization
07:31:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:31:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:31:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:31:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:31:30:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:31:30:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:31:31:febtest:INFO: Init all SMX (CSA): 30
07:31:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:31:45:febtest:INFO: 23-00 | XA-000-08-003-000-005-017-08 | 34.6 | 1171.5
07:31:45:febtest:INFO: 30-01 | XA-000-08-003-000-005-024-08 | 28.2 | 1177.4
07:31:45:febtest:INFO: 21-02 | XA-000-08-003-000-005-015-15 | 18.7 | 1224.5
07:31:45:febtest:INFO: 28-03 | XA-000-08-003-000-005-023-08 | 44.1 | 1124.0
07:31:46:febtest:INFO: 19-04 | XA-000-08-003-000-004-196-13 | 34.6 | 1177.4
07:31:46:febtest:INFO: 26-05 | XA-000-08-003-000-005-021-08 | 28.2 | 1201.0
07:31:46:febtest:INFO: 17-06 | XA-000-08-003-000-004-195-13 | 47.3 | 1135.9
07:31:46:febtest:INFO: 24-07 | XA-000-08-003-000-005-020-08 | 37.7 | 1165.6
07:31:47:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:31:49:ST3_smx:INFO: chip: 23-0 34.556970 C 1177.390875 mV
07:31:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:31:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:31:49:ST3_smx:INFO: Electrons
07:31:49:ST3_smx:INFO: # loops 0
07:31:51:ST3_smx:INFO: # loops 1
07:31:52:ST3_smx:INFO: # loops 2
07:31:54:ST3_smx:INFO: Total # of broken channels: 0
07:31:54:ST3_smx:INFO: List of broken channels: []
07:31:54:ST3_smx:INFO: Total # of broken channels: 0
07:31:54:ST3_smx:INFO: List of broken channels: []
07:31:56:ST3_smx:INFO: chip: 30-1 28.225000 C 1195.082160 mV
07:31:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:31:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:31:56:ST3_smx:INFO: Electrons
07:31:56:ST3_smx:INFO: # loops 0
07:31:58:ST3_smx:INFO: # loops 1
07:32:00:ST3_smx:INFO: # loops 2
07:32:01:ST3_smx:INFO: Total # of broken channels: 0
07:32:01:ST3_smx:INFO: List of broken channels: []
07:32:01:ST3_smx:INFO: Total # of broken channels: 0
07:32:01:ST3_smx:INFO: List of broken channels: []
07:32:03:ST3_smx:INFO: chip: 21-2 18.745682 C 1242.040240 mV
07:32:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:03:ST3_smx:INFO: Electrons
07:32:03:ST3_smx:INFO: # loops 0
07:32:05:ST3_smx:INFO: # loops 1
07:32:06:ST3_smx:INFO: # loops 2
07:32:08:ST3_smx:INFO: Total # of broken channels: 0
07:32:08:ST3_smx:INFO: List of broken channels: []
07:32:08:ST3_smx:INFO: Total # of broken channels: 0
07:32:08:ST3_smx:INFO: List of broken channels: []
07:32:10:ST3_smx:INFO: chip: 28-3 47.250730 C 1135.937260 mV
07:32:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:10:ST3_smx:INFO: Electrons
07:32:10:ST3_smx:INFO: # loops 0
07:32:11:ST3_smx:INFO: # loops 1
07:32:13:ST3_smx:INFO: # loops 2
07:32:15:ST3_smx:INFO: Total # of broken channels: 0
07:32:15:ST3_smx:INFO: List of broken channels: []
07:32:15:ST3_smx:INFO: Total # of broken channels: 0
07:32:15:ST3_smx:INFO: List of broken channels: []
07:32:16:ST3_smx:INFO: chip: 19-4 37.726682 C 1189.190035 mV
07:32:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:16:ST3_smx:INFO: Electrons
07:32:16:ST3_smx:INFO: # loops 0
07:32:18:ST3_smx:INFO: # loops 1
07:32:20:ST3_smx:INFO: # loops 2
07:32:21:ST3_smx:INFO: Total # of broken channels: 0
07:32:21:ST3_smx:INFO: List of broken channels: []
07:32:21:ST3_smx:INFO: Total # of broken channels: 0
07:32:21:ST3_smx:INFO: List of broken channels: []
07:32:23:ST3_smx:INFO: chip: 26-5 31.389742 C 1212.728715 mV
07:32:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:23:ST3_smx:INFO: Electrons
07:32:23:ST3_smx:INFO: # loops 0
07:32:25:ST3_smx:INFO: # loops 1
07:32:26:ST3_smx:INFO: # loops 2
07:32:28:ST3_smx:INFO: Total # of broken channels: 0
07:32:28:ST3_smx:INFO: List of broken channels: []
07:32:28:ST3_smx:INFO: Total # of broken channels: 0
07:32:28:ST3_smx:INFO: List of broken channels: []
07:32:29:ST3_smx:INFO: chip: 17-6 53.612520 C 1141.874115 mV
07:32:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:29:ST3_smx:INFO: Electrons
07:32:29:ST3_smx:INFO: # loops 0
07:32:31:ST3_smx:INFO: # loops 1
07:32:33:ST3_smx:INFO: # loops 2
07:32:35:ST3_smx:INFO: Total # of broken channels: 0
07:32:35:ST3_smx:INFO: List of broken channels: []
07:32:35:ST3_smx:INFO: Total # of broken channels: 0
07:32:35:ST3_smx:INFO: List of broken channels: []
07:32:36:ST3_smx:INFO: chip: 24-7 40.898880 C 1177.390875 mV
07:32:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:32:36:ST3_smx:INFO: Electrons
07:32:36:ST3_smx:INFO: # loops 0
07:32:38:ST3_smx:INFO: # loops 1
07:32:39:ST3_smx:INFO: # loops 2
07:32:41:ST3_smx:INFO: Total # of broken channels: 0
07:32:41:ST3_smx:INFO: List of broken channels: []
07:32:41:ST3_smx:INFO: Total # of broken channels: 0
07:32:41:ST3_smx:INFO: List of broken channels: []
07:32:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:32:42:febtest:INFO: 23-00 | XA-000-08-003-000-005-017-08 | 34.6 | 1201.0
07:32:42:febtest:INFO: 30-01 | XA-000-08-003-000-005-024-08 | 31.4 | 1218.6
07:32:42:febtest:INFO: 21-02 | XA-000-08-003-000-005-015-15 | 21.9 | 1259.6
07:32:42:febtest:INFO: 28-03 | XA-000-08-003-000-005-023-08 | 47.3 | 1159.7
07:32:42:febtest:INFO: 19-04 | XA-000-08-003-000-004-196-13 | 40.9 | 1212.7
07:32:43:febtest:INFO: 26-05 | XA-000-08-003-000-005-021-08 | 31.4 | 1230.3
07:32:43:febtest:INFO: 17-06 | XA-000-08-003-000-004-195-13 | 53.6 | 1159.7
07:32:43:febtest:INFO: 24-07 | XA-000-08-003-000-005-020-08 | 44.1 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_01-07_31_20
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4059| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '1.4970', '1.850', '2.2060']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9820', '1.850', '2.5480']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9560', '1.850', '0.5199']