
FEB_4060 01.08.24 14:17:01
TextEdit.txt
14:17:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:17:01:ST3_Shared:INFO: FEB-Microcable 14:17:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:17:01:febtest:INFO: Testing FEB with SN 4060 14:17:03:smx_tester:INFO: Scanning setup 14:17:03:elinks:INFO: Disabling clock on downlink 0 14:17:03:elinks:INFO: Disabling clock on downlink 1 14:17:03:elinks:INFO: Disabling clock on downlink 2 14:17:03:elinks:INFO: Disabling clock on downlink 3 14:17:03:elinks:INFO: Disabling clock on downlink 4 14:17:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:17:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:17:03:elinks:INFO: Disabling clock on downlink 0 14:17:03:elinks:INFO: Disabling clock on downlink 1 14:17:03:elinks:INFO: Disabling clock on downlink 2 14:17:03:elinks:INFO: Disabling clock on downlink 3 14:17:03:elinks:INFO: Disabling clock on downlink 4 14:17:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:17:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:17:03:elinks:INFO: Disabling clock on downlink 0 14:17:03:elinks:INFO: Disabling clock on downlink 1 14:17:03:elinks:INFO: Disabling clock on downlink 2 14:17:03:elinks:INFO: Disabling clock on downlink 3 14:17:03:elinks:INFO: Disabling clock on downlink 4 14:17:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:17:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:17:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:17:03:elinks:INFO: Disabling clock on downlink 0 14:17:03:elinks:INFO: Disabling clock on downlink 1 14:17:03:elinks:INFO: Disabling clock on downlink 2 14:17:03:elinks:INFO: Disabling clock on downlink 3 14:17:03:elinks:INFO: Disabling clock on downlink 4 14:17:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:17:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:17:03:elinks:INFO: Disabling clock on downlink 0 14:17:03:elinks:INFO: Disabling clock on downlink 1 14:17:03:elinks:INFO: Disabling clock on downlink 2 14:17:03:elinks:INFO: Disabling clock on downlink 3 14:17:03:elinks:INFO: Disabling clock on downlink 4 14:17:03:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:17:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:17:03:setup_element:INFO: Scanning clock phase 14:17:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:17:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:17:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:17:04:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 14:17:04:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 14:17:04:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 14:17:04:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:17:04:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 14:17:04:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 14:17:04:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2 14:17:04:setup_element:INFO: Scanning data phases 14:17:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:17:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:17:09:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:17:09:setup_element:INFO: Eye window for uplink 16: XXXX_________________________________XXX Data delay found: 20 14:17:09:setup_element:INFO: Eye window for uplink 17: XX_________________________________XXXXX Data delay found: 18 14:17:09:setup_element:INFO: Eye window for uplink 18: XXX_________________________________XXXX Data delay found: 19 14:17:09:setup_element:INFO: Eye window for uplink 19: X_______________________________XXXXXXXX Data delay found: 16 14:17:09:setup_element:INFO: Eye window for uplink 20: XX_________________________________XXXXX Data delay found: 18 14:17:09:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_ Data delay found: 15 14:17:09:setup_element:INFO: Eye window for uplink 22: XX__________________________________XXXX Data delay found: 18 14:17:09:setup_element:INFO: Eye window for uplink 23: XXXX____________________________XXXXXXXX Data delay found: 17 14:17:09:setup_element:INFO: Eye window for uplink 24: ____XXXXXXX_____________________________ Data delay found: 27 14:17:09:setup_element:INFO: Eye window for uplink 25: ______XXXXXXXX__________________________ Data delay found: 29 14:17:09:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXX___________________________ Data delay found: 28 14:17:09:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________ Data delay found: 33 14:17:09:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXX______________________ Data delay found: 34 14:17:09:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXX___________________ Data delay found: 36 14:17:09:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________ Data delay found: 37 14:17:09:setup_element:INFO: Eye window for uplink 31: _______________XXXXXX___________________ Data delay found: 37 14:17:09:setup_element:INFO: Setting the data phase to 20 for uplink 16 14:17:09:setup_element:INFO: Setting the data phase to 18 for uplink 17 14:17:09:setup_element:INFO: Setting the data phase to 19 for uplink 18 14:17:09:setup_element:INFO: Setting the data phase to 16 for uplink 19 14:17:09:setup_element:INFO: Setting the data phase to 18 for uplink 20 14:17:09:setup_element:INFO: Setting the data phase to 15 for uplink 21 14:17:09:setup_element:INFO: Setting the data phase to 18 for uplink 22 14:17:09:setup_element:INFO: Setting the data phase to 17 for uplink 23 14:17:09:setup_element:INFO: Setting the data phase to 27 for uplink 24 14:17:09:setup_element:INFO: Setting the data phase to 29 for uplink 25 14:17:09:setup_element:INFO: Setting the data phase to 28 for uplink 26 14:17:09:setup_element:INFO: Setting the data phase to 33 for uplink 27 14:17:09:setup_element:INFO: Setting the data phase to 34 for uplink 28 14:17:09:setup_element:INFO: Setting the data phase to 36 for uplink 29 14:17:09:setup_element:INFO: Setting the data phase to 37 for uplink 30 14:17:09:setup_element:INFO: Setting the data phase to 37 for uplink 31 14:17:09:setup_element:INFO: Beginning SMX ASICs map scan 14:17:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:17:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:17:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:17:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:17:09:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:17:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:17:09:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:17:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:17:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:17:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:17:09:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:17:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:17:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:17:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:17:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:17:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:17:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:17:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:17:10:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:17:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:17:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:17:12:setup_element:INFO: Performing Elink synchronization 14:17:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:17:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:17:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:17:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:17:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:17:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:17:12:febtest:INFO: Init all SMX (CSA): 30 14:17:26:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:17:26:febtest:INFO: 23-00 | XA-000-08-003-000-005-040-01 | 25.1 | 1195.1 14:17:27:febtest:INFO: 30-01 | XA-000-08-003-000-005-049-06 | 37.7 | 1147.8 14:17:27:febtest:INFO: 21-02 | XA-000-08-003-000-005-039-01 | 60.0 | 1076.3 14:17:27:febtest:INFO: 28-03 | XA-000-08-003-000-005-048-06 | 34.6 | 1159.7 14:17:27:febtest:INFO: 19-04 | XA-000-08-003-000-005-038-01 | 40.9 | 1147.8 14:17:27:febtest:INFO: 26-05 | XA-000-08-003-000-005-043-01 | 40.9 | 1141.9 14:17:28:febtest:INFO: 17-06 | XA-000-08-003-000-005-037-01 | 34.6 | 1171.5 14:17:28:febtest:INFO: 24-07 | XA-000-08-003-000-005-042-01 | 28.2 | 1189.2 14:17:29:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:17:31:ST3_smx:INFO: chip: 23-0 28.225000 C 1206.851500 mV 14:17:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:31:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:31:ST3_smx:INFO: Electrons 14:17:31:ST3_smx:INFO: # loops 0 14:17:32:ST3_smx:INFO: # loops 1 14:17:34:ST3_smx:INFO: # loops 2 14:17:35:ST3_smx:INFO: Total # of broken channels: 0 14:17:35:ST3_smx:INFO: List of broken channels: [] 14:17:35:ST3_smx:INFO: Total # of broken channels: 0 14:17:35:ST3_smx:INFO: List of broken channels: [] 14:17:37:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV 14:17:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:37:ST3_smx:INFO: Electrons 14:17:37:ST3_smx:INFO: # loops 0 14:17:39:ST3_smx:INFO: # loops 1 14:17:40:ST3_smx:INFO: # loops 2 14:17:42:ST3_smx:INFO: Total # of broken channels: 0 14:17:42:ST3_smx:INFO: List of broken channels: [] 14:17:42:ST3_smx:INFO: Total # of broken channels: 1 14:17:42:ST3_smx:INFO: List of broken channels: [0] 14:17:44:ST3_smx:INFO: chip: 21-2 59.984250 C 1088.263500 mV 14:17:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:44:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:44:ST3_smx:INFO: Electrons 14:17:44:ST3_smx:INFO: # loops 0 14:17:45:ST3_smx:INFO: # loops 1 14:17:47:ST3_smx:INFO: # loops 2 14:17:48:ST3_smx:INFO: Total # of broken channels: 0 14:17:48:ST3_smx:INFO: List of broken channels: [] 14:17:48:ST3_smx:INFO: Total # of broken channels: 0 14:17:48:ST3_smx:INFO: List of broken channels: [] 14:17:50:ST3_smx:INFO: chip: 28-3 34.556970 C 1177.390875 mV 14:17:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:50:ST3_smx:INFO: Electrons 14:17:50:ST3_smx:INFO: # loops 0 14:17:51:ST3_smx:INFO: # loops 1 14:17:53:ST3_smx:INFO: # loops 2 14:17:54:ST3_smx:INFO: Total # of broken channels: 0 14:17:54:ST3_smx:INFO: List of broken channels: [] 14:17:54:ST3_smx:INFO: Total # of broken channels: 0 14:17:54:ST3_smx:INFO: List of broken channels: [] 14:17:56:ST3_smx:INFO: chip: 19-4 44.073563 C 1159.654860 mV 14:17:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:17:56:ST3_smx:INFO: Electrons 14:17:56:ST3_smx:INFO: # loops 0 14:17:58:ST3_smx:INFO: # loops 1 14:17:59:ST3_smx:INFO: # loops 2 14:18:01:ST3_smx:INFO: Total # of broken channels: 0 14:18:01:ST3_smx:INFO: List of broken channels: [] 14:18:01:ST3_smx:INFO: Total # of broken channels: 0 14:18:01:ST3_smx:INFO: List of broken channels: [] 14:18:02:ST3_smx:INFO: chip: 26-5 40.898880 C 1159.654860 mV 14:18:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:02:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:02:ST3_smx:INFO: Electrons 14:18:02:ST3_smx:INFO: # loops 0 14:18:04:ST3_smx:INFO: # loops 1 14:18:06:ST3_smx:INFO: # loops 2 14:18:08:ST3_smx:INFO: Total # of broken channels: 0 14:18:08:ST3_smx:INFO: List of broken channels: [] 14:18:08:ST3_smx:INFO: Total # of broken channels: 0 14:18:08:ST3_smx:INFO: List of broken channels: [] 14:18:09:ST3_smx:INFO: chip: 17-6 37.726682 C 1183.292940 mV 14:18:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:09:ST3_smx:INFO: Electrons 14:18:09:ST3_smx:INFO: # loops 0 14:18:11:ST3_smx:INFO: # loops 1 14:18:12:ST3_smx:INFO: # loops 2 14:18:14:ST3_smx:INFO: Total # of broken channels: 0 14:18:14:ST3_smx:INFO: List of broken channels: [] 14:18:14:ST3_smx:INFO: Total # of broken channels: 0 14:18:14:ST3_smx:INFO: List of broken channels: [] 14:18:16:ST3_smx:INFO: chip: 24-7 31.389742 C 1200.969315 mV 14:18:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:18:16:ST3_smx:INFO: Electrons 14:18:16:ST3_smx:INFO: # loops 0 14:18:17:ST3_smx:INFO: # loops 1 14:18:19:ST3_smx:INFO: # loops 2 14:18:20:ST3_smx:INFO: Total # of broken channels: 0 14:18:20:ST3_smx:INFO: List of broken channels: [] 14:18:20:ST3_smx:INFO: Total # of broken channels: 0 14:18:20:ST3_smx:INFO: List of broken channels: [] 14:18:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:18:21:febtest:INFO: 23-00 | XA-000-08-003-000-005-040-01 | 28.2 | 1230.3 14:18:21:febtest:INFO: 30-01 | XA-000-08-003-000-005-049-06 | 37.7 | 1183.3 14:18:21:febtest:INFO: 21-02 | XA-000-08-003-000-005-039-01 | 63.2 | 1106.2 14:18:21:febtest:INFO: 28-03 | XA-000-08-003-000-005-048-06 | 37.7 | 1201.0 14:18:22:febtest:INFO: 19-04 | XA-000-08-003-000-005-038-01 | 44.1 | 1177.4 14:18:22:febtest:INFO: 26-05 | XA-000-08-003-000-005-043-01 | 44.1 | 1177.4 14:18:22:febtest:INFO: 17-06 | XA-000-08-003-000-005-037-01 | 40.9 | 1206.9 14:18:22:febtest:INFO: 24-07 | XA-000-08-003-000-005-042-01 | 34.6 | 1218.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_08_01-14_17_01 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4060| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5660', '1.849', '2.6600'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '2.5510'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9600', '1.850', '0.5253']