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FEB_4061 02.08.24 10:02:00
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10:02:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:02:00:ST3_Shared:INFO: FEB-Microcable
10:02:00:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:02:00:febtest:INFO: Testing FEB with SN 4061
10:02:02:smx_tester:INFO: Scanning setup
10:02:02:elinks:INFO: Disabling clock on downlink 0
10:02:02:elinks:INFO: Disabling clock on downlink 1
10:02:02:elinks:INFO: Disabling clock on downlink 2
10:02:02:elinks:INFO: Disabling clock on downlink 3
10:02:02:elinks:INFO: Disabling clock on downlink 4
10:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:02:02:elinks:INFO: Disabling clock on downlink 0
10:02:02:elinks:INFO: Disabling clock on downlink 1
10:02:02:elinks:INFO: Disabling clock on downlink 2
10:02:02:elinks:INFO: Disabling clock on downlink 3
10:02:02:elinks:INFO: Disabling clock on downlink 4
10:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:02:02:elinks:INFO: Disabling clock on downlink 0
10:02:02:elinks:INFO: Disabling clock on downlink 1
10:02:02:elinks:INFO: Disabling clock on downlink 2
10:02:02:elinks:INFO: Disabling clock on downlink 3
10:02:02:elinks:INFO: Disabling clock on downlink 4
10:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:02:02:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:02:02:elinks:INFO: Disabling clock on downlink 0
10:02:02:elinks:INFO: Disabling clock on downlink 1
10:02:02:elinks:INFO: Disabling clock on downlink 2
10:02:02:elinks:INFO: Disabling clock on downlink 3
10:02:02:elinks:INFO: Disabling clock on downlink 4
10:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:02:02:elinks:INFO: Disabling clock on downlink 0
10:02:02:elinks:INFO: Disabling clock on downlink 1
10:02:02:elinks:INFO: Disabling clock on downlink 2
10:02:02:elinks:INFO: Disabling clock on downlink 3
10:02:02:elinks:INFO: Disabling clock on downlink 4
10:02:02:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:02:02:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:02:02:setup_element:INFO: Scanning clock phase
10:02:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:02:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:02:03:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:02:03:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:02:03:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:02:03:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:02:03:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:02:03:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXX_________
Clock Delay: 28
10:02:03:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXX_________
Clock Delay: 28
10:02:03:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXX________
Clock Delay: 28
10:02:03:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXX________
Clock Delay: 28
10:02:03:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
10:02:03:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
10:02:03:setup_element:INFO: Scanning data phases
10:02:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:02:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:02:08:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:02:08:setup_element:INFO: Eye window for uplink 16: XXXXX_______________________________XXXX
Data delay found: 20
10:02:08:setup_element:INFO: Eye window for uplink 17: XX________________________________XXXXXX
Data delay found: 17
10:02:08:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXXX
Data delay found: 17
10:02:08:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXX___
Data delay found: 14
10:02:08:setup_element:INFO: Eye window for uplink 20: ________________________________XXXXXXX_
Data delay found: 15
10:02:08:setup_element:INFO: Eye window for uplink 21: _______________________________XXXXXX___
Data delay found: 13
10:02:08:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXXX_
Data delay found: 15
10:02:08:setup_element:INFO: Eye window for uplink 23: XX___________________________XXXXXXXXXXX
Data delay found: 15
10:02:08:setup_element:INFO: Eye window for uplink 24: __XXXXXXXX______________________________
Data delay found: 25
10:02:08:setup_element:INFO: Eye window for uplink 25: ______XXXXXXX___________________________
Data delay found: 29
10:02:08:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
10:02:08:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
10:02:08:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXX_____________________
Data delay found: 35
10:02:08:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXX__________________
Data delay found: 37
10:02:08:setup_element:INFO: Eye window for uplink 30: ____________XXXXXXXX____________________
Data delay found: 35
10:02:08:setup_element:INFO: Eye window for uplink 31: ______________XXXXXX____________________
Data delay found: 36
10:02:08:setup_element:INFO: Setting the data phase to 20 for uplink 16
10:02:08:setup_element:INFO: Setting the data phase to 17 for uplink 17
10:02:08:setup_element:INFO: Setting the data phase to 17 for uplink 18
10:02:08:setup_element:INFO: Setting the data phase to 14 for uplink 19
10:02:08:setup_element:INFO: Setting the data phase to 15 for uplink 20
10:02:08:setup_element:INFO: Setting the data phase to 13 for uplink 21
10:02:08:setup_element:INFO: Setting the data phase to 15 for uplink 22
10:02:08:setup_element:INFO: Setting the data phase to 15 for uplink 23
10:02:08:setup_element:INFO: Setting the data phase to 25 for uplink 24
10:02:08:setup_element:INFO: Setting the data phase to 29 for uplink 25
10:02:08:setup_element:INFO: Setting the data phase to 30 for uplink 26
10:02:08:setup_element:INFO: Setting the data phase to 35 for uplink 27
10:02:08:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:02:08:setup_element:INFO: Setting the data phase to 37 for uplink 29
10:02:08:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:02:08:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:02:08:setup_element:INFO: Beginning SMX ASICs map scan
10:02:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:02:08:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:02:08:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:02:08:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:02:08:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:02:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:02:08:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:02:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:02:08:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:02:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:02:08:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:02:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:02:09:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:02:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:02:09:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:02:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:02:09:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:02:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:02:09:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:02:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:02:09:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:02:11:setup_element:INFO: Performing Elink synchronization
10:02:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:02:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:02:11:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:02:11:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:02:11:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:02:11:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:02:11:febtest:INFO: Init all SMX (CSA): 30
10:02:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:02:25:febtest:INFO: 23-00 | XA-000-08-003-000-004-169-06 | 31.4 | 1183.3
10:02:26:febtest:INFO: 30-01 | XA-000-08-003-000-004-199-13 | 40.9 | 1153.7
10:02:26:febtest:INFO: 21-02 | XA-000-08-003-000-004-167-06 | 31.4 | 1177.4
10:02:26:febtest:INFO: 28-03 | XA-000-08-003-000-004-198-13 | 40.9 | 1153.7
10:02:26:febtest:INFO: 19-04 | XA-000-08-003-000-004-166-06 | 40.9 | 1147.8
10:02:26:febtest:INFO: 26-05 | XA-000-08-003-000-004-197-13 | 50.4 | 1130.0
10:02:27:febtest:INFO: 17-06 | XA-000-08-003-000-004-164-06 | 50.4 | 1135.9
10:02:27:febtest:INFO: 24-07 | XA-000-08-003-000-004-170-06 | 37.7 | 1177.4
10:02:28:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:02:30:ST3_smx:INFO: chip: 23-0 31.389742 C 1195.082160 mV
10:02:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:30:ST3_smx:INFO: Electrons
10:02:30:ST3_smx:INFO: # loops 0
10:02:31:ST3_smx:INFO: # loops 1
10:02:33:ST3_smx:INFO: # loops 2
10:02:34:ST3_smx:INFO: Total # of broken channels: 0
10:02:34:ST3_smx:INFO: List of broken channels: []
10:02:34:ST3_smx:INFO: Total # of broken channels: 0
10:02:34:ST3_smx:INFO: List of broken channels: []
10:02:36:ST3_smx:INFO: chip: 30-1 40.898880 C 1165.571835 mV
10:02:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:36:ST3_smx:INFO: Electrons
10:02:36:ST3_smx:INFO: # loops 0
10:02:37:ST3_smx:INFO: # loops 1
10:02:39:ST3_smx:INFO: # loops 2
10:02:41:ST3_smx:INFO: Total # of broken channels: 0
10:02:41:ST3_smx:INFO: List of broken channels: []
10:02:41:ST3_smx:INFO: Total # of broken channels: 0
10:02:41:ST3_smx:INFO: List of broken channels: []
10:02:42:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV
10:02:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:42:ST3_smx:INFO: Electrons
10:02:42:ST3_smx:INFO: # loops 0
10:02:44:ST3_smx:INFO: # loops 1
10:02:45:ST3_smx:INFO: # loops 2
10:02:47:ST3_smx:INFO: Total # of broken channels: 0
10:02:47:ST3_smx:INFO: List of broken channels: []
10:02:47:ST3_smx:INFO: Total # of broken channels: 0
10:02:47:ST3_smx:INFO: List of broken channels: []
10:02:48:ST3_smx:INFO: chip: 28-3 40.898880 C 1171.483840 mV
10:02:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:48:ST3_smx:INFO: Electrons
10:02:48:ST3_smx:INFO: # loops 0
10:02:50:ST3_smx:INFO: # loops 1
10:02:52:ST3_smx:INFO: # loops 2
10:02:53:ST3_smx:INFO: Total # of broken channels: 0
10:02:53:ST3_smx:INFO: List of broken channels: []
10:02:53:ST3_smx:INFO: Total # of broken channels: 0
10:02:53:ST3_smx:INFO: List of broken channels: []
10:02:55:ST3_smx:INFO: chip: 19-4 44.073563 C 1159.654860 mV
10:02:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:02:55:ST3_smx:INFO: Electrons
10:02:55:ST3_smx:INFO: # loops 0
10:02:56:ST3_smx:INFO: # loops 1
10:02:58:ST3_smx:INFO: # loops 2
10:02:59:ST3_smx:INFO: Total # of broken channels: 0
10:02:59:ST3_smx:INFO: List of broken channels: []
10:02:59:ST3_smx:INFO: Total # of broken channels: 0
10:02:59:ST3_smx:INFO: List of broken channels: []
10:03:01:ST3_smx:INFO: chip: 26-5 50.430383 C 1135.937260 mV
10:03:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:01:ST3_smx:INFO: Electrons
10:03:01:ST3_smx:INFO: # loops 0
10:03:03:ST3_smx:INFO: # loops 1
10:03:04:ST3_smx:INFO: # loops 2
10:03:06:ST3_smx:INFO: Total # of broken channels: 0
10:03:06:ST3_smx:INFO: List of broken channels: []
10:03:06:ST3_smx:INFO: Total # of broken channels: 0
10:03:06:ST3_smx:INFO: List of broken channels: []
10:03:07:ST3_smx:INFO: chip: 17-6 53.612520 C 1141.874115 mV
10:03:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:07:ST3_smx:INFO: Electrons
10:03:07:ST3_smx:INFO: # loops 0
10:03:09:ST3_smx:INFO: # loops 1
10:03:10:ST3_smx:INFO: # loops 2
10:03:12:ST3_smx:INFO: Total # of broken channels: 0
10:03:12:ST3_smx:INFO: List of broken channels: []
10:03:12:ST3_smx:INFO: Total # of broken channels: 0
10:03:12:ST3_smx:INFO: List of broken channels: []
10:03:14:ST3_smx:INFO: chip: 24-7 40.898880 C 1183.292940 mV
10:03:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:03:14:ST3_smx:INFO: Electrons
10:03:14:ST3_smx:INFO: # loops 0
10:03:15:ST3_smx:INFO: # loops 1
10:03:17:ST3_smx:INFO: # loops 2
10:03:18:ST3_smx:INFO: Total # of broken channels: 0
10:03:18:ST3_smx:INFO: List of broken channels: []
10:03:18:ST3_smx:INFO: Total # of broken channels: 0
10:03:18:ST3_smx:INFO: List of broken channels: []
10:03:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:03:19:febtest:INFO: 23-00 | XA-000-08-003-000-004-169-06 | 31.4 | 1224.5
10:03:19:febtest:INFO: 30-01 | XA-000-08-003-000-004-199-13 | 40.9 | 1183.3
10:03:19:febtest:INFO: 21-02 | XA-000-08-003-000-004-167-06 | 37.7 | 1212.7
10:03:19:febtest:INFO: 28-03 | XA-000-08-003-000-004-198-13 | 40.9 | 1189.2
10:03:20:febtest:INFO: 19-04 | XA-000-08-003-000-004-166-06 | 44.1 | 1177.4
10:03:20:febtest:INFO: 26-05 | XA-000-08-003-000-004-197-13 | 50.4 | 1159.7
10:03:20:febtest:INFO: 17-06 | XA-000-08-003-000-004-164-06 | 53.6 | 1159.7
10:03:20:febtest:INFO: 24-07 | XA-000-08-003-000-004-170-06 | 40.9 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_02-10_02_00
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4061| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.4770', '1.850', '2.2880']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0110', '1.850', '2.6200']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9730', '1.850', '0.5291']