
FEB_4062 12.08.24 12:54:47
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12:54:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:54:47:ST3_Shared:INFO: FEB-Microcable 12:54:47:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:54:47:febtest:INFO: Testing FEB with SN 4062 12:54:49:smx_tester:INFO: Scanning setup 12:54:49:elinks:INFO: Disabling clock on downlink 0 12:54:49:elinks:INFO: Disabling clock on downlink 1 12:54:49:elinks:INFO: Disabling clock on downlink 2 12:54:49:elinks:INFO: Disabling clock on downlink 3 12:54:49:elinks:INFO: Disabling clock on downlink 4 12:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:54:49:elinks:INFO: Disabling clock on downlink 0 12:54:49:elinks:INFO: Disabling clock on downlink 1 12:54:49:elinks:INFO: Disabling clock on downlink 2 12:54:49:elinks:INFO: Disabling clock on downlink 3 12:54:49:elinks:INFO: Disabling clock on downlink 4 12:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:54:49:elinks:INFO: Disabling clock on downlink 0 12:54:49:elinks:INFO: Disabling clock on downlink 1 12:54:49:elinks:INFO: Disabling clock on downlink 2 12:54:49:elinks:INFO: Disabling clock on downlink 3 12:54:49:elinks:INFO: Disabling clock on downlink 4 12:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:54:49:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:54:49:elinks:INFO: Disabling clock on downlink 0 12:54:49:elinks:INFO: Disabling clock on downlink 1 12:54:49:elinks:INFO: Disabling clock on downlink 2 12:54:49:elinks:INFO: Disabling clock on downlink 3 12:54:49:elinks:INFO: Disabling clock on downlink 4 12:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:54:49:elinks:INFO: Disabling clock on downlink 0 12:54:49:elinks:INFO: Disabling clock on downlink 1 12:54:49:elinks:INFO: Disabling clock on downlink 2 12:54:49:elinks:INFO: Disabling clock on downlink 3 12:54:49:elinks:INFO: Disabling clock on downlink 4 12:54:49:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:54:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:54:49:setup_element:INFO: Scanning clock phase 12:54:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:54:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:54:50:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:54:50:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXX___________ Clock Delay: 26 12:54:50:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXX___________ Clock Delay: 26 12:54:50:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________XXXXXXX___________ Clock Delay: 25 12:54:50:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________XXXXXXX___________ Clock Delay: 25 12:54:50:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________XXXXXXX____________ Clock Delay: 24 12:54:50:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________XXXXXXX____________ Clock Delay: 24 12:54:50:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXX___________ Clock Delay: 25 12:54:50:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXXX___________ Clock Delay: 25 12:54:50:setup_element:INFO: Setting the clock phase to 24 for group 0, downlink 2 12:54:50:setup_element:INFO: Scanning data phases 12:54:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:54:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:54:55:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:54:55:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________ Data delay found: 28 12:54:55:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________ Data delay found: 32 12:54:55:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________ Data delay found: 30 12:54:55:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________ Data delay found: 34 12:54:55:setup_element:INFO: Eye window for uplink 28: ___________XXXXXX_______________________ Data delay found: 33 12:54:55:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXX____________________ Data delay found: 36 12:54:55:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXX_________________ Data delay found: 38 12:54:55:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXX_________________ Data delay found: 39 12:54:55:setup_element:INFO: Setting the data phase to 28 for uplink 24 12:54:55:setup_element:INFO: Setting the data phase to 32 for uplink 25 12:54:55:setup_element:INFO: Setting the data phase to 30 for uplink 26 12:54:55:setup_element:INFO: Setting the data phase to 34 for uplink 27 12:54:55:setup_element:INFO: Setting the data phase to 33 for uplink 28 12:54:55:setup_element:INFO: Setting the data phase to 36 for uplink 29 12:54:55:setup_element:INFO: Setting the data phase to 38 for uplink 30 12:54:55:setup_element:INFO: Setting the data phase to 39 for uplink 31 12:54:55:setup_element:INFO: Beginning SMX ASICs map scan 12:54:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:54:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:54:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:54:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:54:55:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 12:54:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:54:55:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:54:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:54:56:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:54:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:54:56:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:54:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:54:56:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:54:58:setup_element:INFO: Performing Elink synchronization 12:54:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:54:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:54:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:54:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:54:58:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:54:58:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:54:58:febtest:INFO: Init all SMX (CSA): 30 12:55:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:55:08:febtest:INFO: 30-01 | XA-000-08-003-000-004-211-10 | 28.2 | 1206.9 12:55:09:febtest:INFO: 28-03 | XA-000-08-003-000-004-210-10 | 40.9 | 1153.7 12:55:09:febtest:INFO: 26-05 | XA-000-08-003-000-004-209-10 | 31.4 | 1189.2 12:55:09:febtest:INFO: 24-07 | XA-000-08-003-000-004-206-13 | 28.2 | 1189.2 12:55:10:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:55:12:ST3_smx:INFO: chip: 30-1 28.225000 C 1218.600960 mV 12:55:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:12:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:12:ST3_smx:INFO: Electrons 12:55:12:ST3_smx:INFO: # loops 0 12:55:14:ST3_smx:INFO: # loops 1 12:55:16:ST3_smx:INFO: # loops 2 12:55:18:ST3_smx:INFO: Total # of broken channels: 0 12:55:18:ST3_smx:INFO: List of broken channels: [] 12:55:18:ST3_smx:INFO: Total # of broken channels: 0 12:55:18:ST3_smx:INFO: List of broken channels: [] 12:55:20:ST3_smx:INFO: chip: 28-3 40.898880 C 1165.571835 mV 12:55:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:20:ST3_smx:INFO: Electrons 12:55:20:ST3_smx:INFO: # loops 0 12:55:22:ST3_smx:INFO: # loops 1 12:55:24:ST3_smx:INFO: # loops 2 12:55:26:ST3_smx:INFO: Total # of broken channels: 0 12:55:26:ST3_smx:INFO: List of broken channels: [] 12:55:26:ST3_smx:INFO: Total # of broken channels: 0 12:55:26:ST3_smx:INFO: List of broken channels: [] 12:55:28:ST3_smx:INFO: chip: 26-5 31.389742 C 1195.082160 mV 12:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:28:ST3_smx:INFO: Electrons 12:55:28:ST3_smx:INFO: # loops 0 12:55:30:ST3_smx:INFO: # loops 1 12:55:32:ST3_smx:INFO: # loops 2 12:55:34:ST3_smx:INFO: Total # of broken channels: 0 12:55:34:ST3_smx:INFO: List of broken channels: [] 12:55:34:ST3_smx:INFO: Total # of broken channels: 0 12:55:34:ST3_smx:INFO: List of broken channels: [] 12:55:35:ST3_smx:INFO: chip: 24-7 28.225000 C 1195.082160 mV 12:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:55:35:ST3_smx:INFO: Electrons 12:55:35:ST3_smx:INFO: # loops 0 12:55:37:ST3_smx:INFO: # loops 1 12:55:39:ST3_smx:INFO: # loops 2 12:55:41:ST3_smx:INFO: Total # of broken channels: 0 12:55:41:ST3_smx:INFO: List of broken channels: [] 12:55:41:ST3_smx:INFO: Total # of broken channels: 0 12:55:41:ST3_smx:INFO: List of broken channels: [] 12:55:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:55:42:febtest:INFO: 30-01 | XA-000-08-003-000-004-211-10 | 28.2 | 1259.6 12:55:42:febtest:INFO: 28-03 | XA-000-08-003-000-004-210-10 | 40.9 | 1183.3 12:55:42:febtest:INFO: 26-05 | XA-000-08-003-000-004-209-10 | 31.4 | 1218.6 12:55:42:febtest:INFO: 24-07 | XA-000-08-003-000-004-206-13 | 28.2 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_08_12-12_54_47 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4062| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.7710', '1.850', '1.4520'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0210', '1.850', '1.2120'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9808', '1.850', '0.2644']