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FEB_4064 08.08.24 15:38:16
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15:38:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:16:ST3_Shared:INFO: FEB-Microcable
15:38:16:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:16:febtest:INFO: Testing FEB with SN 4064
15:38:17:smx_tester:INFO: Scanning setup
15:38:17:elinks:INFO: Disabling clock on downlink 0
15:38:17:elinks:INFO: Disabling clock on downlink 1
15:38:17:elinks:INFO: Disabling clock on downlink 2
15:38:17:elinks:INFO: Disabling clock on downlink 3
15:38:17:elinks:INFO: Disabling clock on downlink 4
15:38:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:38:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:18:elinks:INFO: Disabling clock on downlink 0
15:38:18:elinks:INFO: Disabling clock on downlink 1
15:38:18:elinks:INFO: Disabling clock on downlink 2
15:38:18:elinks:INFO: Disabling clock on downlink 3
15:38:18:elinks:INFO: Disabling clock on downlink 4
15:38:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:38:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:18:elinks:INFO: Disabling clock on downlink 0
15:38:18:elinks:INFO: Disabling clock on downlink 1
15:38:18:elinks:INFO: Disabling clock on downlink 2
15:38:18:elinks:INFO: Disabling clock on downlink 3
15:38:18:elinks:INFO: Disabling clock on downlink 4
15:38:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:38:18:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:38:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:18:elinks:INFO: Disabling clock on downlink 0
15:38:18:elinks:INFO: Disabling clock on downlink 1
15:38:18:elinks:INFO: Disabling clock on downlink 2
15:38:18:elinks:INFO: Disabling clock on downlink 3
15:38:18:elinks:INFO: Disabling clock on downlink 4
15:38:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:38:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:18:elinks:INFO: Disabling clock on downlink 0
15:38:18:elinks:INFO: Disabling clock on downlink 1
15:38:18:elinks:INFO: Disabling clock on downlink 2
15:38:18:elinks:INFO: Disabling clock on downlink 3
15:38:18:elinks:INFO: Disabling clock on downlink 4
15:38:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:38:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:38:18:setup_element:INFO: Scanning clock phase
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:18:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:38:18:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________XXXXXXXX________
Clock Delay: 27
15:38:18:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
15:38:18:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
15:38:18:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:38:18:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:38:18:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
15:38:18:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
15:38:18:setup_element:INFO: Scanning data phases
15:38:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:24:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:38:24:setup_element:INFO: Eye window for uplink 16: XXXX________________________________XXXX
Data delay found: 19
15:38:24:setup_element:INFO: Eye window for uplink 17: X________________________________XXXXXX_
Data delay found: 16
15:38:24:setup_element:INFO: Eye window for uplink 18: XX_________________________________XXXXX
Data delay found: 18
15:38:24:setup_element:INFO: Eye window for uplink 19: ________________________________XXXXXX__
Data delay found: 14
15:38:24:setup_element:INFO: Eye window for uplink 20: X________________________________XXXXXX_
Data delay found: 16
15:38:24:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
15:38:24:setup_element:INFO: Eye window for uplink 22: XXXXX_________________________________XX
Data delay found: 21
15:38:24:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX
Data delay found: 20
15:38:24:setup_element:INFO: Eye window for uplink 24: ____XXXXXXXX____________________________
Data delay found: 27
15:38:24:setup_element:INFO: Eye window for uplink 25: _______XXXXXXXXX________________________
Data delay found: 31
15:38:24:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
15:38:24:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
15:38:24:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
15:38:24:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXXX__________________
Data delay found: 37
15:38:24:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXX__________________
Data delay found: 37
15:38:24:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXX__________________
Data delay found: 37
15:38:24:setup_element:INFO: Setting the data phase to 19 for uplink 16
15:38:24:setup_element:INFO: Setting the data phase to 16 for uplink 17
15:38:24:setup_element:INFO: Setting the data phase to 18 for uplink 18
15:38:24:setup_element:INFO: Setting the data phase to 14 for uplink 19
15:38:24:setup_element:INFO: Setting the data phase to 16 for uplink 20
15:38:24:setup_element:INFO: Setting the data phase to 14 for uplink 21
15:38:24:setup_element:INFO: Setting the data phase to 21 for uplink 22
15:38:24:setup_element:INFO: Setting the data phase to 20 for uplink 23
15:38:24:setup_element:INFO: Setting the data phase to 27 for uplink 24
15:38:24:setup_element:INFO: Setting the data phase to 31 for uplink 25
15:38:24:setup_element:INFO: Setting the data phase to 30 for uplink 26
15:38:24:setup_element:INFO: Setting the data phase to 34 for uplink 27
15:38:24:setup_element:INFO: Setting the data phase to 34 for uplink 28
15:38:24:setup_element:INFO: Setting the data phase to 37 for uplink 29
15:38:24:setup_element:INFO: Setting the data phase to 37 for uplink 30
15:38:24:setup_element:INFO: Setting the data phase to 37 for uplink 31
15:38:24:setup_element:INFO: Beginning SMX ASICs map scan
15:38:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:38:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:24:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:38:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:38:24:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:38:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:38:24:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:38:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:38:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:38:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:38:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:38:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:38:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:38:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:38:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:38:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:38:25:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:38:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:38:25:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:38:26:setup_element:INFO: Performing Elink synchronization
15:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:38:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:38:26:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:38:27:febtest:INFO: Init all SMX (CSA): 30
15:38:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:38:41:febtest:INFO: 23-00 | XA-000-08-003-000-003-137-00 | 31.4 | 1189.2
15:38:41:febtest:INFO: 30-01 | XA-000-08-003-000-003-253-12 | 34.6 | 1171.5
15:38:41:febtest:INFO: 21-02 | XA-000-08-003-000-003-252-12 | 53.6 | 1112.1
15:38:42:febtest:INFO: 28-03 | XA-000-08-003-000-003-254-12 | 40.9 | 1153.7
15:38:42:febtest:INFO: 19-04 | XA-000-08-003-000-004-003-02 | 31.4 | 1189.2
15:38:42:febtest:INFO: 26-05 | XA-000-08-003-000-003-227-11 | 40.9 | 1159.7
15:38:42:febtest:INFO: 17-06 | XA-000-08-003-000-004-000-02 | 40.9 | 1147.8
15:38:42:febtest:INFO: 24-07 | XA-000-08-003-000-004-002-02 | 40.9 | 1159.7
15:38:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:38:45:ST3_smx:INFO: chip: 23-0 34.556970 C 1200.969315 mV
15:38:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:45:ST3_smx:INFO: Electrons
15:38:45:ST3_smx:INFO: # loops 0
15:38:47:ST3_smx:INFO: # loops 1
15:38:49:ST3_smx:INFO: # loops 2
15:38:50:ST3_smx:INFO: Total # of broken channels: 0
15:38:50:ST3_smx:INFO: List of broken channels: []
15:38:50:ST3_smx:INFO: Total # of broken channels: 0
15:38:50:ST3_smx:INFO: List of broken channels: []
15:38:52:ST3_smx:INFO: chip: 30-1 37.726682 C 1189.190035 mV
15:38:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:52:ST3_smx:INFO: Electrons
15:38:52:ST3_smx:INFO: # loops 0
15:38:54:ST3_smx:INFO: # loops 1
15:38:55:ST3_smx:INFO: # loops 2
15:38:57:ST3_smx:INFO: Total # of broken channels: 0
15:38:57:ST3_smx:INFO: List of broken channels: []
15:38:57:ST3_smx:INFO: Total # of broken channels: 0
15:38:57:ST3_smx:INFO: List of broken channels: []
15:38:59:ST3_smx:INFO: chip: 21-2 53.612520 C 1124.048640 mV
15:38:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:59:ST3_smx:INFO: Electrons
15:38:59:ST3_smx:INFO: # loops 0
15:39:00:ST3_smx:INFO: # loops 1
15:39:02:ST3_smx:INFO: # loops 2
15:39:04:ST3_smx:INFO: Total # of broken channels: 0
15:39:04:ST3_smx:INFO: List of broken channels: []
15:39:04:ST3_smx:INFO: Total # of broken channels: 0
15:39:04:ST3_smx:INFO: List of broken channels: []
15:39:06:ST3_smx:INFO: chip: 28-3 44.073563 C 1165.571835 mV
15:39:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:06:ST3_smx:INFO: Electrons
15:39:06:ST3_smx:INFO: # loops 0
15:39:07:ST3_smx:INFO: # loops 1
15:39:09:ST3_smx:INFO: # loops 2
15:39:10:ST3_smx:INFO: Total # of broken channels: 0
15:39:10:ST3_smx:INFO: List of broken channels: []
15:39:10:ST3_smx:INFO: Total # of broken channels: 0
15:39:10:ST3_smx:INFO: List of broken channels: []
15:39:12:ST3_smx:INFO: chip: 19-4 34.556970 C 1195.082160 mV
15:39:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:12:ST3_smx:INFO: Electrons
15:39:12:ST3_smx:INFO: # loops 0
15:39:14:ST3_smx:INFO: # loops 1
15:39:16:ST3_smx:INFO: # loops 2
15:39:17:ST3_smx:INFO: Total # of broken channels: 0
15:39:17:ST3_smx:INFO: List of broken channels: []
15:39:17:ST3_smx:INFO: Total # of broken channels: 0
15:39:17:ST3_smx:INFO: List of broken channels: []
15:39:19:ST3_smx:INFO: chip: 26-5 44.073563 C 1171.483840 mV
15:39:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:19:ST3_smx:INFO: Electrons
15:39:19:ST3_smx:INFO: # loops 0
15:39:21:ST3_smx:INFO: # loops 1
15:39:22:ST3_smx:INFO: # loops 2
15:39:24:ST3_smx:INFO: Total # of broken channels: 0
15:39:24:ST3_smx:INFO: List of broken channels: []
15:39:24:ST3_smx:INFO: Total # of broken channels: 0
15:39:24:ST3_smx:INFO: List of broken channels: []
15:39:25:ST3_smx:INFO: chip: 17-6 44.073563 C 1159.654860 mV
15:39:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:25:ST3_smx:INFO: Electrons
15:39:25:ST3_smx:INFO: # loops 0
15:39:27:ST3_smx:INFO: # loops 1
15:39:29:ST3_smx:INFO: # loops 2
15:39:30:ST3_smx:INFO: Total # of broken channels: 0
15:39:30:ST3_smx:INFO: List of broken channels: []
15:39:30:ST3_smx:INFO: Total # of broken channels: 0
15:39:30:ST3_smx:INFO: List of broken channels: []
15:39:32:ST3_smx:INFO: chip: 24-7 40.898880 C 1165.571835 mV
15:39:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:32:ST3_smx:INFO: Electrons
15:39:32:ST3_smx:INFO: # loops 0
15:39:33:ST3_smx:INFO: # loops 1
15:39:35:ST3_smx:INFO: # loops 2
15:39:37:ST3_smx:INFO: Total # of broken channels: 0
15:39:37:ST3_smx:INFO: List of broken channels: []
15:39:37:ST3_smx:INFO: Total # of broken channels: 0
15:39:37:ST3_smx:INFO: List of broken channels: []
15:39:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:37:febtest:INFO: 23-00 | XA-000-08-003-000-003-137-00 | 37.7 | 1218.6
15:39:37:febtest:INFO: 30-01 | XA-000-08-003-000-003-253-12 | 40.9 | 1206.9
15:39:38:febtest:INFO: 21-02 | XA-000-08-003-000-003-252-12 | 56.8 | 1147.8
15:39:38:febtest:INFO: 28-03 | XA-000-08-003-000-003-254-12 | 47.3 | 1189.2
15:39:38:febtest:INFO: 19-04 | XA-000-08-003-000-004-003-02 | 37.7 | 1218.6
15:39:38:febtest:INFO: 26-05 | XA-000-08-003-000-003-227-11 | 47.3 | 1189.2
15:39:38:febtest:INFO: 17-06 | XA-000-08-003-000-004-000-02 | 47.3 | 1177.4
15:39:39:febtest:INFO: 24-07 | XA-000-08-003-000-004-002-02 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_08-15_38_16
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4064| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.6920', '1.849', '2.4660']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0510', '1.850', '2.4740']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.5293']