FEB_4065 08.08.24 09:17:55
Info
09:17:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:17:55:ST3_Shared:INFO: FEB-Microcable
09:17:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:17:55:febtest:INFO: Testing FEB with SN 4065
09:17:57:smx_tester:INFO: Scanning setup
09:17:57:elinks:INFO: Disabling clock on downlink 0
09:17:57:elinks:INFO: Disabling clock on downlink 1
09:17:57:elinks:INFO: Disabling clock on downlink 2
09:17:57:elinks:INFO: Disabling clock on downlink 3
09:17:57:elinks:INFO: Disabling clock on downlink 4
09:17:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:17:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:17:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:17:57:elinks:INFO: Disabling clock on downlink 0
09:17:57:elinks:INFO: Disabling clock on downlink 1
09:17:57:elinks:INFO: Disabling clock on downlink 2
09:17:57:elinks:INFO: Disabling clock on downlink 3
09:17:57:elinks:INFO: Disabling clock on downlink 4
09:17:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:17:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:17:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:17:57:elinks:INFO: Disabling clock on downlink 0
09:17:57:elinks:INFO: Disabling clock on downlink 1
09:17:57:elinks:INFO: Disabling clock on downlink 2
09:17:57:elinks:INFO: Disabling clock on downlink 3
09:17:57:elinks:INFO: Disabling clock on downlink 4
09:17:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:17:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:17:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:17:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:17:57:elinks:INFO: Disabling clock on downlink 0
09:17:57:elinks:INFO: Disabling clock on downlink 1
09:17:57:elinks:INFO: Disabling clock on downlink 2
09:17:57:elinks:INFO: Disabling clock on downlink 3
09:17:57:elinks:INFO: Disabling clock on downlink 4
09:17:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:17:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:17:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:17:57:elinks:INFO: Disabling clock on downlink 0
09:17:57:elinks:INFO: Disabling clock on downlink 1
09:17:57:elinks:INFO: Disabling clock on downlink 2
09:17:57:elinks:INFO: Disabling clock on downlink 3
09:17:57:elinks:INFO: Disabling clock on downlink 4
09:17:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:17:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:17:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:17:58:setup_element:INFO: Scanning clock phase
09:17:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:17:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:17:58:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:17:58:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
09:17:58:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
09:17:58:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXX__________
Clock Delay: 26
09:17:58:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXX__________
Clock Delay: 26
09:17:58:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
09:17:58:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
09:17:58:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
09:17:58:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________XXXXXXX___________
Clock Delay: 25
09:17:58:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2
09:17:58:setup_element:INFO: Scanning data phases
09:17:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:17:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:18:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:18:03:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________
Data delay found: 28
09:18:03:setup_element:INFO: Eye window for uplink 25: ________XXXXXXX_________________________
Data delay found: 31
09:18:03:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 2
09:18:03:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 4
09:18:03:setup_element:INFO: Eye window for uplink 28: __________XXXXXXXX______________________
Data delay found: 33
09:18:03:setup_element:INFO: Eye window for uplink 29: ____________XXXXXXXX____________________
Data delay found: 35
09:18:03:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXXX_____________________
Data delay found: 34
09:18:03:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXX_____________________
Data delay found: 35
09:18:03:setup_element:INFO: Setting the data phase to 28 for uplink 24
09:18:03:setup_element:INFO: Setting the data phase to 31 for uplink 25
09:18:03:setup_element:INFO: Setting the data phase to 2 for uplink 26
09:18:03:setup_element:INFO: Setting the data phase to 4 for uplink 27
09:18:03:setup_element:INFO: Setting the data phase to 33 for uplink 28
09:18:03:setup_element:INFO: Setting the data phase to 35 for uplink 29
09:18:03:setup_element:INFO: Setting the data phase to 34 for uplink 30
09:18:03:setup_element:INFO: Setting the data phase to 35 for uplink 31
09:18:03:setup_element:INFO: Beginning SMX ASICs map scan
09:18:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:18:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:18:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:18:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:18:03:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:18:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:18:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:18:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:18:04:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:18:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:18:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:18:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:18:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:18:06:setup_element:INFO: Performing Elink synchronization
09:18:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:18:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:18:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:18:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:18:06:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:18:06:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:18:06:febtest:INFO: Init all SMX (CSA): 30
09:18:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:18:16:febtest:INFO: 30-01 | XA-000-08-003-000-004-043-12 | 31.4 | 1195.1
09:18:16:febtest:INFO: 28-03 | XA-000-08-003-000-004-039-12 | 34.6 | 1183.3
09:18:16:febtest:INFO: 26-05 | XA-000-08-003-000-004-044-12 | 31.4 | 1189.2
09:18:16:febtest:INFO: 24-07 | XA-000-08-003-000-004-040-12 | 31.4 | 1189.2
09:18:17:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:18:19:ST3_smx:INFO: chip: 30-1 31.389742 C 1200.969315 mV
09:18:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:19:ST3_smx:INFO: Electrons
09:18:19:ST3_smx:INFO: # loops 0
09:18:21:ST3_smx:INFO: # loops 1
09:18:23:ST3_smx:INFO: # loops 2
09:18:25:ST3_smx:INFO: Total # of broken channels: 0
09:18:25:ST3_smx:INFO: List of broken channels: []
09:18:25:ST3_smx:INFO: Total # of broken channels: 0
09:18:25:ST3_smx:INFO: List of broken channels: []
09:18:27:ST3_smx:INFO: chip: 28-3 34.556970 C 1195.082160 mV
09:18:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:27:ST3_smx:INFO: Electrons
09:18:27:ST3_smx:INFO: # loops 0
09:18:29:ST3_smx:INFO: # loops 1
09:18:31:ST3_smx:INFO: # loops 2
09:18:33:ST3_smx:INFO: Total # of broken channels: 0
09:18:33:ST3_smx:INFO: List of broken channels: []
09:18:33:ST3_smx:INFO: Total # of broken channels: 0
09:18:33:ST3_smx:INFO: List of broken channels: []
09:18:34:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
09:18:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:34:ST3_smx:INFO: Electrons
09:18:34:ST3_smx:INFO: # loops 0
09:18:36:ST3_smx:INFO: # loops 1
09:18:38:ST3_smx:INFO: # loops 2
09:18:40:ST3_smx:INFO: Total # of broken channels: 0
09:18:40:ST3_smx:INFO: List of broken channels: []
09:18:40:ST3_smx:INFO: Total # of broken channels: 0
09:18:40:ST3_smx:INFO: List of broken channels: []
09:18:42:ST3_smx:INFO: chip: 24-7 31.389742 C 1195.082160 mV
09:18:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:18:42:ST3_smx:INFO: Electrons
09:18:42:ST3_smx:INFO: # loops 0
09:18:44:ST3_smx:INFO: # loops 1
09:18:46:ST3_smx:INFO: # loops 2
09:18:47:ST3_smx:INFO: Total # of broken channels: 0
09:18:47:ST3_smx:INFO: List of broken channels: []
09:18:47:ST3_smx:INFO: Total # of broken channels: 0
09:18:47:ST3_smx:INFO: List of broken channels: []
09:18:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:18:48:febtest:INFO: 30-01 | XA-000-08-003-000-004-043-12 | 34.6 | 1224.5
09:18:48:febtest:INFO: 28-03 | XA-000-08-003-000-004-039-12 | 37.7 | 1218.6
09:18:48:febtest:INFO: 26-05 | XA-000-08-003-000-004-044-12 | 34.6 | 1218.6
09:18:49:febtest:INFO: 24-07 | XA-000-08-003-000-004-040-12 | 34.6 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_08-09_17_55
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4065| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7227', '1.850', '1.2110']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9836', '1.850', '1.2620']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9707', '1.850', '0.2630']