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FEB_4065 08.08.24 13:48:40
Info
13:48:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:48:40:ST3_Shared:INFO: FEB-Microcable
13:48:40:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:48:40:febtest:INFO: Testing FEB with SN 4065
13:48:42:smx_tester:INFO: Scanning setup
13:48:42:elinks:INFO: Disabling clock on downlink 0
13:48:42:elinks:INFO: Disabling clock on downlink 1
13:48:42:elinks:INFO: Disabling clock on downlink 2
13:48:42:elinks:INFO: Disabling clock on downlink 3
13:48:42:elinks:INFO: Disabling clock on downlink 4
13:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:42:elinks:INFO: Disabling clock on downlink 0
13:48:42:elinks:INFO: Disabling clock on downlink 1
13:48:42:elinks:INFO: Disabling clock on downlink 2
13:48:42:elinks:INFO: Disabling clock on downlink 3
13:48:42:elinks:INFO: Disabling clock on downlink 4
13:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:42:elinks:INFO: Disabling clock on downlink 0
13:48:42:elinks:INFO: Disabling clock on downlink 1
13:48:42:elinks:INFO: Disabling clock on downlink 2
13:48:42:elinks:INFO: Disabling clock on downlink 3
13:48:42:elinks:INFO: Disabling clock on downlink 4
13:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:48:42:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:42:elinks:INFO: Disabling clock on downlink 0
13:48:42:elinks:INFO: Disabling clock on downlink 1
13:48:42:elinks:INFO: Disabling clock on downlink 2
13:48:42:elinks:INFO: Disabling clock on downlink 3
13:48:42:elinks:INFO: Disabling clock on downlink 4
13:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:42:elinks:INFO: Disabling clock on downlink 0
13:48:42:elinks:INFO: Disabling clock on downlink 1
13:48:42:elinks:INFO: Disabling clock on downlink 2
13:48:42:elinks:INFO: Disabling clock on downlink 3
13:48:42:elinks:INFO: Disabling clock on downlink 4
13:48:42:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:48:42:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:48:42:setup_element:INFO: Scanning clock phase
13:48:42:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:48:43:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:48:43:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXX__________
Clock Delay: 26
13:48:43:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXX__________
Clock Delay: 26
13:48:43:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
13:48:43:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
13:48:43:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXX_________
Clock Delay: 28
13:48:43:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXX_________
Clock Delay: 28
13:48:43:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXX_________
Clock Delay: 28
13:48:43:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXX_________
Clock Delay: 28
13:48:43:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:48:43:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
13:48:43:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
13:48:43:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
13:48:43:setup_element:INFO: Scanning data phases
13:48:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:48:48:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:48:48:setup_element:INFO: Eye window for uplink 16: XXXX________________________________XXXX
Data delay found: 19
13:48:48:setup_element:INFO: Eye window for uplink 17: X_________________________________XXXXX_
Data delay found: 17
13:48:48:setup_element:INFO: Eye window for uplink 18: X_________________________________XXXXXX
Data delay found: 17
13:48:48:setup_element:INFO: Eye window for uplink 19: _______________________________XXXXXXX__
Data delay found: 14
13:48:48:setup_element:INFO: Eye window for uplink 20: _________________________________XXXXXX_
Data delay found: 15
13:48:48:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXXX__
Data delay found: 14
13:48:48:setup_element:INFO: Eye window for uplink 22: XX___________________________________XXX
Data delay found: 19
13:48:48:setup_element:INFO: Eye window for uplink 23: XXXX____________________________XXXXXXXX
Data delay found: 17
13:48:48:setup_element:INFO: Eye window for uplink 24: ___XXXXXXXX_____________________________
Data delay found: 26
13:48:48:setup_element:INFO: Eye window for uplink 25: ______XXXXXXXX__________________________
Data delay found: 29
13:48:48:setup_element:INFO: Eye window for uplink 26: _____XXXXXXXX___________________________
Data delay found: 28
13:48:48:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXXX______________________
Data delay found: 33
13:48:48:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXX______________________
Data delay found: 33
13:48:48:setup_element:INFO: Eye window for uplink 29: _____________XXXXXXXX___________________
Data delay found: 36
13:48:48:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXX___________________
Data delay found: 36
13:48:48:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
13:48:48:setup_element:INFO: Setting the data phase to 19 for uplink 16
13:48:48:setup_element:INFO: Setting the data phase to 17 for uplink 17
13:48:48:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:48:48:setup_element:INFO: Setting the data phase to 14 for uplink 19
13:48:48:setup_element:INFO: Setting the data phase to 15 for uplink 20
13:48:48:setup_element:INFO: Setting the data phase to 14 for uplink 21
13:48:48:setup_element:INFO: Setting the data phase to 19 for uplink 22
13:48:48:setup_element:INFO: Setting the data phase to 17 for uplink 23
13:48:48:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:48:48:setup_element:INFO: Setting the data phase to 29 for uplink 25
13:48:48:setup_element:INFO: Setting the data phase to 28 for uplink 26
13:48:48:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:48:48:setup_element:INFO: Setting the data phase to 33 for uplink 28
13:48:48:setup_element:INFO: Setting the data phase to 36 for uplink 29
13:48:48:setup_element:INFO: Setting the data phase to 36 for uplink 30
13:48:48:setup_element:INFO: Setting the data phase to 37 for uplink 31
13:48:48:setup_element:INFO: Beginning SMX ASICs map scan
13:48:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:48:48:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:48:48:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:48:48:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:48:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:48:48:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:48:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:48:48:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:48:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:48:49:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:48:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:48:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:48:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:48:49:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:48:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:48:49:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:48:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:48:49:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:48:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:48:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:48:51:setup_element:INFO: Performing Elink synchronization
13:48:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:48:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:48:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:48:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:48:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:48:51:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:48:52:febtest:INFO: Init all SMX (CSA): 30
13:49:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:49:11:febtest:INFO: 23-00 | XA-000-08-003-000-004-045-12 | 44.1 | 1147.8
13:49:11:febtest:INFO: 30-01 | XA-000-08-003-000-004-043-12 | 34.6 | 1189.2
13:49:11:febtest:INFO: 21-02 | XA-000-08-003-000-004-041-12 | 25.1 | 1212.7
13:49:12:febtest:INFO: 28-03 | XA-000-08-003-000-004-039-12 | 37.7 | 1177.4
13:49:12:febtest:INFO: 19-04 | XA-000-08-003-000-004-046-12 | 28.2 | 1206.9
13:49:12:febtest:INFO: 26-05 | XA-000-08-003-000-004-044-12 | 34.6 | 1183.3
13:49:12:febtest:INFO: 17-06 | XA-000-08-003-000-004-042-12 | 34.6 | 1183.3
13:49:12:febtest:INFO: 24-07 | XA-000-08-003-000-004-040-12 | 37.7 | 1183.3
13:49:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:49:15:ST3_smx:INFO: chip: 23-0 44.073563 C 1159.654860 mV
13:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:16:ST3_smx:INFO: Electrons
13:49:16:ST3_smx:INFO: # loops 0
13:49:18:ST3_smx:INFO: # loops 1
13:49:20:ST3_smx:INFO: # loops 2
13:49:22:ST3_smx:INFO: Total # of broken channels: 0
13:49:22:ST3_smx:INFO: List of broken channels: []
13:49:22:ST3_smx:INFO: Total # of broken channels: 0
13:49:22:ST3_smx:INFO: List of broken channels: []
13:49:24:ST3_smx:INFO: chip: 30-1 34.556970 C 1195.082160 mV
13:49:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:24:ST3_smx:INFO: Electrons
13:49:24:ST3_smx:INFO: # loops 0
13:49:26:ST3_smx:INFO: # loops 1
13:49:28:ST3_smx:INFO: # loops 2
13:49:30:ST3_smx:INFO: Total # of broken channels: 0
13:49:30:ST3_smx:INFO: List of broken channels: []
13:49:30:ST3_smx:INFO: Total # of broken channels: 0
13:49:30:ST3_smx:INFO: List of broken channels: []
13:49:32:ST3_smx:INFO: chip: 21-2 25.062742 C 1224.468235 mV
13:49:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:32:ST3_smx:INFO: Electrons
13:49:32:ST3_smx:INFO: # loops 0
13:49:34:ST3_smx:INFO: # loops 1
13:49:36:ST3_smx:INFO: # loops 2
13:49:39:ST3_smx:INFO: Total # of broken channels: 0
13:49:39:ST3_smx:INFO: List of broken channels: []
13:49:39:ST3_smx:INFO: Total # of broken channels: 0
13:49:39:ST3_smx:INFO: List of broken channels: []
13:49:40:ST3_smx:INFO: chip: 28-3 37.726682 C 1195.082160 mV
13:49:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:40:ST3_smx:INFO: Electrons
13:49:40:ST3_smx:INFO: # loops 0
13:49:43:ST3_smx:INFO: # loops 1
13:49:45:ST3_smx:INFO: # loops 2
13:49:47:ST3_smx:INFO: Total # of broken channels: 0
13:49:47:ST3_smx:INFO: List of broken channels: []
13:49:47:ST3_smx:INFO: Total # of broken channels: 0
13:49:47:ST3_smx:INFO: List of broken channels: []
13:49:48:ST3_smx:INFO: chip: 19-4 28.225000 C 1218.600960 mV
13:49:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:49:ST3_smx:INFO: Electrons
13:49:49:ST3_smx:INFO: # loops 0
13:49:51:ST3_smx:INFO: # loops 1
13:49:53:ST3_smx:INFO: # loops 2
13:49:55:ST3_smx:INFO: Total # of broken channels: 0
13:49:55:ST3_smx:INFO: List of broken channels: []
13:49:55:ST3_smx:INFO: Total # of broken channels: 0
13:49:55:ST3_smx:INFO: List of broken channels: []
13:49:56:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
13:49:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:49:56:ST3_smx:INFO: Electrons
13:49:56:ST3_smx:INFO: # loops 0
13:49:59:ST3_smx:INFO: # loops 1
13:50:01:ST3_smx:INFO: # loops 2
13:50:03:ST3_smx:INFO: Total # of broken channels: 0
13:50:03:ST3_smx:INFO: List of broken channels: []
13:50:03:ST3_smx:INFO: Total # of broken channels: 0
13:50:03:ST3_smx:INFO: List of broken channels: []
13:50:04:ST3_smx:INFO: chip: 17-6 37.726682 C 1195.082160 mV
13:50:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:05:ST3_smx:INFO: Electrons
13:50:05:ST3_smx:INFO: # loops 0
13:50:06:ST3_smx:INFO: # loops 1
13:50:09:ST3_smx:INFO: # loops 2
13:50:11:ST3_smx:INFO: Total # of broken channels: 0
13:50:11:ST3_smx:INFO: List of broken channels: []
13:50:11:ST3_smx:INFO: Total # of broken channels: 0
13:50:11:ST3_smx:INFO: List of broken channels: []
13:50:13:ST3_smx:INFO: chip: 24-7 40.898880 C 1195.082160 mV
13:50:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:50:13:ST3_smx:INFO: Electrons
13:50:13:ST3_smx:INFO: # loops 0
13:50:15:ST3_smx:INFO: # loops 1
13:50:17:ST3_smx:INFO: # loops 2
13:50:19:ST3_smx:INFO: Total # of broken channels: 0
13:50:19:ST3_smx:INFO: List of broken channels: []
13:50:19:ST3_smx:INFO: Total # of broken channels: 0
13:50:19:ST3_smx:INFO: List of broken channels: []
13:50:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:50:19:febtest:INFO: 23-00 | XA-000-08-003-000-004-045-12 | 47.3 | 1177.4
13:50:20:febtest:INFO: 30-01 | XA-000-08-003-000-004-043-12 | 37.7 | 1218.6
13:50:20:febtest:INFO: 21-02 | XA-000-08-003-000-004-041-12 | 28.2 | 1242.0
13:50:20:febtest:INFO: 28-03 | XA-000-08-003-000-004-039-12 | 40.9 | 1212.7
13:50:20:febtest:INFO: 19-04 | XA-000-08-003-000-004-046-12 | 31.4 | 1236.2
13:50:20:febtest:INFO: 26-05 | XA-000-08-003-000-004-044-12 | 37.7 | 1218.6
13:50:21:febtest:INFO: 17-06 | XA-000-08-003-000-004-042-12 | 37.7 | 1212.7
13:50:21:febtest:INFO: 24-07 | XA-000-08-003-000-004-040-12 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_08-13_48_40
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4065| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5320', '1.849', '2.3090']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9700', '1.850', '2.5180']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9390', '1.850', '0.5155']