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FEB_4066 07.08.24 13:34:20
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13:34:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:20:ST3_Shared:INFO: FEB-Microcable
13:34:20:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:20:febtest:INFO: Testing FEB with SN 4066
13:34:22:smx_tester:INFO: Scanning setup
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:34:22:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:elinks:INFO: Disabling clock on downlink 0
13:34:22:elinks:INFO: Disabling clock on downlink 1
13:34:22:elinks:INFO: Disabling clock on downlink 2
13:34:22:elinks:INFO: Disabling clock on downlink 3
13:34:22:elinks:INFO: Disabling clock on downlink 4
13:34:22:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:34:22:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:22:setup_element:INFO: Scanning clock phase
13:34:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:23:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:34:23:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:34:23:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:34:23:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:34:23:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
13:34:23:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:34:23:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:34:23:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________XXXXXX_________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXX__________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXX__________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXX__________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXX__________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
13:34:23:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
13:34:23:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
13:34:23:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
13:34:23:setup_element:INFO: Scanning data phases
13:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:28:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:34:28:setup_element:INFO: Eye window for uplink 16: XXXX______________________________X_XXXX
Data delay found: 18
13:34:28:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXXXX_
Data delay found: 15
13:34:28:setup_element:INFO: Eye window for uplink 18: XX________________________________XXXXXX
Data delay found: 17
13:34:28:setup_element:INFO: Eye window for uplink 19: _______________________________XXXXXX___
Data delay found: 13
13:34:28:setup_element:INFO: Eye window for uplink 20: XXX________________________________XXXXX
Data delay found: 18
13:34:28:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXXX_
Data delay found: 15
13:34:28:setup_element:INFO: Eye window for uplink 22: XX________________________________XXXXXX
Data delay found: 17
13:34:28:setup_element:INFO: Eye window for uplink 23: XXX___________________________XXXXXXXXXX
Data delay found: 16
13:34:28:setup_element:INFO: Eye window for uplink 24: ____XXXXXXX_____________________________
Data delay found: 27
13:34:28:setup_element:INFO: Eye window for uplink 25: _______XXXXXXX__________________________
Data delay found: 30
13:34:28:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
13:34:28:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
13:34:28:setup_element:INFO: Eye window for uplink 28: ____________XXXXXX______________________
Data delay found: 34
13:34:28:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
13:34:28:setup_element:INFO: Eye window for uplink 30: ___________X_XXXXXXX____________________
Data delay found: 35
13:34:28:setup_element:INFO: Eye window for uplink 31: _____________XXXXXXX____________________
Data delay found: 36
13:34:28:setup_element:INFO: Setting the data phase to 18 for uplink 16
13:34:28:setup_element:INFO: Setting the data phase to 15 for uplink 17
13:34:28:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:34:28:setup_element:INFO: Setting the data phase to 13 for uplink 19
13:34:28:setup_element:INFO: Setting the data phase to 18 for uplink 20
13:34:28:setup_element:INFO: Setting the data phase to 15 for uplink 21
13:34:28:setup_element:INFO: Setting the data phase to 17 for uplink 22
13:34:28:setup_element:INFO: Setting the data phase to 16 for uplink 23
13:34:28:setup_element:INFO: Setting the data phase to 27 for uplink 24
13:34:28:setup_element:INFO: Setting the data phase to 30 for uplink 25
13:34:28:setup_element:INFO: Setting the data phase to 30 for uplink 26
13:34:28:setup_element:INFO: Setting the data phase to 35 for uplink 27
13:34:28:setup_element:INFO: Setting the data phase to 34 for uplink 28
13:34:28:setup_element:INFO: Setting the data phase to 37 for uplink 29
13:34:28:setup_element:INFO: Setting the data phase to 35 for uplink 30
13:34:28:setup_element:INFO: Setting the data phase to 36 for uplink 31
13:34:28:setup_element:INFO: Beginning SMX ASICs map scan
13:34:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:28:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:28:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:34:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:34:28:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:34:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:34:28:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:34:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:34:28:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:34:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:34:29:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:34:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:34:29:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:34:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:34:29:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:34:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:34:29:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:34:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:34:29:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:34:31:setup_element:INFO: Performing Elink synchronization
13:34:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:34:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:34:31:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:34:31:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:34:31:febtest:INFO: Init all SMX (CSA): 30
13:34:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:45:febtest:INFO: 23-00 | XA-000-08-003-000-004-031-05 | 28.2 | 1201.0
13:34:45:febtest:INFO: 30-01 | XA-000-08-003-000-004-035-12 | 37.7 | 1165.6
13:34:46:febtest:INFO: 21-02 | XA-000-08-003-000-004-027-05 | 47.3 | 1135.9
13:34:46:febtest:INFO: 28-03 | XA-000-08-003-000-004-030-05 | 56.8 | 1100.2
13:34:46:febtest:INFO: 19-04 | XA-000-08-003-000-004-037-12 | 28.2 | 1201.0
13:34:46:febtest:INFO: 26-05 | XA-000-08-003-000-004-026-05 | 40.9 | 1153.7
13:34:46:febtest:INFO: 17-06 | XA-000-08-003-000-004-033-12 | 40.9 | 1153.7
13:34:47:febtest:INFO: 24-07 | XA-000-08-003-000-004-036-12 | 31.4 | 1177.4
13:34:48:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:34:49:ST3_smx:INFO: chip: 23-0 28.225000 C 1212.728715 mV
13:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:49:ST3_smx:INFO: Electrons
13:34:49:ST3_smx:INFO: # loops 0
13:34:51:ST3_smx:INFO: # loops 1
13:34:53:ST3_smx:INFO: # loops 2
13:34:54:ST3_smx:INFO: Total # of broken channels: 0
13:34:54:ST3_smx:INFO: List of broken channels: []
13:34:54:ST3_smx:INFO: Total # of broken channels: 0
13:34:54:ST3_smx:INFO: List of broken channels: []
13:34:56:ST3_smx:INFO: chip: 30-1 37.726682 C 1177.390875 mV
13:34:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:34:56:ST3_smx:INFO: Electrons
13:34:56:ST3_smx:INFO: # loops 0
13:34:57:ST3_smx:INFO: # loops 1
13:34:59:ST3_smx:INFO: # loops 2
13:35:00:ST3_smx:INFO: Total # of broken channels: 0
13:35:00:ST3_smx:INFO: List of broken channels: []
13:35:00:ST3_smx:INFO: Total # of broken channels: 0
13:35:00:ST3_smx:INFO: List of broken channels: []
13:35:02:ST3_smx:INFO: chip: 21-2 47.250730 C 1147.806000 mV
13:35:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:02:ST3_smx:INFO: Electrons
13:35:02:ST3_smx:INFO: # loops 0
13:35:03:ST3_smx:INFO: # loops 1
13:35:05:ST3_smx:INFO: # loops 2
13:35:07:ST3_smx:INFO: Total # of broken channels: 0
13:35:07:ST3_smx:INFO: List of broken channels: []
13:35:07:ST3_smx:INFO: Total # of broken channels: 0
13:35:07:ST3_smx:INFO: List of broken channels: []
13:35:08:ST3_smx:INFO: chip: 28-3 56.797143 C 1112.140140 mV
13:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:08:ST3_smx:INFO: Electrons
13:35:08:ST3_smx:INFO: # loops 0
13:35:10:ST3_smx:INFO: # loops 1
13:35:11:ST3_smx:INFO: # loops 2
13:35:13:ST3_smx:INFO: Total # of broken channels: 0
13:35:13:ST3_smx:INFO: List of broken channels: []
13:35:13:ST3_smx:INFO: Total # of broken channels: 0
13:35:13:ST3_smx:INFO: List of broken channels: []
13:35:14:ST3_smx:INFO: chip: 19-4 28.225000 C 1206.851500 mV
13:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:14:ST3_smx:INFO: Electrons
13:35:14:ST3_smx:INFO: # loops 0
13:35:16:ST3_smx:INFO: # loops 1
13:35:17:ST3_smx:INFO: # loops 2
13:35:19:ST3_smx:INFO: Total # of broken channels: 0
13:35:19:ST3_smx:INFO: List of broken channels: []
13:35:19:ST3_smx:INFO: Total # of broken channels: 0
13:35:19:ST3_smx:INFO: List of broken channels: []
13:35:21:ST3_smx:INFO: chip: 26-5 44.073563 C 1165.571835 mV
13:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:21:ST3_smx:INFO: Electrons
13:35:21:ST3_smx:INFO: # loops 0
13:35:22:ST3_smx:INFO: # loops 1
13:35:24:ST3_smx:INFO: # loops 2
13:35:26:ST3_smx:INFO: Total # of broken channels: 0
13:35:26:ST3_smx:INFO: List of broken channels: []
13:35:26:ST3_smx:INFO: Total # of broken channels: 0
13:35:26:ST3_smx:INFO: List of broken channels: []
13:35:27:ST3_smx:INFO: chip: 17-6 44.073563 C 1159.654860 mV
13:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:27:ST3_smx:INFO: Electrons
13:35:27:ST3_smx:INFO: # loops 0
13:35:29:ST3_smx:INFO: # loops 1
13:35:31:ST3_smx:INFO: # loops 2
13:35:32:ST3_smx:INFO: Total # of broken channels: 0
13:35:32:ST3_smx:INFO: List of broken channels: []
13:35:32:ST3_smx:INFO: Total # of broken channels: 0
13:35:32:ST3_smx:INFO: List of broken channels: []
13:35:34:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV
13:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:34:ST3_smx:INFO: Electrons
13:35:34:ST3_smx:INFO: # loops 0
13:35:35:ST3_smx:INFO: # loops 1
13:35:37:ST3_smx:INFO: # loops 2
13:35:39:ST3_smx:INFO: Total # of broken channels: 0
13:35:39:ST3_smx:INFO: List of broken channels: []
13:35:39:ST3_smx:INFO: Total # of broken channels: 0
13:35:39:ST3_smx:INFO: List of broken channels: []
13:35:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:39:febtest:INFO: 23-00 | XA-000-08-003-000-004-031-05 | 31.4 | 1236.2
13:35:39:febtest:INFO: 30-01 | XA-000-08-003-000-004-035-12 | 40.9 | 1195.1
13:35:39:febtest:INFO: 21-02 | XA-000-08-003-000-004-027-05 | 50.4 | 1165.6
13:35:40:febtest:INFO: 28-03 | XA-000-08-003-000-004-030-05 | 60.0 | 1135.9
13:35:40:febtest:INFO: 19-04 | XA-000-08-003-000-004-037-12 | 31.4 | 1230.3
13:35:40:febtest:INFO: 26-05 | XA-000-08-003-000-004-026-05 | 44.1 | 1183.3
13:35:40:febtest:INFO: 17-06 | XA-000-08-003-000-004-033-12 | 47.3 | 1177.4
13:35:41:febtest:INFO: 24-07 | XA-000-08-003-000-004-036-12 | 37.7 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_08_07-13_34_20
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4066| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.3690', '1.849', '2.3720']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9730', '1.850', '2.4960']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9500', '1.850', '0.5266']