
FEB_4076 19.09.24 09:05:19
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09:05:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:05:19:ST3_Shared:INFO: FEB-Microcable 09:05:19:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 09:05:19:febtest:INFO: Testing FEB with SN 4076 09:05:21:smx_tester:INFO: Scanning setup 09:05:21:elinks:INFO: Disabling clock on downlink 0 09:05:21:elinks:INFO: Disabling clock on downlink 1 09:05:21:elinks:INFO: Disabling clock on downlink 2 09:05:21:elinks:INFO: Disabling clock on downlink 3 09:05:21:elinks:INFO: Disabling clock on downlink 4 09:05:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 09:05:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:05:21:elinks:INFO: Disabling clock on downlink 0 09:05:21:elinks:INFO: Disabling clock on downlink 1 09:05:21:elinks:INFO: Disabling clock on downlink 2 09:05:21:elinks:INFO: Disabling clock on downlink 3 09:05:21:elinks:INFO: Disabling clock on downlink 4 09:05:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 09:05:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:05:21:elinks:INFO: Disabling clock on downlink 0 09:05:21:elinks:INFO: Disabling clock on downlink 1 09:05:21:elinks:INFO: Disabling clock on downlink 2 09:05:21:elinks:INFO: Disabling clock on downlink 3 09:05:21:elinks:INFO: Disabling clock on downlink 4 09:05:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 09:05:21:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 09:05:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:05:21:elinks:INFO: Disabling clock on downlink 0 09:05:21:elinks:INFO: Disabling clock on downlink 1 09:05:21:elinks:INFO: Disabling clock on downlink 2 09:05:21:elinks:INFO: Disabling clock on downlink 3 09:05:21:elinks:INFO: Disabling clock on downlink 4 09:05:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 09:05:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:05:21:elinks:INFO: Disabling clock on downlink 0 09:05:21:elinks:INFO: Disabling clock on downlink 1 09:05:21:elinks:INFO: Disabling clock on downlink 2 09:05:21:elinks:INFO: Disabling clock on downlink 3 09:05:21:elinks:INFO: Disabling clock on downlink 4 09:05:21:setup_element:INFO: Checking SOS, encoding_mode: SOS 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 09:05:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 09:05:21:setup_element:INFO: Scanning clock phase 09:05:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:05:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:05:22:setup_element:INFO: Clock phase scan results for group 0, downlink 2 09:05:22:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXX________ Clock Delay: 28 09:05:22:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXX________ Clock Delay: 28 09:05:22:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXX________ Clock Delay: 28 09:05:22:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXX________ Clock Delay: 28 09:05:22:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXX__________ Clock Delay: 26 09:05:22:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXX__________ Clock Delay: 26 09:05:22:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXX___________ Clock Delay: 25 09:05:22:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXXX___________ Clock Delay: 25 09:05:22:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 09:05:22:setup_element:INFO: Scanning data phases 09:05:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:05:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:05:27:setup_element:INFO: Data phase scan results for group 0, downlink 2 09:05:27:setup_element:INFO: Eye window for uplink 24: _______XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 3 09:05:27:setup_element:INFO: Eye window for uplink 25: _________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 4 09:05:27:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________ Data delay found: 33 09:05:27:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXX__________________ Data delay found: 38 09:05:27:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 09:05:27:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXXXXXXXXXXXXXXXXX Data delay found: 8 09:05:27:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXX__________________ Data delay found: 37 09:05:27:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________ Data delay found: 38 09:05:27:setup_element:INFO: Setting the data phase to 3 for uplink 24 09:05:27:setup_element:INFO: Setting the data phase to 4 for uplink 25 09:05:27:setup_element:INFO: Setting the data phase to 33 for uplink 26 09:05:27:setup_element:INFO: Setting the data phase to 38 for uplink 27 09:05:27:setup_element:INFO: Setting the data phase to 6 for uplink 28 09:05:27:setup_element:INFO: Setting the data phase to 8 for uplink 29 09:05:27:setup_element:INFO: Setting the data phase to 37 for uplink 30 09:05:27:setup_element:INFO: Setting the data phase to 38 for uplink 31 09:05:27:setup_element:INFO: Beginning SMX ASICs map scan 09:05:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:05:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:05:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:05:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:05:27:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 09:05:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 09:05:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 09:05:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 09:05:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 09:05:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 09:05:28:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 09:05:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 09:05:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 09:05:29:setup_element:INFO: Performing Elink synchronization 09:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 09:05:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 09:05:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 09:05:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 09:05:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 09:05:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 09:05:30:febtest:INFO: Init all SMX (CSA): 30 09:05:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:05:37:febtest:INFO: 30-01 | XA-000-08-003-000-006-051-08 | 37.7 | 1153.7 09:05:37:febtest:INFO: 28-03 | XA-000-08-003-000-006-051-08 | 34.6 | 1159.7 09:05:37:febtest:INFO: 26-05 | XA-000-08-003-000-006-051-08 | 28.2 | 1183.3 09:05:38:febtest:INFO: 24-07 | XA-000-08-003-000-006-051-08 | 28.2 | 1183.3 09:05:39:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 09:05:41:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV 09:05:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:41:ST3_smx:INFO: Electrons 09:05:41:ST3_smx:INFO: # loops 0 09:05:42:ST3_smx:INFO: # loops 1 09:05:44:ST3_smx:INFO: # loops 2 09:05:45:ST3_smx:INFO: Total # of broken channels: 0 09:05:45:ST3_smx:INFO: List of broken channels: [] 09:05:45:ST3_smx:INFO: Total # of broken channels: 0 09:05:45:ST3_smx:INFO: List of broken channels: [] 09:05:47:ST3_smx:INFO: chip: 28-3 34.556970 C 1171.483840 mV 09:05:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:47:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:47:ST3_smx:INFO: Electrons 09:05:47:ST3_smx:INFO: # loops 0 09:05:49:ST3_smx:INFO: # loops 1 09:05:51:ST3_smx:INFO: # loops 2 09:05:53:ST3_smx:INFO: Total # of broken channels: 0 09:05:53:ST3_smx:INFO: List of broken channels: [] 09:05:53:ST3_smx:INFO: Total # of broken channels: 0 09:05:53:ST3_smx:INFO: List of broken channels: [] 09:05:55:ST3_smx:INFO: chip: 26-5 28.225000 C 1195.082160 mV 09:05:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:05:55:ST3_smx:INFO: Electrons 09:05:55:ST3_smx:INFO: # loops 0 09:05:57:ST3_smx:INFO: # loops 1 09:05:58:ST3_smx:INFO: # loops 2 09:06:00:ST3_smx:INFO: Total # of broken channels: 0 09:06:00:ST3_smx:INFO: List of broken channels: [] 09:06:00:ST3_smx:INFO: Total # of broken channels: 0 09:06:00:ST3_smx:INFO: List of broken channels: [] 09:06:01:ST3_smx:INFO: chip: 24-7 28.225000 C 1195.082160 mV 09:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:06:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 09:06:01:ST3_smx:INFO: Electrons 09:06:01:ST3_smx:INFO: # loops 0 09:06:03:ST3_smx:INFO: # loops 1 09:06:05:ST3_smx:INFO: # loops 2 09:06:06:ST3_smx:INFO: Total # of broken channels: 0 09:06:06:ST3_smx:INFO: List of broken channels: [] 09:06:06:ST3_smx:INFO: Total # of broken channels: 0 09:06:06:ST3_smx:INFO: List of broken channels: [] 09:06:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 09:06:07:febtest:INFO: 30-01 | XA-000-08-003-000-006-051-08 | 37.7 | 1189.2 09:06:07:febtest:INFO: 28-03 | XA-000-08-003-000-006-051-08 | 34.6 | 1189.2 09:06:07:febtest:INFO: 26-05 | XA-000-08-003-000-006-051-08 | 31.4 | 1212.7 09:06:07:febtest:INFO: 24-07 | XA-000-08-003-000-006-051-08 | 28.2 | 1212.7 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_09_19-09_05_19 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4076| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.8172', '1.850', '1.3130'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0790', '1.850', '1.3320'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0590', '1.850', '0.2701']