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FEB_4078 20.01.25 13:47:13
Info
13:47:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:47:13:ST3_Shared:INFO: FEB-Microcable
13:47:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:47:13:febtest:INFO: Testing FEB with SN 4078
13:47:15:smx_tester:INFO: Scanning setup
13:47:15:elinks:INFO: Disabling clock on downlink 0
13:47:15:elinks:INFO: Disabling clock on downlink 1
13:47:15:elinks:INFO: Disabling clock on downlink 2
13:47:15:elinks:INFO: Disabling clock on downlink 3
13:47:15:elinks:INFO: Disabling clock on downlink 4
13:47:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:47:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:47:15:elinks:INFO: Disabling clock on downlink 0
13:47:15:elinks:INFO: Disabling clock on downlink 1
13:47:15:elinks:INFO: Disabling clock on downlink 2
13:47:15:elinks:INFO: Disabling clock on downlink 3
13:47:15:elinks:INFO: Disabling clock on downlink 4
13:47:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:47:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:47:15:elinks:INFO: Disabling clock on downlink 0
13:47:15:elinks:INFO: Disabling clock on downlink 1
13:47:15:elinks:INFO: Disabling clock on downlink 2
13:47:15:elinks:INFO: Disabling clock on downlink 3
13:47:15:elinks:INFO: Disabling clock on downlink 4
13:47:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:47:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:47:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:47:15:elinks:INFO: Disabling clock on downlink 0
13:47:15:elinks:INFO: Disabling clock on downlink 1
13:47:15:elinks:INFO: Disabling clock on downlink 2
13:47:15:elinks:INFO: Disabling clock on downlink 3
13:47:15:elinks:INFO: Disabling clock on downlink 4
13:47:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:47:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:47:15:elinks:INFO: Disabling clock on downlink 0
13:47:15:elinks:INFO: Disabling clock on downlink 1
13:47:15:elinks:INFO: Disabling clock on downlink 2
13:47:15:elinks:INFO: Disabling clock on downlink 3
13:47:15:elinks:INFO: Disabling clock on downlink 4
13:47:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:47:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:47:15:setup_element:INFO: Scanning clock phase
13:47:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:47:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:16:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:47:16:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXX____
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXX____
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXX____
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:47:16:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:47:16:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
13:47:16:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXX__
Clock Delay: 35
13:47:16:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:47:16:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________________XXXXX_
Clock Delay: 36
13:47:16:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
13:47:16:setup_element:INFO: Scanning data phases
13:47:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:47:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:21:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:47:21:setup_element:INFO: Eye window for uplink 16: XXXX__________________________________XX
Data delay found: 20
13:47:21:setup_element:INFO: Eye window for uplink 17: X___________________________________XXXX
Data delay found: 18
13:47:21:setup_element:INFO: Eye window for uplink 18: ____________________________________XXXX
Data delay found: 17
13:47:21:setup_element:INFO: Eye window for uplink 19: __________________________________XXXX__
Data delay found: 15
13:47:21:setup_element:INFO: Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
13:47:21:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX
Data delay found: 17
13:47:21:setup_element:INFO: Eye window for uplink 22: _________________________________XXXXX__
Data delay found: 15
13:47:21:setup_element:INFO: Eye window for uplink 23: ______________________________XXXX______
Data delay found: 11
13:47:21:setup_element:INFO: Eye window for uplink 24: ____XXXXXX______________________________
Data delay found: 26
13:47:21:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
13:47:21:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
13:47:21:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
13:47:21:setup_element:INFO: Eye window for uplink 28: ______________XXXXX_____________________
Data delay found: 36
13:47:21:setup_element:INFO: Eye window for uplink 29: _________________XXXX___________________
Data delay found: 38
13:47:21:setup_element:INFO: Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
13:47:21:setup_element:INFO: Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
13:47:21:setup_element:INFO: Setting the data phase to 20 for uplink 16
13:47:21:setup_element:INFO: Setting the data phase to 18 for uplink 17
13:47:21:setup_element:INFO: Setting the data phase to 17 for uplink 18
13:47:21:setup_element:INFO: Setting the data phase to 15 for uplink 19
13:47:21:setup_element:INFO: Setting the data phase to 17 for uplink 20
13:47:21:setup_element:INFO: Setting the data phase to 17 for uplink 21
13:47:21:setup_element:INFO: Setting the data phase to 15 for uplink 22
13:47:21:setup_element:INFO: Setting the data phase to 11 for uplink 23
13:47:21:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:47:21:setup_element:INFO: Setting the data phase to 29 for uplink 25
13:47:21:setup_element:INFO: Setting the data phase to 29 for uplink 26
13:47:21:setup_element:INFO: Setting the data phase to 33 for uplink 27
13:47:21:setup_element:INFO: Setting the data phase to 36 for uplink 28
13:47:21:setup_element:INFO: Setting the data phase to 38 for uplink 29
13:47:21:setup_element:INFO: Setting the data phase to 39 for uplink 30
13:47:21:setup_element:INFO: Setting the data phase to 0 for uplink 31
13:47:21:setup_element:INFO: Beginning SMX ASICs map scan
13:47:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:47:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:47:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:47:21:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:47:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:47:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:47:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:47:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:47:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:47:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:47:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:47:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:47:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:47:22:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:47:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:47:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:47:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:47:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:47:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:47:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:47:24:setup_element:INFO: Performing Elink synchronization
13:47:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:47:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:47:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:47:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:47:24:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:47:24:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:47:24:febtest:INFO: Init all SMX (CSA): 30
13:47:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:47:38:febtest:INFO: 23-00 | XA-000-08-003-000-006-051-08 | 31.4 | 1183.3
13:47:38:febtest:INFO: 30-01 | XA-000-09-004-004-004-022-14 | 47.3 | 1141.9
13:47:38:febtest:INFO: 21-02 | XA-000-08-003-000-006-051-08 | 34.6 | 1171.5
13:47:39:febtest:INFO: 28-03 | XA-000-08-003-000-006-051-08 | 31.4 | 1195.1
13:47:39:febtest:INFO: 19-04 | XA-000-08-003-000-006-051-08 | 25.1 | 1201.0
13:47:39:febtest:INFO: 26-05 | XA-000-08-003-000-006-051-08 | 21.9 | 1578.5
13:47:39:febtest:INFO: 17-06 | XA-000-08-003-000-006-037-15 | 37.7 | 1165.6
13:47:39:febtest:INFO: 24-07 | XA-000-09-004-004-004-018-14 | 37.7 | 1177.4
13:47:40:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:47:42:ST3_smx:INFO: chip: 23-0 31.389742 C 1195.082160 mV
13:47:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:42:ST3_smx:INFO: Electrons
13:47:42:ST3_smx:INFO: # loops 0
13:47:44:ST3_smx:INFO: # loops 1
13:47:46:ST3_smx:INFO: # loops 2
13:47:47:ST3_smx:INFO: Total # of broken channels: 0
13:47:47:ST3_smx:INFO: List of broken channels: []
13:47:47:ST3_smx:INFO: Total # of broken channels: 0
13:47:47:ST3_smx:INFO: List of broken channels: []
13:47:49:ST3_smx:INFO: chip: 30-1 47.250730 C 1153.732915 mV
13:47:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:49:ST3_smx:INFO: Electrons
13:47:49:ST3_smx:INFO: # loops 0
13:47:51:ST3_smx:INFO: # loops 1
13:47:52:ST3_smx:INFO: # loops 2
13:47:54:ST3_smx:INFO: Total # of broken channels: 0
13:47:54:ST3_smx:INFO: List of broken channels: []
13:47:54:ST3_smx:INFO: Total # of broken channels: 0
13:47:54:ST3_smx:INFO: List of broken channels: []
13:47:55:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV
13:47:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:47:55:ST3_smx:INFO: Electrons
13:47:55:ST3_smx:INFO: # loops 0
13:47:57:ST3_smx:INFO: # loops 1
13:47:59:ST3_smx:INFO: # loops 2
13:48:00:ST3_smx:INFO: Total # of broken channels: 0
13:48:00:ST3_smx:INFO: List of broken channels: []
13:48:00:ST3_smx:INFO: Total # of broken channels: 0
13:48:00:ST3_smx:INFO: List of broken channels: []
13:48:02:ST3_smx:INFO: chip: 28-3 31.389742 C 1212.728715 mV
13:48:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:02:ST3_smx:INFO: Electrons
13:48:02:ST3_smx:INFO: # loops 0
13:48:03:ST3_smx:INFO: # loops 1
13:48:05:ST3_smx:INFO: # loops 2
13:48:06:ST3_smx:INFO: Total # of broken channels: 0
13:48:06:ST3_smx:INFO: List of broken channels: []
13:48:06:ST3_smx:INFO: Total # of broken channels: 0
13:48:06:ST3_smx:INFO: List of broken channels: []
13:48:08:ST3_smx:INFO: chip: 19-4 28.225000 C 1218.600960 mV
13:48:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:08:ST3_smx:INFO: Electrons
13:48:08:ST3_smx:INFO: # loops 0
13:48:10:ST3_smx:INFO: # loops 1
13:48:12:ST3_smx:INFO: # loops 2
13:48:13:ST3_smx:INFO: Total # of broken channels: 0
13:48:13:ST3_smx:INFO: List of broken channels: []
13:48:13:ST3_smx:INFO: Total # of broken channels: 0
13:48:13:ST3_smx:INFO: List of broken channels: []
13:48:15:ST3_smx:INFO: chip: 26-5 21.902970 C 1578.532875 mV
13:48:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:15:ST3_smx:INFO: Electrons
13:48:15:ST3_smx:INFO: # loops 0
13:48:17:ST3_smx:INFO: # loops 1
13:48:18:ST3_smx:INFO: # loops 2
13:48:20:ST3_smx:INFO: Total # of broken channels: 0
13:48:20:ST3_smx:INFO: List of broken channels: []
13:48:20:ST3_smx:INFO: Total # of broken channels: 0
13:48:20:ST3_smx:INFO: List of broken channels: []
13:48:21:ST3_smx:INFO: chip: 17-6 37.726682 C 1177.390875 mV
13:48:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:21:ST3_smx:INFO: Electrons
13:48:21:ST3_smx:INFO: # loops 0
13:48:23:ST3_smx:INFO: # loops 1
13:48:25:ST3_smx:INFO: # loops 2
13:48:26:ST3_smx:INFO: Total # of broken channels: 0
13:48:26:ST3_smx:INFO: List of broken channels: []
13:48:26:ST3_smx:INFO: Total # of broken channels: 0
13:48:26:ST3_smx:INFO: List of broken channels: []
13:48:28:ST3_smx:INFO: chip: 24-7 40.898880 C 1195.082160 mV
13:48:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:48:28:ST3_smx:INFO: Electrons
13:48:28:ST3_smx:INFO: # loops 0
13:48:29:ST3_smx:INFO: # loops 1
13:48:31:ST3_smx:INFO: # loops 2
13:48:32:ST3_smx:INFO: Total # of broken channels: 0
13:48:32:ST3_smx:INFO: List of broken channels: []
13:48:32:ST3_smx:INFO: Total # of broken channels: 0
13:48:32:ST3_smx:INFO: List of broken channels: []
13:48:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:48:33:febtest:INFO: 23-00 | XA-000-08-003-000-006-051-08 | 34.6 | 1230.3
13:48:33:febtest:INFO: 30-01 | XA-000-09-004-004-004-022-14 | 50.4 | 1177.4
13:48:33:febtest:INFO: 21-02 | XA-000-08-003-000-006-051-08 | 37.7 | 1218.6
13:48:34:febtest:INFO: 28-03 | XA-000-08-003-000-006-051-08 | 34.6 | 1242.0
13:48:34:febtest:INFO: 19-04 | XA-000-08-003-000-006-051-08 | 28.2 | 1242.0
13:48:34:febtest:INFO: 26-05 | XA-000-08-003-000-006-051-08 | 12.4 | 1578.5
13:48:34:febtest:INFO: 17-06 | XA-000-08-003-000-006-037-15 | 40.9 | 1201.0
13:48:34:febtest:INFO: 24-07 | XA-000-09-004-004-004-018-14 | 44.1 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_20-13_47_13
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4078| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.4680', '1.850', '2.3600']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0300', '1.850', '2.6500']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0050', '1.850', '0.5276']