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FEB_4079 20.09.24 10:54:57
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10:54:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:57:ST3_Shared:INFO: FEB-Microcable
10:54:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:54:57:febtest:INFO: Testing FEB with SN 4079
10:54:59:smx_tester:INFO: Scanning setup
10:54:59:elinks:INFO: Disabling clock on downlink 0
10:54:59:elinks:INFO: Disabling clock on downlink 1
10:54:59:elinks:INFO: Disabling clock on downlink 2
10:54:59:elinks:INFO: Disabling clock on downlink 3
10:54:59:elinks:INFO: Disabling clock on downlink 4
10:54:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:54:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:59:elinks:INFO: Disabling clock on downlink 0
10:54:59:elinks:INFO: Disabling clock on downlink 1
10:54:59:elinks:INFO: Disabling clock on downlink 2
10:54:59:elinks:INFO: Disabling clock on downlink 3
10:54:59:elinks:INFO: Disabling clock on downlink 4
10:54:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:54:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:59:elinks:INFO: Disabling clock on downlink 0
10:54:59:elinks:INFO: Disabling clock on downlink 1
10:54:59:elinks:INFO: Disabling clock on downlink 2
10:54:59:elinks:INFO: Disabling clock on downlink 3
10:54:59:elinks:INFO: Disabling clock on downlink 4
10:54:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:54:59:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:54:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:59:elinks:INFO: Disabling clock on downlink 0
10:54:59:elinks:INFO: Disabling clock on downlink 1
10:54:59:elinks:INFO: Disabling clock on downlink 2
10:54:59:elinks:INFO: Disabling clock on downlink 3
10:54:59:elinks:INFO: Disabling clock on downlink 4
10:54:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:54:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:59:elinks:INFO: Disabling clock on downlink 0
10:54:59:elinks:INFO: Disabling clock on downlink 1
10:54:59:elinks:INFO: Disabling clock on downlink 2
10:54:59:elinks:INFO: Disabling clock on downlink 3
10:54:59:elinks:INFO: Disabling clock on downlink 4
10:54:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:54:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:54:59:setup_element:INFO: Scanning clock phase
10:54:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:54:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:00:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:55:00:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:55:00:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXX__________
Clock Delay: 26
10:55:00:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXX__________
Clock Delay: 27
10:55:00:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXX__________
Clock Delay: 27
10:55:00:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:55:00:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:55:00:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:55:00:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:55:00:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2
10:55:00:setup_element:INFO: Scanning data phases
10:55:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:05:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:55:05:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
10:55:05:setup_element:INFO: Eye window for uplink 25: ________XXXXXX__________________________
Data delay found: 30
10:55:05:setup_element:INFO: Eye window for uplink 26: _____XXXXXXX______________________XXXXXX
Data delay found: 22
10:55:05:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXXX________________XXXXXX
Data delay found: 25
10:55:05:setup_element:INFO: Eye window for uplink 28: _____________XXXXXXX____________________
Data delay found: 36
10:55:05:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
10:55:05:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXXX__________________
Data delay found: 37
10:55:05:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
10:55:05:setup_element:INFO: Setting the data phase to 27 for uplink 24
10:55:05:setup_element:INFO: Setting the data phase to 30 for uplink 25
10:55:05:setup_element:INFO: Setting the data phase to 22 for uplink 26
10:55:05:setup_element:INFO: Setting the data phase to 25 for uplink 27
10:55:05:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:55:05:setup_element:INFO: Setting the data phase to 39 for uplink 29
10:55:05:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:55:05:setup_element:INFO: Setting the data phase to 38 for uplink 31
10:55:05:setup_element:INFO: Beginning SMX ASICs map scan
10:55:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:55:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:55:05:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:55:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:55:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:55:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:55:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:55:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:55:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:55:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:55:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:55:07:setup_element:INFO: Performing Elink synchronization
10:55:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:55:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:55:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:55:07:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:55:08:febtest:INFO: Init all SMX (CSA): 30
10:55:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:16:febtest:INFO: 30-01 | XA-000-08-003-000-005-113-03 | 34.6 | 1171.5
10:55:17:febtest:INFO: 28-03 | XA-000-08-003-000-005-112-03 | 47.3 | 1124.0
10:55:17:febtest:INFO: 26-05 | XA-000-08-003-000-005-111-04 | 31.4 | 1171.5
10:55:17:febtest:INFO: 24-07 | XA-000-08-003-000-005-109-04 | 21.9 | 1206.9
10:55:18:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:55:20:ST3_smx:INFO: chip: 30-1 34.556970 C 1183.292940 mV
10:55:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:20:ST3_smx:INFO: Electrons
10:55:20:ST3_smx:INFO: # loops 0
10:55:22:ST3_smx:INFO: # loops 1
10:55:24:ST3_smx:INFO: # loops 2
10:55:26:ST3_smx:INFO: Total # of broken channels: 0
10:55:26:ST3_smx:INFO: List of broken channels: []
10:55:26:ST3_smx:INFO: Total # of broken channels: 0
10:55:26:ST3_smx:INFO: List of broken channels: []
10:55:28:ST3_smx:INFO: chip: 28-3 47.250730 C 1135.937260 mV
10:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:28:ST3_smx:INFO: Electrons
10:55:28:ST3_smx:INFO: # loops 0
10:55:30:ST3_smx:INFO: # loops 1
10:55:32:ST3_smx:INFO: # loops 2
10:55:33:ST3_smx:INFO: Total # of broken channels: 0
10:55:33:ST3_smx:INFO: List of broken channels: []
10:55:33:ST3_smx:INFO: Total # of broken channels: 0
10:55:33:ST3_smx:INFO: List of broken channels: []
10:55:35:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
10:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:35:ST3_smx:INFO: Electrons
10:55:35:ST3_smx:INFO: # loops 0
10:55:37:ST3_smx:INFO: # loops 1
10:55:39:ST3_smx:INFO: # loops 2
10:55:41:ST3_smx:INFO: Total # of broken channels: 0
10:55:41:ST3_smx:INFO: List of broken channels: []
10:55:41:ST3_smx:INFO: Total # of broken channels: 0
10:55:41:ST3_smx:INFO: List of broken channels: []
10:55:42:ST3_smx:INFO: chip: 24-7 25.062742 C 1218.600960 mV
10:55:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:55:42:ST3_smx:INFO: Electrons
10:55:42:ST3_smx:INFO: # loops 0
10:55:44:ST3_smx:INFO: # loops 1
10:55:46:ST3_smx:INFO: # loops 2
10:55:48:ST3_smx:INFO: Total # of broken channels: 0
10:55:48:ST3_smx:INFO: List of broken channels: []
10:55:48:ST3_smx:INFO: Total # of broken channels: 0
10:55:48:ST3_smx:INFO: List of broken channels: []
10:55:48:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:55:49:febtest:INFO: 30-01 | XA-000-08-003-000-005-113-03 | 37.7 | 1201.0
10:55:49:febtest:INFO: 28-03 | XA-000-08-003-000-005-112-03 | 50.4 | 1159.7
10:55:49:febtest:INFO: 26-05 | XA-000-08-003-000-005-111-04 | 34.6 | 1206.9
10:55:49:febtest:INFO: 24-07 | XA-000-08-003-000-005-109-04 | 28.2 | 1236.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_20-10_54_57
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4079| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9569', '1.850', '1.0300']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '1.2860']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9844', '1.850', '0.2647']