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FEB_4079 23.09.24 11:50:42
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11:50:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:50:42:ST3_Shared:INFO: FEB-Microcable
11:50:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:50:42:febtest:INFO: Testing FEB with SN 4079
11:50:43:smx_tester:INFO: Scanning setup
11:50:43:elinks:INFO: Disabling clock on downlink 0
11:50:43:elinks:INFO: Disabling clock on downlink 1
11:50:43:elinks:INFO: Disabling clock on downlink 2
11:50:43:elinks:INFO: Disabling clock on downlink 3
11:50:43:elinks:INFO: Disabling clock on downlink 4
11:50:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:50:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:50:43:elinks:INFO: Disabling clock on downlink 0
11:50:43:elinks:INFO: Disabling clock on downlink 1
11:50:43:elinks:INFO: Disabling clock on downlink 2
11:50:43:elinks:INFO: Disabling clock on downlink 3
11:50:43:elinks:INFO: Disabling clock on downlink 4
11:50:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:50:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:50:43:elinks:INFO: Disabling clock on downlink 0
11:50:43:elinks:INFO: Disabling clock on downlink 1
11:50:43:elinks:INFO: Disabling clock on downlink 2
11:50:43:elinks:INFO: Disabling clock on downlink 3
11:50:43:elinks:INFO: Disabling clock on downlink 4
11:50:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:50:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:50:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:50:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:50:44:elinks:INFO: Disabling clock on downlink 0
11:50:44:elinks:INFO: Disabling clock on downlink 1
11:50:44:elinks:INFO: Disabling clock on downlink 2
11:50:44:elinks:INFO: Disabling clock on downlink 3
11:50:44:elinks:INFO: Disabling clock on downlink 4
11:50:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:50:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:50:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:50:44:elinks:INFO: Disabling clock on downlink 0
11:50:44:elinks:INFO: Disabling clock on downlink 1
11:50:44:elinks:INFO: Disabling clock on downlink 2
11:50:44:elinks:INFO: Disabling clock on downlink 3
11:50:44:elinks:INFO: Disabling clock on downlink 4
11:50:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:50:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:50:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:50:44:setup_element:INFO: Scanning clock phase
11:50:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:50:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:50:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:50:44:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXX___________
Clock Delay: 26
11:50:44:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXX___________
Clock Delay: 26
11:50:44:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________XXXXXX_________
Clock Delay: 27
11:50:44:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________XXXXXX_________
Clock Delay: 27
11:50:44:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
11:50:44:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
11:50:44:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXX_________
Clock Delay: 28
11:50:44:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXX_________
Clock Delay: 28
11:50:44:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXX__________
Clock Delay: 26
11:50:44:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXX__________
Clock Delay: 26
11:50:44:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXX_________
Clock Delay: 28
11:50:44:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXX_________
Clock Delay: 28
11:50:44:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
11:50:44:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
11:50:44:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
11:50:44:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
11:50:44:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
11:50:44:setup_element:INFO: Scanning data phases
11:50:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:50:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:50:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:50:49:setup_element:INFO: Eye window for uplink 16: X_X______________________________X_XXXXX
Data delay found: 17
11:50:49:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXXX__
Data delay found: 14
11:50:49:setup_element:INFO: Eye window for uplink 18: X________________________________XXXXXXX
Data delay found: 16
11:50:49:setup_element:INFO: Eye window for uplink 19: ______________________________XXXXXXXX__
Data delay found: 13
11:50:49:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_
Data delay found: 16
11:50:49:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
11:50:49:setup_element:INFO: Eye window for uplink 22: X_________________________________XXXXX_
Data delay found: 17
11:50:49:setup_element:INFO: Eye window for uplink 23: XX____________________________XXXXXXXXXX
Data delay found: 15
11:50:49:setup_element:INFO: Eye window for uplink 24: XXXXXXXX_______________________________X
Data delay found: 23
11:50:49:setup_element:INFO: Eye window for uplink 25: ___XXXXXXXX_____________________________
Data delay found: 26
11:50:49:setup_element:INFO: Eye window for uplink 26: ___XXXXXXX______________________________
Data delay found: 26
11:50:49:setup_element:INFO: Eye window for uplink 27: ______XXXXXXXXX_________________________
Data delay found: 30
11:50:49:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXX______________________
Data delay found: 34
11:50:49:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
11:50:49:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXXX___________________
Data delay found: 36
11:50:49:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________
Data delay found: 37
11:50:49:setup_element:INFO: Setting the data phase to 17 for uplink 16
11:50:49:setup_element:INFO: Setting the data phase to 14 for uplink 17
11:50:49:setup_element:INFO: Setting the data phase to 16 for uplink 18
11:50:49:setup_element:INFO: Setting the data phase to 13 for uplink 19
11:50:49:setup_element:INFO: Setting the data phase to 16 for uplink 20
11:50:49:setup_element:INFO: Setting the data phase to 15 for uplink 21
11:50:49:setup_element:INFO: Setting the data phase to 17 for uplink 22
11:50:49:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:50:50:setup_element:INFO: Setting the data phase to 23 for uplink 24
11:50:50:setup_element:INFO: Setting the data phase to 26 for uplink 25
11:50:50:setup_element:INFO: Setting the data phase to 26 for uplink 26
11:50:50:setup_element:INFO: Setting the data phase to 30 for uplink 27
11:50:50:setup_element:INFO: Setting the data phase to 34 for uplink 28
11:50:50:setup_element:INFO: Setting the data phase to 37 for uplink 29
11:50:50:setup_element:INFO: Setting the data phase to 36 for uplink 30
11:50:50:setup_element:INFO: Setting the data phase to 37 for uplink 31
11:50:50:setup_element:INFO: Beginning SMX ASICs map scan
11:50:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:50:50:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:50:50:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:50:50:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:50:50:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:50:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:50:50:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:50:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:50:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:50:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:50:50:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:50:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:50:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:50:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:50:50:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:50:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:50:51:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:50:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:50:51:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:50:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:50:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:50:52:setup_element:INFO: Performing Elink synchronization
11:50:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:50:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:50:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:50:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:50:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:50:52:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:50:53:febtest:INFO: Init all SMX (CSA): 30
11:51:06:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:51:07:febtest:INFO: 23-00 | XA-000-08-003-000-005-108-04 | 44.1 | 1147.8
11:51:07:febtest:INFO: 30-01 | XA-000-08-003-000-005-113-03 | 40.9 | 1171.5
11:51:07:febtest:INFO: 21-02 | XA-000-08-003-000-005-106-04 | 47.3 | 1130.0
11:51:07:febtest:INFO: 28-03 | XA-000-08-003-000-005-112-03 | 53.6 | 1124.0
11:51:07:febtest:INFO: 19-04 | XA-000-08-003-000-005-105-04 | 47.3 | 1130.0
11:51:08:febtest:INFO: 26-05 | XA-000-08-003-000-005-111-04 | 31.4 | 1189.2
11:51:08:febtest:INFO: 17-06 | XA-000-08-003-000-005-104-04 | 18.7 | 1224.5
11:51:08:febtest:INFO: 24-07 | XA-000-08-003-000-005-109-04 | 25.1 | 1212.7
11:51:09:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:51:11:ST3_smx:INFO: chip: 23-0 44.073563 C 1159.654860 mV
11:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:11:ST3_smx:INFO: Electrons
11:51:11:ST3_smx:INFO: # loops 0
11:51:13:ST3_smx:INFO: # loops 1
11:51:14:ST3_smx:INFO: # loops 2
11:51:16:ST3_smx:INFO: Total # of broken channels: 0
11:51:16:ST3_smx:INFO: List of broken channels: []
11:51:16:ST3_smx:INFO: Total # of broken channels: 0
11:51:16:ST3_smx:INFO: List of broken channels: []
11:51:17:ST3_smx:INFO: chip: 30-1 40.898880 C 1183.292940 mV
11:51:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:17:ST3_smx:INFO: Electrons
11:51:17:ST3_smx:INFO: # loops 0
11:51:19:ST3_smx:INFO: # loops 1
11:51:20:ST3_smx:INFO: # loops 2
11:51:22:ST3_smx:INFO: Total # of broken channels: 0
11:51:22:ST3_smx:INFO: List of broken channels: []
11:51:22:ST3_smx:INFO: Total # of broken channels: 0
11:51:22:ST3_smx:INFO: List of broken channels: []
11:51:23:ST3_smx:INFO: chip: 21-2 47.250730 C 1141.874115 mV
11:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:24:ST3_smx:INFO: Electrons
11:51:24:ST3_smx:INFO: # loops 0
11:51:25:ST3_smx:INFO: # loops 1
11:51:27:ST3_smx:INFO: # loops 2
11:51:28:ST3_smx:INFO: Total # of broken channels: 0
11:51:28:ST3_smx:INFO: List of broken channels: []
11:51:28:ST3_smx:INFO: Total # of broken channels: 0
11:51:28:ST3_smx:INFO: List of broken channels: []
11:51:30:ST3_smx:INFO: chip: 28-3 53.612520 C 1141.874115 mV
11:51:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:30:ST3_smx:INFO: Electrons
11:51:30:ST3_smx:INFO: # loops 0
11:51:31:ST3_smx:INFO: # loops 1
11:51:33:ST3_smx:INFO: # loops 2
11:51:35:ST3_smx:INFO: Total # of broken channels: 0
11:51:35:ST3_smx:INFO: List of broken channels: []
11:51:35:ST3_smx:INFO: Total # of broken channels: 0
11:51:35:ST3_smx:INFO: List of broken channels: []
11:51:36:ST3_smx:INFO: chip: 19-4 47.250730 C 1141.874115 mV
11:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:36:ST3_smx:INFO: Electrons
11:51:36:ST3_smx:INFO: # loops 0
11:51:38:ST3_smx:INFO: # loops 1
11:51:39:ST3_smx:INFO: # loops 2
11:51:41:ST3_smx:INFO: Total # of broken channels: 0
11:51:41:ST3_smx:INFO: List of broken channels: []
11:51:41:ST3_smx:INFO: Total # of broken channels: 0
11:51:41:ST3_smx:INFO: List of broken channels: []
11:51:42:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
11:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:42:ST3_smx:INFO: Electrons
11:51:42:ST3_smx:INFO: # loops 0
11:51:44:ST3_smx:INFO: # loops 1
11:51:45:ST3_smx:INFO: # loops 2
11:51:47:ST3_smx:INFO: Total # of broken channels: 0
11:51:47:ST3_smx:INFO: List of broken channels: []
11:51:47:ST3_smx:INFO: Total # of broken channels: 0
11:51:47:ST3_smx:INFO: List of broken channels: []
11:51:49:ST3_smx:INFO: chip: 17-6 21.902970 C 1236.187875 mV
11:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:49:ST3_smx:INFO: Electrons
11:51:49:ST3_smx:INFO: # loops 0
11:51:50:ST3_smx:INFO: # loops 1
11:51:52:ST3_smx:INFO: # loops 2
11:51:53:ST3_smx:INFO: Total # of broken channels: 0
11:51:53:ST3_smx:INFO: List of broken channels: []
11:51:53:ST3_smx:INFO: Total # of broken channels: 0
11:51:53:ST3_smx:INFO: List of broken channels: []
11:51:55:ST3_smx:INFO: chip: 24-7 28.225000 C 1224.468235 mV
11:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:51:55:ST3_smx:INFO: Electrons
11:51:55:ST3_smx:INFO: # loops 0
11:51:56:ST3_smx:INFO: # loops 1
11:51:58:ST3_smx:INFO: # loops 2
11:51:59:ST3_smx:INFO: Total # of broken channels: 0
11:51:59:ST3_smx:INFO: List of broken channels: []
11:51:59:ST3_smx:INFO: Total # of broken channels: 0
11:51:59:ST3_smx:INFO: List of broken channels: []
11:52:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:52:00:febtest:INFO: 23-00 | XA-000-08-003-000-005-108-04 | 47.3 | 1177.4
11:52:00:febtest:INFO: 30-01 | XA-000-08-003-000-005-113-03 | 40.9 | 1201.0
11:52:00:febtest:INFO: 21-02 | XA-000-08-003-000-005-106-04 | 50.4 | 1159.7
11:52:01:febtest:INFO: 28-03 | XA-000-08-003-000-005-112-03 | 56.8 | 1165.6
11:52:01:febtest:INFO: 19-04 | XA-000-08-003-000-005-105-04 | 50.4 | 1159.7
11:52:01:febtest:INFO: 26-05 | XA-000-08-003-000-005-111-04 | 37.7 | 1218.6
11:52:01:febtest:INFO: 17-06 | XA-000-08-003-000-005-104-04 | 21.9 | 1253.7
11:52:01:febtest:INFO: 24-07 | XA-000-08-003-000-005-109-04 | 28.2 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_23-11_50_42
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4079| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.4600', '1.850', '1.8410']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '2.5700']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9620', '1.850', '0.5242']