
FEB_4080 24.09.24 12:53:13
TextEdit.txt
12:53:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:53:13:ST3_Shared:INFO: FEB-Microcable 12:53:13:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 12:53:13:febtest:INFO: Testing FEB with SN 4080 12:53:14:smx_tester:INFO: Scanning setup 12:53:14:elinks:INFO: Disabling clock on downlink 0 12:53:14:elinks:INFO: Disabling clock on downlink 1 12:53:14:elinks:INFO: Disabling clock on downlink 2 12:53:14:elinks:INFO: Disabling clock on downlink 3 12:53:14:elinks:INFO: Disabling clock on downlink 4 12:53:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 12:53:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:14:elinks:INFO: Disabling clock on downlink 0 12:53:14:elinks:INFO: Disabling clock on downlink 1 12:53:14:elinks:INFO: Disabling clock on downlink 2 12:53:14:elinks:INFO: Disabling clock on downlink 3 12:53:14:elinks:INFO: Disabling clock on downlink 4 12:53:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 12:53:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:14:elinks:INFO: Disabling clock on downlink 0 12:53:14:elinks:INFO: Disabling clock on downlink 1 12:53:14:elinks:INFO: Disabling clock on downlink 2 12:53:14:elinks:INFO: Disabling clock on downlink 3 12:53:14:elinks:INFO: Disabling clock on downlink 4 12:53:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 12:53:15:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 12:53:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:15:elinks:INFO: Disabling clock on downlink 0 12:53:15:elinks:INFO: Disabling clock on downlink 1 12:53:15:elinks:INFO: Disabling clock on downlink 2 12:53:15:elinks:INFO: Disabling clock on downlink 3 12:53:15:elinks:INFO: Disabling clock on downlink 4 12:53:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 12:53:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:15:elinks:INFO: Disabling clock on downlink 0 12:53:15:elinks:INFO: Disabling clock on downlink 1 12:53:15:elinks:INFO: Disabling clock on downlink 2 12:53:15:elinks:INFO: Disabling clock on downlink 3 12:53:15:elinks:INFO: Disabling clock on downlink 4 12:53:15:setup_element:INFO: Checking SOS, encoding_mode: SOS 12:53:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 12:53:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 12:53:15:setup_element:INFO: Scanning clock phase 12:53:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:53:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2 12:53:15:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Eye window for uplink 18: __________________________________________________________________XXXXXX________ Clock Delay: 28 12:53:15:setup_element:INFO: Eye window for uplink 19: __________________________________________________________________XXXXXX________ Clock Delay: 28 12:53:15:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________XXXXXXX________ Clock Delay: 28 12:53:15:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________XXXXXXX________ Clock Delay: 28 12:53:15:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXXXX______ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXX________ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXX________ Clock Delay: 29 12:53:15:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 12:53:15:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2 12:53:15:setup_element:INFO: Scanning data phases 12:53:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:53:20:setup_element:INFO: Data phase scan results for group 0, downlink 2 12:53:20:setup_element:INFO: Eye window for uplink 16: XXXX_______________________________XXXXX Data delay found: 19 12:53:20:setup_element:INFO: Eye window for uplink 17: _________________________________XXXXXXX Data delay found: 16 12:53:20:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX Data delay found: 21 12:53:20:setup_element:INFO: Eye window for uplink 19: XX________________________________XXXXXX Data delay found: 17 12:53:20:setup_element:INFO: Eye window for uplink 20: __________________________________XXXXX_ Data delay found: 16 12:53:20:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__ Data delay found: 15 12:53:20:setup_element:INFO: Eye window for uplink 22: XX_________________________________XXXXX Data delay found: 18 12:53:20:setup_element:INFO: Eye window for uplink 23: XXXXX__________________________XXXXXXXXX Data delay found: 17 12:53:20:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________ Data delay found: 29 12:53:20:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXX________________________ Data delay found: 31 12:53:20:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________ Data delay found: 30 12:53:20:setup_element:INFO: Eye window for uplink 27: __________X_XXXXXX______________________ Data delay found: 33 12:53:20:setup_element:INFO: Eye window for uplink 28: ______________XXXXXX____________________ Data delay found: 36 12:53:20:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXXXX_______________ Data delay found: 0 12:53:20:setup_element:INFO: Eye window for uplink 30: ___________X_XXXXXXXX___________________ Data delay found: 35 12:53:20:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXX___________________ Data delay found: 37 12:53:20:setup_element:INFO: Setting the data phase to 19 for uplink 16 12:53:20:setup_element:INFO: Setting the data phase to 16 for uplink 17 12:53:20:setup_element:INFO: Setting the data phase to 21 for uplink 18 12:53:20:setup_element:INFO: Setting the data phase to 17 for uplink 19 12:53:20:setup_element:INFO: Setting the data phase to 16 for uplink 20 12:53:20:setup_element:INFO: Setting the data phase to 15 for uplink 21 12:53:20:setup_element:INFO: Setting the data phase to 18 for uplink 22 12:53:20:setup_element:INFO: Setting the data phase to 17 for uplink 23 12:53:20:setup_element:INFO: Setting the data phase to 29 for uplink 24 12:53:20:setup_element:INFO: Setting the data phase to 31 for uplink 25 12:53:20:setup_element:INFO: Setting the data phase to 30 for uplink 26 12:53:20:setup_element:INFO: Setting the data phase to 33 for uplink 27 12:53:21:setup_element:INFO: Setting the data phase to 36 for uplink 28 12:53:21:setup_element:INFO: Setting the data phase to 0 for uplink 29 12:53:21:setup_element:INFO: Setting the data phase to 35 for uplink 30 12:53:21:setup_element:INFO: Setting the data phase to 37 for uplink 31 12:53:21:setup_element:INFO: Beginning SMX ASICs map scan 12:53:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:53:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:53:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:53:21:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 12:53:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 12:53:21:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 12:53:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 12:53:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 12:53:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 12:53:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 12:53:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 12:53:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 12:53:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 12:53:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 12:53:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 12:53:22:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 12:53:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 12:53:22:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 12:53:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 12:53:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 12:53:23:setup_element:INFO: Performing Elink synchronization 12:53:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 12:53:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 12:53:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 12:53:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 12:53:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 12:53:23:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 12:53:24:febtest:INFO: Init all SMX (CSA): 30 12:53:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:53:39:febtest:INFO: 23-00 | XA-000-08-003-000-005-183-12 | 18.7 | 1218.6 12:53:39:febtest:INFO: 30-01 | XA-000-08-003-000-005-217-07 | 25.1 | 1195.1 12:53:39:febtest:INFO: 21-02 | XA-000-08-003-000-005-212-07 | 47.3 | 1118.1 12:53:39:febtest:INFO: 28-03 | XA-000-08-003-000-005-170-11 | 37.7 | 1147.8 12:53:40:febtest:INFO: 19-04 | XA-000-08-003-000-005-235-14 | 21.9 | 1206.9 12:53:40:febtest:INFO: 26-05 | XA-000-08-003-000-005-173-11 | 15.6 | 1224.5 12:53:40:febtest:INFO: 17-06 | XA-000-08-003-000-005-233-14 | 31.4 | 1183.3 12:53:40:febtest:INFO: 24-07 | XA-000-08-003-000-005-179-12 | 15.6 | 1392.5 12:53:41:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 12:53:43:ST3_smx:INFO: chip: 23-0 21.902970 C 1230.330540 mV 12:53:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:43:ST3_smx:INFO: Electrons 12:53:43:ST3_smx:INFO: # loops 0 12:53:45:ST3_smx:INFO: # loops 1 12:53:46:ST3_smx:INFO: # loops 2 12:53:48:ST3_smx:INFO: Total # of broken channels: 0 12:53:48:ST3_smx:INFO: List of broken channels: [] 12:53:48:ST3_smx:INFO: Total # of broken channels: 0 12:53:48:ST3_smx:INFO: List of broken channels: [] 12:53:50:ST3_smx:INFO: chip: 30-1 28.225000 C 1206.851500 mV 12:53:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:50:ST3_smx:INFO: Electrons 12:53:50:ST3_smx:INFO: # loops 0 12:53:51:ST3_smx:INFO: # loops 1 12:53:53:ST3_smx:INFO: # loops 2 12:53:55:ST3_smx:INFO: Total # of broken channels: 0 12:53:55:ST3_smx:INFO: List of broken channels: [] 12:53:55:ST3_smx:INFO: Total # of broken channels: 0 12:53:55:ST3_smx:INFO: List of broken channels: [] 12:53:56:ST3_smx:INFO: chip: 21-2 47.250730 C 1129.995435 mV 12:53:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:56:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:53:56:ST3_smx:INFO: Electrons 12:53:56:ST3_smx:INFO: # loops 0 12:53:58:ST3_smx:INFO: # loops 1 12:54:00:ST3_smx:INFO: # loops 2 12:54:01:ST3_smx:INFO: Total # of broken channels: 0 12:54:01:ST3_smx:INFO: List of broken channels: [] 12:54:01:ST3_smx:INFO: Total # of broken channels: 0 12:54:01:ST3_smx:INFO: List of broken channels: [] 12:54:03:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV 12:54:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:03:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:03:ST3_smx:INFO: Electrons 12:54:03:ST3_smx:INFO: # loops 0 12:54:04:ST3_smx:INFO: # loops 1 12:54:06:ST3_smx:INFO: # loops 2 12:54:07:ST3_smx:INFO: Total # of broken channels: 0 12:54:07:ST3_smx:INFO: List of broken channels: [] 12:54:07:ST3_smx:INFO: Total # of broken channels: 0 12:54:07:ST3_smx:INFO: List of broken channels: [] 12:54:09:ST3_smx:INFO: chip: 19-4 21.902970 C 1218.600960 mV 12:54:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:09:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:09:ST3_smx:INFO: Electrons 12:54:09:ST3_smx:INFO: # loops 0 12:54:11:ST3_smx:INFO: # loops 1 12:54:12:ST3_smx:INFO: # loops 2 12:54:14:ST3_smx:INFO: Total # of broken channels: 0 12:54:14:ST3_smx:INFO: List of broken channels: [] 12:54:14:ST3_smx:INFO: Total # of broken channels: 0 12:54:14:ST3_smx:INFO: List of broken channels: [] 12:54:16:ST3_smx:INFO: chip: 26-5 15.590880 C 1242.040240 mV 12:54:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:16:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:16:ST3_smx:INFO: Electrons 12:54:16:ST3_smx:INFO: # loops 0 12:54:17:ST3_smx:INFO: # loops 1 12:54:19:ST3_smx:INFO: # loops 2 12:54:21:ST3_smx:INFO: Total # of broken channels: 0 12:54:21:ST3_smx:INFO: List of broken channels: [] 12:54:21:ST3_smx:INFO: Total # of broken channels: 0 12:54:21:ST3_smx:INFO: List of broken channels: [] 12:54:23:ST3_smx:INFO: chip: 17-6 31.389742 C 1189.190035 mV 12:54:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:23:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:23:ST3_smx:INFO: Electrons 12:54:23:ST3_smx:INFO: # loops 0 12:54:24:ST3_smx:INFO: # loops 1 12:54:26:ST3_smx:INFO: # loops 2 12:54:28:ST3_smx:INFO: Total # of broken channels: 0 12:54:28:ST3_smx:INFO: List of broken channels: [] 12:54:28:ST3_smx:INFO: Total # of broken channels: 0 12:54:28:ST3_smx:INFO: List of broken channels: [] 12:54:29:ST3_smx:INFO: chip: 24-7 15.590880 C 1578.532875 mV 12:54:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 12:54:29:ST3_smx:INFO: Electrons 12:54:29:ST3_smx:INFO: # loops 0 12:54:31:ST3_smx:INFO: # loops 1 12:54:32:ST3_smx:INFO: # loops 2 12:54:34:ST3_smx:INFO: Total # of broken channels: 0 12:54:34:ST3_smx:INFO: List of broken channels: [] 12:54:34:ST3_smx:INFO: Total # of broken channels: 0 12:54:34:ST3_smx:INFO: List of broken channels: [] 12:54:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 12:54:35:febtest:INFO: 23-00 | XA-000-08-003-000-005-183-12 | 21.9 | 1253.7 12:54:35:febtest:INFO: 30-01 | XA-000-08-003-000-005-217-07 | 28.2 | 1230.3 12:54:35:febtest:INFO: 21-02 | XA-000-08-003-000-005-212-07 | 47.3 | 1153.7 12:54:35:febtest:INFO: 28-03 | XA-000-08-003-000-005-170-11 | 40.9 | 1183.3 12:54:35:febtest:INFO: 19-04 | XA-000-08-003-000-005-235-14 | 25.1 | 1236.2 12:54:36:febtest:INFO: 26-05 | XA-000-08-003-000-005-173-11 | 18.7 | 1265.4 12:54:36:febtest:INFO: 17-06 | XA-000-08-003-000-005-233-14 | 34.6 | 1206.9 12:54:36:febtest:INFO: 24-07 | XA-000-08-003-000-005-179-12 | 6.1 | 1578.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_09_24-12_53_13 OPERATOR : Alois Alzheimer SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4080| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.5920', '1.849', '2.3850'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0620', '1.850', '2.6640'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0130', '1.850', '0.5352']