FEB_4082 26.09.24 10:40:45
Info
10:40:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:45:ST3_Shared:INFO: FEB-Microcable
10:40:45:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:40:45:febtest:INFO: Testing FEB with SN 4082
10:40:47:smx_tester:INFO: Scanning setup
10:40:47:elinks:INFO: Disabling clock on downlink 0
10:40:47:elinks:INFO: Disabling clock on downlink 1
10:40:47:elinks:INFO: Disabling clock on downlink 2
10:40:47:elinks:INFO: Disabling clock on downlink 3
10:40:47:elinks:INFO: Disabling clock on downlink 4
10:40:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:40:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:47:elinks:INFO: Disabling clock on downlink 0
10:40:47:elinks:INFO: Disabling clock on downlink 1
10:40:47:elinks:INFO: Disabling clock on downlink 2
10:40:47:elinks:INFO: Disabling clock on downlink 3
10:40:47:elinks:INFO: Disabling clock on downlink 4
10:40:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:40:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:47:elinks:INFO: Disabling clock on downlink 0
10:40:47:elinks:INFO: Disabling clock on downlink 1
10:40:47:elinks:INFO: Disabling clock on downlink 2
10:40:47:elinks:INFO: Disabling clock on downlink 3
10:40:47:elinks:INFO: Disabling clock on downlink 4
10:40:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:40:47:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:40:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:47:elinks:INFO: Disabling clock on downlink 0
10:40:47:elinks:INFO: Disabling clock on downlink 1
10:40:47:elinks:INFO: Disabling clock on downlink 2
10:40:47:elinks:INFO: Disabling clock on downlink 3
10:40:47:elinks:INFO: Disabling clock on downlink 4
10:40:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:40:47:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:47:elinks:INFO: Disabling clock on downlink 0
10:40:47:elinks:INFO: Disabling clock on downlink 1
10:40:47:elinks:INFO: Disabling clock on downlink 2
10:40:47:elinks:INFO: Disabling clock on downlink 3
10:40:47:elinks:INFO: Disabling clock on downlink 4
10:40:47:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:40:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:40:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:40:48:setup_element:INFO: Scanning clock phase
10:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:40:48:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:40:48:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:40:48:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:40:48:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:40:48:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________XXXXXX___________
Clock Delay: 25
10:40:48:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________XXXXXX____________
Clock Delay: 24
10:40:48:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________XXXXXX____________
Clock Delay: 24
10:40:48:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:40:48:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________XXXXXX_____________
Clock Delay: 23
10:40:48:setup_element:INFO: Setting the clock phase to 24 for group 0, downlink 2
10:40:48:setup_element:INFO: Scanning data phases
10:40:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:48:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:40:53:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:40:53:setup_element:INFO: Eye window for uplink 24: ____XXXXXXX____XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 1
10:40:53:setup_element:INFO: Eye window for uplink 25: ________XXXXXX_XXXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 3
10:40:53:setup_element:INFO: Eye window for uplink 26: ____XXXXXXX_____________________________
Data delay found: 27
10:40:53:setup_element:INFO: Eye window for uplink 27: ________XXXXXXXXX_______________________
Data delay found: 32
10:40:53:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXXX____________________
Data delay found: 35
10:40:53:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________
Data delay found: 38
10:40:53:setup_element:INFO: Eye window for uplink 30: _________XXXXXXXXXX_____________________
Data delay found: 33
10:40:53:setup_element:INFO: Eye window for uplink 31: __________XXXXXXXX______________________
Data delay found: 33
10:40:53:setup_element:INFO: Setting the data phase to 1 for uplink 24
10:40:53:setup_element:INFO: Setting the data phase to 3 for uplink 25
10:40:53:setup_element:INFO: Setting the data phase to 27 for uplink 26
10:40:53:setup_element:INFO: Setting the data phase to 32 for uplink 27
10:40:53:setup_element:INFO: Setting the data phase to 35 for uplink 28
10:40:53:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:40:53:setup_element:INFO: Setting the data phase to 33 for uplink 30
10:40:53:setup_element:INFO: Setting the data phase to 33 for uplink 31
10:40:53:setup_element:INFO: Beginning SMX ASICs map scan
10:40:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:40:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:40:53:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:40:53:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:40:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:40:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:40:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:40:54:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:40:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:40:54:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:40:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:40:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:40:56:setup_element:INFO: Performing Elink synchronization
10:40:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:40:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:40:56:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:40:56:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:40:56:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:40:56:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:40:56:febtest:INFO: Init all SMX (CSA): 30
10:41:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:41:04:febtest:INFO: 30-01 | XA-000-08-002-003-006-208-02 | 53.6 | 1118.1
10:41:04:febtest:INFO: 28-03 | XA-000-08-002-003-006-205-05 | 47.3 | 1141.9
10:41:05:febtest:INFO: 26-05 | XA-000-08-002-003-006-212-02 | 47.3 | 1135.9
10:41:05:febtest:INFO: 24-07 | XA-000-08-002-003-006-206-05 | 40.9 | 1153.7
10:41:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:41:08:ST3_smx:INFO: chip: 30-1 53.612520 C 1129.995435 mV
10:41:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:08:ST3_smx:INFO: Electrons
10:41:08:ST3_smx:INFO: # loops 0
10:41:09:ST3_smx:INFO: # loops 1
10:41:11:ST3_smx:INFO: # loops 2
10:41:13:ST3_smx:INFO: Total # of broken channels: 0
10:41:13:ST3_smx:INFO: List of broken channels: []
10:41:13:ST3_smx:INFO: Total # of broken channels: 0
10:41:13:ST3_smx:INFO: List of broken channels: []
10:41:15:ST3_smx:INFO: chip: 28-3 47.250730 C 1153.732915 mV
10:41:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:15:ST3_smx:INFO: Electrons
10:41:15:ST3_smx:INFO: # loops 0
10:41:17:ST3_smx:INFO: # loops 1
10:41:19:ST3_smx:INFO: # loops 2
10:41:20:ST3_smx:INFO: Total # of broken channels: 0
10:41:20:ST3_smx:INFO: List of broken channels: []
10:41:20:ST3_smx:INFO: Total # of broken channels: 0
10:41:20:ST3_smx:INFO: List of broken channels: []
10:41:22:ST3_smx:INFO: chip: 26-5 50.430383 C 1141.874115 mV
10:41:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:22:ST3_smx:INFO: Electrons
10:41:22:ST3_smx:INFO: # loops 0
10:41:24:ST3_smx:INFO: # loops 1
10:41:26:ST3_smx:INFO: # loops 2
10:41:27:ST3_smx:INFO: Total # of broken channels: 0
10:41:27:ST3_smx:INFO: List of broken channels: []
10:41:27:ST3_smx:INFO: Total # of broken channels: 0
10:41:27:ST3_smx:INFO: List of broken channels: []
10:41:29:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
10:41:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:41:29:ST3_smx:INFO: Electrons
10:41:29:ST3_smx:INFO: # loops 0
10:41:31:ST3_smx:INFO: # loops 1
10:41:32:ST3_smx:INFO: # loops 2
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:34:ST3_smx:INFO: Total # of broken channels: 0
10:41:34:ST3_smx:INFO: List of broken channels: []
10:41:34:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:41:35:febtest:INFO: 30-01 | XA-000-08-002-003-006-208-02 | 56.8 | 1153.7
10:41:35:febtest:INFO: 28-03 | XA-000-08-002-003-006-205-05 | 50.4 | 1171.5
10:41:35:febtest:INFO: 26-05 | XA-000-08-002-003-006-212-02 | 50.4 | 1165.6
10:41:35:febtest:INFO: 24-07 | XA-000-08-002-003-006-206-05 | 47.3 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_09_26-10_40_45
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4082| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7614', '1.850', '1.1200']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0210', '1.850', '1.3240']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '0.2665']