
FEB_4083 28.10.24 11:05:27
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11:05:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:05:27:ST3_Shared:INFO: FEB-Microcable 11:05:27:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 11:05:27:febtest:INFO: Testing FEB with SN 4083 11:05:29:smx_tester:INFO: Scanning setup 11:05:29:elinks:INFO: Disabling clock on downlink 0 11:05:29:elinks:INFO: Disabling clock on downlink 1 11:05:29:elinks:INFO: Disabling clock on downlink 2 11:05:29:elinks:INFO: Disabling clock on downlink 3 11:05:29:elinks:INFO: Disabling clock on downlink 4 11:05:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 11:05:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:29:elinks:INFO: Disabling clock on downlink 0 11:05:29:elinks:INFO: Disabling clock on downlink 1 11:05:29:elinks:INFO: Disabling clock on downlink 2 11:05:29:elinks:INFO: Disabling clock on downlink 3 11:05:29:elinks:INFO: Disabling clock on downlink 4 11:05:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 11:05:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:29:elinks:INFO: Disabling clock on downlink 0 11:05:29:elinks:INFO: Disabling clock on downlink 1 11:05:29:elinks:INFO: Disabling clock on downlink 2 11:05:29:elinks:INFO: Disabling clock on downlink 3 11:05:29:elinks:INFO: Disabling clock on downlink 4 11:05:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 11:05:29:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 11:05:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:29:elinks:INFO: Disabling clock on downlink 0 11:05:29:elinks:INFO: Disabling clock on downlink 1 11:05:29:elinks:INFO: Disabling clock on downlink 2 11:05:29:elinks:INFO: Disabling clock on downlink 3 11:05:29:elinks:INFO: Disabling clock on downlink 4 11:05:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 11:05:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:29:elinks:INFO: Disabling clock on downlink 0 11:05:29:elinks:INFO: Disabling clock on downlink 1 11:05:29:elinks:INFO: Disabling clock on downlink 2 11:05:29:elinks:INFO: Disabling clock on downlink 3 11:05:29:elinks:INFO: Disabling clock on downlink 4 11:05:29:setup_element:INFO: Checking SOS, encoding_mode: SOS 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 11:05:29:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 11:05:29:setup_element:INFO: Scanning clock phase 11:05:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:05:30:setup_element:INFO: Clock phase scan results for group 0, downlink 2 11:05:30:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXX________ Clock Delay: 28 11:05:30:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXX________ Clock Delay: 28 11:05:30:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________ Clock Delay: 27 11:05:30:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________ Clock Delay: 27 11:05:30:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXX___________ Clock Delay: 25 11:05:30:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXX___________ Clock Delay: 25 11:05:30:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 11:05:30:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 11:05:30:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 11:05:30:setup_element:INFO: Scanning data phases 11:05:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:30:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:05:35:setup_element:INFO: Data phase scan results for group 0, downlink 2 11:05:35:setup_element:INFO: Eye window for uplink 24: ______XXXXXXX___________________________ Data delay found: 29 11:05:35:setup_element:INFO: Eye window for uplink 25: __________XXXXXXX_______________________ Data delay found: 33 11:05:35:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________XXXXXXXX Data delay found: 22 11:05:35:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________XXXXXXXX Data delay found: 25 11:05:35:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXX_____________________ Data delay found: 35 11:05:35:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________ Data delay found: 38 11:05:35:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXXXX____________________ Data delay found: 35 11:05:35:setup_element:INFO: Eye window for uplink 31: _____________XXXXXXXX___________________ Data delay found: 36 11:05:35:setup_element:INFO: Setting the data phase to 29 for uplink 24 11:05:35:setup_element:INFO: Setting the data phase to 33 for uplink 25 11:05:35:setup_element:INFO: Setting the data phase to 22 for uplink 26 11:05:35:setup_element:INFO: Setting the data phase to 25 for uplink 27 11:05:35:setup_element:INFO: Setting the data phase to 35 for uplink 28 11:05:35:setup_element:INFO: Setting the data phase to 38 for uplink 29 11:05:35:setup_element:INFO: Setting the data phase to 35 for uplink 30 11:05:35:setup_element:INFO: Setting the data phase to 36 for uplink 31 11:05:35:setup_element:INFO: Beginning SMX ASICs map scan 11:05:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:05:35:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:05:35:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:05:35:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 11:05:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 11:05:35:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 11:05:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 11:05:35:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 11:05:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 11:05:36:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 11:05:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 11:05:36:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 11:05:37:setup_element:INFO: Performing Elink synchronization 11:05:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 11:05:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 11:05:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 11:05:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 11:05:37:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 11:05:37:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 11:05:38:febtest:INFO: Init all SMX (CSA): 30 11:05:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:05:46:febtest:INFO: 30-01 | XA-000-09-004-006-003-013-08 | 37.7 | 1159.7 11:05:46:febtest:INFO: 28-03 | XA-000-09-004-006-002-013-05 | 31.4 | 1171.5 11:05:47:febtest:INFO: 26-05 | XA-000-09-004-006-003-010-08 | 31.4 | 1177.4 11:05:47:febtest:INFO: 24-07 | XA-000-09-004-006-003-016-15 | 40.9 | 1141.9 11:05:48:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 11:05:50:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV 11:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:05:50:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:05:50:ST3_smx:INFO: Electrons 11:05:50:ST3_smx:INFO: # loops 0 11:05:52:ST3_smx:INFO: # loops 1 11:05:53:ST3_smx:INFO: # loops 2 11:05:55:ST3_smx:INFO: Total # of broken channels: 0 11:05:55:ST3_smx:INFO: List of broken channels: [] 11:05:55:ST3_smx:INFO: Total # of broken channels: 0 11:05:55:ST3_smx:INFO: List of broken channels: [] 11:05:57:ST3_smx:INFO: chip: 28-3 34.556970 C 1183.292940 mV 11:05:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:05:57:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:05:57:ST3_smx:INFO: Electrons 11:05:57:ST3_smx:INFO: # loops 0 11:05:59:ST3_smx:INFO: # loops 1 11:06:00:ST3_smx:INFO: # loops 2 11:06:02:ST3_smx:INFO: Total # of broken channels: 0 11:06:02:ST3_smx:INFO: List of broken channels: [] 11:06:02:ST3_smx:INFO: Total # of broken channels: 0 11:06:02:ST3_smx:INFO: List of broken channels: [] 11:06:04:ST3_smx:INFO: chip: 26-5 31.389742 C 1189.190035 mV 11:06:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:06:04:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:06:04:ST3_smx:INFO: Electrons 11:06:04:ST3_smx:INFO: # loops 0 11:06:06:ST3_smx:INFO: # loops 1 11:06:07:ST3_smx:INFO: # loops 2 11:06:09:ST3_smx:INFO: Total # of broken channels: 0 11:06:09:ST3_smx:INFO: List of broken channels: [] 11:06:09:ST3_smx:INFO: Total # of broken channels: 0 11:06:09:ST3_smx:INFO: List of broken channels: [] 11:06:11:ST3_smx:INFO: chip: 24-7 40.898880 C 1147.806000 mV 11:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:06:11:ST3_discr_histo:WARNING: Not enough entries for fit!!! 11:06:11:ST3_smx:INFO: Electrons 11:06:11:ST3_smx:INFO: # loops 0 11:06:13:ST3_smx:INFO: # loops 1 11:06:14:ST3_smx:INFO: # loops 2 11:06:16:ST3_smx:INFO: Total # of broken channels: 0 11:06:16:ST3_smx:INFO: List of broken channels: [] 11:06:16:ST3_smx:INFO: Total # of broken channels: 0 11:06:16:ST3_smx:INFO: List of broken channels: [] 11:06:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 11:06:17:febtest:INFO: 30-01 | XA-000-09-004-006-003-013-08 | 37.7 | 1189.2 11:06:17:febtest:INFO: 28-03 | XA-000-09-004-006-002-013-05 | 34.6 | 1201.0 11:06:17:febtest:INFO: 26-05 | XA-000-09-004-006-003-010-08 | 34.6 | 1206.9 11:06:17:febtest:INFO: 24-07 | XA-000-09-004-006-003-016-15 | 40.9 | 1165.6 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_28-11_05_27 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4083| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7251', '1.850', '1.4640'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9945', '1.850', '1.2950'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9762', '1.850', '0.2630']