FEB_4083    28.10.24 13:58:33

TextEdit.txt
            13:58:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:33:ST3_Shared:INFO:	                       FEB-Microcable                       
13:58:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:58:33:febtest:INFO:	Testing FEB with SN 4083
13:58:35:smx_tester:INFO:	Scanning setup
13:58:35:elinks:INFO:	Disabling clock on downlink 0
13:58:35:elinks:INFO:	Disabling clock on downlink 1
13:58:35:elinks:INFO:	Disabling clock on downlink 2
13:58:35:elinks:INFO:	Disabling clock on downlink 3
13:58:35:elinks:INFO:	Disabling clock on downlink 4
13:58:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:58:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:35:elinks:INFO:	Disabling clock on downlink 0
13:58:35:elinks:INFO:	Disabling clock on downlink 1
13:58:35:elinks:INFO:	Disabling clock on downlink 2
13:58:35:elinks:INFO:	Disabling clock on downlink 3
13:58:35:elinks:INFO:	Disabling clock on downlink 4
13:58:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:58:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:35:elinks:INFO:	Disabling clock on downlink 0
13:58:35:elinks:INFO:	Disabling clock on downlink 1
13:58:35:elinks:INFO:	Disabling clock on downlink 2
13:58:35:elinks:INFO:	Disabling clock on downlink 3
13:58:35:elinks:INFO:	Disabling clock on downlink 4
13:58:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:58:35:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:58:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:35:elinks:INFO:	Disabling clock on downlink 0
13:58:35:elinks:INFO:	Disabling clock on downlink 1
13:58:35:elinks:INFO:	Disabling clock on downlink 2
13:58:35:elinks:INFO:	Disabling clock on downlink 3
13:58:35:elinks:INFO:	Disabling clock on downlink 4
13:58:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:58:35:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:35:elinks:INFO:	Disabling clock on downlink 0
13:58:35:elinks:INFO:	Disabling clock on downlink 1
13:58:35:elinks:INFO:	Disabling clock on downlink 2
13:58:35:elinks:INFO:	Disabling clock on downlink 3
13:58:35:elinks:INFO:	Disabling clock on downlink 4
13:58:35:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:58:35:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:58:36:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:58:36:setup_element:INFO:	Scanning clock phase
13:58:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:36:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:58:36:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 18: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:58:36:setup_element:INFO:	Eye window for uplink 19: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
13:58:36:setup_element:INFO:	Eye window for uplink 22: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:58:36:setup_element:INFO:	Eye window for uplink 23: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:58:36:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 28: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:58:36:setup_element:INFO:	Eye window for uplink 29: __________________________________________________________________XXXXXX________
Clock Delay: 28
13:58:36:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
13:58:36:setup_element:INFO:	Setting the clock phase to 29 for group 0, downlink 2
13:58:36:setup_element:INFO:	Scanning data phases
13:58:36:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:36:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:41:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:58:41:setup_element:INFO:	Eye window for uplink 16: XXX__X______________________________XXXX
Data delay found: 20
13:58:41:setup_element:INFO:	Eye window for uplink 17: XX_______________________________XXXXXXX
Data delay found: 17
13:58:41:setup_element:INFO:	Eye window for uplink 18: XXXX_______________________________XXXXX
Data delay found: 19
13:58:41:setup_element:INFO:	Eye window for uplink 19: X______________________________X_XXXXXXX
Data delay found: 15
13:58:41:setup_element:INFO:	Eye window for uplink 22: X________________________________XXXXXX_
Data delay found: 16
13:58:41:setup_element:INFO:	Eye window for uplink 23: XXXX__________________________XXXXXXXXXX
Data delay found: 16
13:58:41:setup_element:INFO:	Eye window for uplink 24: __X_XXXXXXXX____________________________
Data delay found: 26
13:58:41:setup_element:INFO:	Eye window for uplink 25: _______XXXXXXXX_________________________
Data delay found: 30
13:58:41:setup_element:INFO:	Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
13:58:41:setup_element:INFO:	Eye window for uplink 27: __________XXXXXXXX______________________
Data delay found: 33
13:58:41:setup_element:INFO:	Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
13:58:41:setup_element:INFO:	Eye window for uplink 29: _______________XXXXXX___________________
Data delay found: 37
13:58:41:setup_element:INFO:	Eye window for uplink 30: ___________XXXXXXXXXX___________________
Data delay found: 35
13:58:41:setup_element:INFO:	Eye window for uplink 31: _____________X_XXXXXXX__________________
Data delay found: 37
13:58:41:setup_element:INFO:	Setting the data phase to 20 for uplink 16
13:58:41:setup_element:INFO:	Setting the data phase to 17 for uplink 17
13:58:41:setup_element:INFO:	Setting the data phase to 19 for uplink 18
13:58:41:setup_element:INFO:	Setting the data phase to 15 for uplink 19
13:58:41:setup_element:INFO:	Setting the data phase to 16 for uplink 22
13:58:41:setup_element:INFO:	Setting the data phase to 16 for uplink 23
13:58:41:setup_element:INFO:	Setting the data phase to 26 for uplink 24
13:58:41:setup_element:INFO:	Setting the data phase to 30 for uplink 25
13:58:41:setup_element:INFO:	Setting the data phase to 29 for uplink 26
13:58:41:setup_element:INFO:	Setting the data phase to 33 for uplink 27
13:58:41:setup_element:INFO:	Setting the data phase to 34 for uplink 28
13:58:41:setup_element:INFO:	Setting the data phase to 37 for uplink 29
13:58:41:setup_element:INFO:	Setting the data phase to 35 for uplink 30
13:58:41:setup_element:INFO:	Setting the data phase to 37 for uplink 31
13:58:41:setup_element:INFO:	Beginning SMX ASICs map scan
13:58:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:41:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:58:41:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:58:41:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:58:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:58:41:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:58:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:58:41:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:58:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:58:42:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:58:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:58:42:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:58:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:58:42:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:58:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:58:42:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:58:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:58:42:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:58:44:setup_element:INFO:	Performing Elink synchronization
13:58:44:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:58:44:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:58:44:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:58:44:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:58:44:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:58:44:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:58:44:febtest:INFO:	Init all SMX (CSA): 30
13:58:58:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:58:59:febtest:INFO:	23-00 | XA-000-09-004-006-002-012-05 |  44.1 | 1141.9
13:58:59:febtest:INFO:	30-01 | XA-000-09-004-006-003-013-08 |  44.1 | 1153.7
13:58:59:febtest:INFO:	28-03 | XA-000-09-004-006-002-013-05 |  37.7 | 1165.6
13:58:59:febtest:INFO:	19-04 | XA-000-09-004-006-003-017-15 |  37.7 | 1165.6
13:58:59:febtest:INFO:	26-05 | XA-000-09-004-006-003-010-08 |  37.7 | 1171.5
13:59:00:febtest:INFO:	17-06 | XA-000-09-004-006-002-011-05 |  37.7 | 1171.5
13:59:00:febtest:INFO:	24-07 | XA-000-09-004-006-003-016-15 |  47.3 | 1135.9
13:59:01:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:59:01:febtest:ERROR:	HW addres 3 != 2
13:59:20:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1153.732915 mV
13:59:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:20:ST3_smx:INFO:		Electrons
13:59:20:ST3_smx:INFO:	# loops 0
13:59:22:ST3_smx:INFO:	# loops 1
13:59:24:ST3_smx:INFO:	# loops 2
13:59:26:ST3_smx:INFO:	Total # of broken channels: 0
13:59:26:ST3_smx:INFO:	List of broken channels: []
13:59:26:ST3_smx:INFO:	Total # of broken channels: 0
13:59:26:ST3_smx:INFO:	List of broken channels: []
13:59:28:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1165.571835 mV
13:59:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:28:ST3_smx:INFO:		Electrons
13:59:28:ST3_smx:INFO:	# loops 0
13:59:30:ST3_smx:INFO:	# loops 1
13:59:32:ST3_smx:INFO:	# loops 2
13:59:34:ST3_smx:INFO:	Total # of broken channels: 0
13:59:34:ST3_smx:INFO:	List of broken channels: []
13:59:34:ST3_smx:INFO:	Total # of broken channels: 0
13:59:34:ST3_smx:INFO:	List of broken channels: []
13:59:35:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1183.292940 mV
13:59:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:35:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:35:ST3_smx:INFO:		Electrons
13:59:35:ST3_smx:INFO:	# loops 0
13:59:37:ST3_smx:INFO:	# loops 1
13:59:40:ST3_smx:INFO:	# loops 2
13:59:42:ST3_smx:INFO:	Total # of broken channels: 0
13:59:42:ST3_smx:INFO:	List of broken channels: []
13:59:42:ST3_smx:INFO:	Total # of broken channels: 0
13:59:42:ST3_smx:INFO:	List of broken channels: []
13:59:43:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1171.483840 mV
13:59:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:43:ST3_smx:INFO:		Electrons
13:59:43:ST3_smx:INFO:	# loops 0
13:59:45:ST3_smx:INFO:	# loops 1
13:59:47:ST3_smx:INFO:	# loops 2
13:59:49:ST3_smx:INFO:	Total # of broken channels: 0
13:59:49:ST3_smx:INFO:	List of broken channels: []
13:59:49:ST3_smx:INFO:	Total # of broken channels: 0
13:59:49:ST3_smx:INFO:	List of broken channels: []
13:59:51:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1183.292940 mV
13:59:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:51:ST3_smx:INFO:		Electrons
13:59:51:ST3_smx:INFO:	# loops 0
13:59:53:ST3_smx:INFO:	# loops 1
13:59:55:ST3_smx:INFO:	# loops 2
13:59:57:ST3_smx:INFO:	Total # of broken channels: 0
13:59:57:ST3_smx:INFO:	List of broken channels: []
13:59:57:ST3_smx:INFO:	Total # of broken channels: 0
13:59:57:ST3_smx:INFO:	List of broken channels: []
13:59:58:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1195.082160 mV
13:59:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:58:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:59:58:ST3_smx:INFO:		Electrons
13:59:58:ST3_smx:INFO:	# loops 0
14:00:00:ST3_smx:INFO:	# loops 1
14:00:02:ST3_smx:INFO:	# loops 2
14:00:04:ST3_smx:INFO:	Total # of broken channels: 0
14:00:04:ST3_smx:INFO:	List of broken channels: []
14:00:04:ST3_smx:INFO:	Total # of broken channels: 0
14:00:04:ST3_smx:INFO:	List of broken channels: []
14:00:06:ST3_smx:INFO:	chip: 24-7 	 47.250730 C 	 1147.806000 mV
14:00:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:00:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
14:00:06:ST3_smx:INFO:		Electrons
14:00:06:ST3_smx:INFO:	# loops 0
14:00:08:ST3_smx:INFO:	# loops 1
14:00:10:ST3_smx:INFO:	# loops 2
14:00:12:ST3_smx:INFO:	Total # of broken channels: 0
14:00:12:ST3_smx:INFO:	List of broken channels: []
14:00:12:ST3_smx:INFO:	Total # of broken channels: 0
14:00:12:ST3_smx:INFO:	List of broken channels: []
14:00:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:00:12:febtest:INFO:	23-00 | XA-000-09-004-006-002-012-05 |  47.3 | 1171.5
14:00:12:febtest:INFO:	30-01 | XA-000-09-004-006-003-013-08 |  44.1 | 1189.2
14:00:13:febtest:INFO:	28-03 | XA-000-09-004-006-002-013-05 |  40.9 | 1201.0
14:00:13:febtest:INFO:	19-04 | XA-000-09-004-006-003-017-15 |  40.9 | 1195.1
14:00:13:febtest:INFO:	26-05 | XA-000-09-004-006-003-010-08 |  40.9 | 1206.9
14:00:13:febtest:INFO:	17-06 | XA-000-09-004-006-002-011-05 |  37.7 | 1282.9
14:00:13:febtest:INFO:	24-07 | XA-000-09-004-006-003-016-15 |  50.4 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_28-13_58_33
OPERATOR  : Henrik; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
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| FEB_SN : 4083| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
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VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4640', '1.849', '2.6190']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9710', '1.850', '2.3780']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9360', '1.850', '0.6318']