DTL-STS tests database

FEB_4083 28.10.24 15:25:35

link: XA-000-09-004-006-008-003-10
...SMX_0.root
link: XA-000-09-004-006-006-005-03
...SMX_2.root
link: XA-000-09-004-006-009-002-07
...SMX_4.root
link: XA-000-09-004-006-008-002-10
...SMX_6.root
link: XA-000-09-004-006-007-003-14
...SMX_1.root
link: XA-000-09-004-006-007-005-14
...SMX_3.root
link: XA-000-09-004-006-007-004-14
...SMX_5.root
link: XA-000-09-004-006-007-006-14
...SMX_7.root
link: XA-000-09-004-006-007-006-14
...VddmCSAstatus.root
TextEdit.txt
            15:25:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:25:35:ST3_Shared:INFO:	                         FEB-Sensor                         
15:25:35:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:25:44:ST3_ModuleSelector:INFO:	L5UR601119 M5UR6B1011191B2 124 D

15:25:44:ST3_ModuleSelector:INFO:	16334

15:25:44:febtest:INFO:	Testing FEB with SN 4083
15:25:46:smx_tester:INFO:	Scanning setup
15:25:46:elinks:INFO:	Disabling clock on downlink 0
15:25:46:elinks:INFO:	Disabling clock on downlink 1
15:25:46:elinks:INFO:	Disabling clock on downlink 2
15:25:46:elinks:INFO:	Disabling clock on downlink 3
15:25:46:elinks:INFO:	Disabling clock on downlink 4
15:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:46:elinks:INFO:	Disabling clock on downlink 0
15:25:46:elinks:INFO:	Disabling clock on downlink 1
15:25:46:elinks:INFO:	Disabling clock on downlink 2
15:25:46:elinks:INFO:	Disabling clock on downlink 3
15:25:46:elinks:INFO:	Disabling clock on downlink 4
15:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:46:elinks:INFO:	Disabling clock on downlink 0
15:25:46:elinks:INFO:	Disabling clock on downlink 1
15:25:46:elinks:INFO:	Disabling clock on downlink 2
15:25:46:elinks:INFO:	Disabling clock on downlink 3
15:25:46:elinks:INFO:	Disabling clock on downlink 4
15:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
15:25:46:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
15:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:46:elinks:INFO:	Disabling clock on downlink 0
15:25:46:elinks:INFO:	Disabling clock on downlink 1
15:25:46:elinks:INFO:	Disabling clock on downlink 2
15:25:46:elinks:INFO:	Disabling clock on downlink 3
15:25:46:elinks:INFO:	Disabling clock on downlink 4
15:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:46:elinks:INFO:	Disabling clock on downlink 0
15:25:46:elinks:INFO:	Disabling clock on downlink 1
15:25:46:elinks:INFO:	Disabling clock on downlink 2
15:25:46:elinks:INFO:	Disabling clock on downlink 3
15:25:46:elinks:INFO:	Disabling clock on downlink 4
15:25:46:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:25:46:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:46:setup_element:INFO:	Scanning clock phase
15:25:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:47:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
15:25:47:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 22: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 23: _________________________________________________________________XXXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
15:25:47:setup_element:INFO:	Eye window for uplink 30: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Eye window for uplink 31: __________________________________________________________________XXXXXX________
Clock Delay: 28
15:25:47:setup_element:INFO:	Setting the clock phase to 28 for group 0, downlink 2
15:25:47:setup_element:INFO:	Scanning data phases
15:25:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:52:setup_element:INFO:	Data phase scan results for group 0, downlink 2
15:25:52:setup_element:INFO:	Eye window for uplink 16: XXXXX_____________________________XXXXXX
Data delay found: 19
15:25:52:setup_element:INFO:	Eye window for uplink 17: X________________________________XXXXXXX
Data delay found: 16
15:25:52:setup_element:INFO:	Eye window for uplink 18: XXXXX_______________________________XXXX
Data delay found: 20
15:25:52:setup_element:INFO:	Eye window for uplink 19: XX_______________________________XXXXXXX
Data delay found: 17
15:25:52:setup_element:INFO:	Eye window for uplink 20: XX_________________________________XXXXX
Data delay found: 18
15:25:52:setup_element:INFO:	Eye window for uplink 21: X_________________________________XXXXXX
Data delay found: 17
15:25:52:setup_element:INFO:	Eye window for uplink 22: X_________________________________XXXXXX
Data delay found: 17
15:25:52:setup_element:INFO:	Eye window for uplink 23: XXX____________________________XXXXXXXXX
Data delay found: 16
15:25:52:setup_element:INFO:	Eye window for uplink 24: __XXXXXXXX______________________________
Data delay found: 25
15:25:52:setup_element:INFO:	Eye window for uplink 25: _____XXXXXXXX___________________________
Data delay found: 28
15:25:52:setup_element:INFO:	Eye window for uplink 26: ______XXXXXXXX__________________________
Data delay found: 29
15:25:52:setup_element:INFO:	Eye window for uplink 27: __________XXXXXXXXX_____________________
Data delay found: 34
15:25:52:setup_element:INFO:	Eye window for uplink 28: ____________XXXXXXX_____________________
Data delay found: 35
15:25:52:setup_element:INFO:	Eye window for uplink 29: ______________XXXXXXXXX_________________
Data delay found: 38
15:25:52:setup_element:INFO:	Eye window for uplink 30: __________XXXXXXXXXXX___________________
Data delay found: 35
15:25:52:setup_element:INFO:	Eye window for uplink 31: __________XXXXXXXXXXX___________________
Data delay found: 35
15:25:52:setup_element:INFO:	Setting the data phase to 19 for uplink 16
15:25:52:setup_element:INFO:	Setting the data phase to 16 for uplink 17
15:25:52:setup_element:INFO:	Setting the data phase to 20 for uplink 18
15:25:52:setup_element:INFO:	Setting the data phase to 17 for uplink 19
15:25:52:setup_element:INFO:	Setting the data phase to 18 for uplink 20
15:25:52:setup_element:INFO:	Setting the data phase to 17 for uplink 21
15:25:52:setup_element:INFO:	Setting the data phase to 17 for uplink 22
15:25:52:setup_element:INFO:	Setting the data phase to 16 for uplink 23
15:25:52:setup_element:INFO:	Setting the data phase to 25 for uplink 24
15:25:52:setup_element:INFO:	Setting the data phase to 28 for uplink 25
15:25:52:setup_element:INFO:	Setting the data phase to 29 for uplink 26
15:25:52:setup_element:INFO:	Setting the data phase to 34 for uplink 27
15:25:52:setup_element:INFO:	Setting the data phase to 35 for uplink 28
15:25:52:setup_element:INFO:	Setting the data phase to 38 for uplink 29
15:25:52:setup_element:INFO:	Setting the data phase to 35 for uplink 30
15:25:52:setup_element:INFO:	Setting the data phase to 35 for uplink 31
15:25:52:setup_element:INFO:	Beginning SMX ASICs map scan
15:25:52:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:52:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:52:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:25:52:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:25:52:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:25:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:25:52:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:25:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:25:52:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:25:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:25:52:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:25:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:25:53:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:25:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:25:53:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:25:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:25:53:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:25:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:25:53:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:25:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:25:53:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:25:55:setup_element:INFO:	Performing Elink synchronization
15:25:55:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:55:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:55:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:25:55:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:25:55:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
15:25:55:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:25:55:febtest:INFO:	Init all SMX (CSA): 30
15:26:09:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:26:10:febtest:INFO:	23-00 | XA-000-09-004-006-008-003-10 |  40.9 | 1147.8
15:26:10:febtest:INFO:	30-01 | XA-000-09-004-006-007-003-14 |  53.6 | 1106.2
15:26:10:febtest:INFO:	21-02 | XA-000-09-004-006-006-005-03 |  37.7 | 1171.5
15:26:10:febtest:INFO:	28-03 | XA-000-09-004-006-007-005-14 |  50.4 | 1124.0
15:26:11:febtest:INFO:	19-04 | XA-000-09-004-006-009-002-07 |  44.1 | 1141.9
15:26:11:febtest:INFO:	26-05 | XA-000-09-004-006-007-004-14 |  47.3 | 1124.0
15:26:11:febtest:INFO:	17-06 | XA-000-09-004-006-008-002-10 |  40.9 | 1141.9
15:26:11:febtest:INFO:	24-07 | XA-000-09-004-006-007-006-14 |  40.9 | 1141.9
15:26:12:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:26:14:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1159.654860 mV
15:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:14:ST3_smx:INFO:		Electrons
15:26:14:ST3_smx:INFO:	# loops 0
15:26:16:ST3_smx:INFO:	# loops 1
15:26:17:ST3_smx:INFO:	# loops 2
15:26:19:ST3_smx:INFO:	Total # of broken channels: 0
15:26:19:ST3_smx:INFO:	List of broken channels: []
15:26:19:ST3_smx:INFO:	Total # of broken channels: 0
15:26:19:ST3_smx:INFO:	List of broken channels: []
15:26:21:ST3_smx:INFO:	chip: 30-1 	 56.797143 C 	 1118.096875 mV
15:26:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:21:ST3_smx:INFO:		Electrons
15:26:21:ST3_smx:INFO:	# loops 0
15:26:22:ST3_smx:INFO:	# loops 1
15:26:24:ST3_smx:INFO:	# loops 2
15:26:26:ST3_smx:INFO:	Total # of broken channels: 0
15:26:26:ST3_smx:INFO:	List of broken channels: []
15:26:26:ST3_smx:INFO:	Total # of broken channels: 0
15:26:26:ST3_smx:INFO:	List of broken channels: []
15:26:28:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1183.292940 mV
15:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:28:ST3_smx:INFO:		Electrons
15:26:28:ST3_smx:INFO:	# loops 0
15:26:29:ST3_smx:INFO:	# loops 1
15:26:31:ST3_smx:INFO:	# loops 2
15:26:33:ST3_smx:INFO:	Total # of broken channels: 0
15:26:33:ST3_smx:INFO:	List of broken channels: []
15:26:33:ST3_smx:INFO:	Total # of broken channels: 0
15:26:33:ST3_smx:INFO:	List of broken channels: []
15:26:34:ST3_smx:INFO:	chip: 28-3 	 53.612520 C 	 1147.806000 mV
15:26:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:34:ST3_smx:INFO:		Electrons
15:26:34:ST3_smx:INFO:	# loops 0
15:26:36:ST3_smx:INFO:	# loops 1
15:26:37:ST3_smx:INFO:	# loops 2
15:26:39:ST3_smx:INFO:	Total # of broken channels: 0
15:26:39:ST3_smx:INFO:	List of broken channels: []
15:26:39:ST3_smx:INFO:	Total # of broken channels: 0
15:26:39:ST3_smx:INFO:	List of broken channels: []
15:26:41:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1153.732915 mV
15:26:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:41:ST3_smx:INFO:		Electrons
15:26:41:ST3_smx:INFO:	# loops 0
15:26:42:ST3_smx:INFO:	# loops 1
15:26:44:ST3_smx:INFO:	# loops 2
15:26:46:ST3_smx:INFO:	Total # of broken channels: 0
15:26:46:ST3_smx:INFO:	List of broken channels: []
15:26:46:ST3_smx:INFO:	Total # of broken channels: 0
15:26:46:ST3_smx:INFO:	List of broken channels: []
15:26:47:ST3_smx:INFO:	chip: 26-5 	 53.612520 C 	 1135.937260 mV
15:26:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:47:ST3_smx:INFO:		Electrons
15:26:47:ST3_smx:INFO:	# loops 0
15:26:49:ST3_smx:INFO:	# loops 1
15:26:51:ST3_smx:INFO:	# loops 2
15:26:53:ST3_smx:INFO:	Total # of broken channels: 0
15:26:53:ST3_smx:INFO:	List of broken channels: []
15:26:53:ST3_smx:INFO:	Total # of broken channels: 0
15:26:53:ST3_smx:INFO:	List of broken channels: []
15:26:54:ST3_smx:INFO:	chip: 17-6 	 44.073563 C 	 1147.806000 mV
15:26:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:54:ST3_smx:INFO:		Electrons
15:26:54:ST3_smx:INFO:	# loops 0
15:26:56:ST3_smx:INFO:	# loops 1
15:26:58:ST3_smx:INFO:	# loops 2
15:27:00:ST3_smx:INFO:	Total # of broken channels: 0
15:27:00:ST3_smx:INFO:	List of broken channels: []
15:27:00:ST3_smx:INFO:	Total # of broken channels: 0
15:27:00:ST3_smx:INFO:	List of broken channels: []
15:27:01:ST3_smx:INFO:	chip: 24-7 	 44.073563 C 	 1153.732915 mV
15:27:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:01:ST3_smx:INFO:		Electrons
15:27:01:ST3_smx:INFO:	# loops 0
15:27:03:ST3_smx:INFO:	# loops 1
15:27:04:ST3_smx:INFO:	# loops 2
15:27:06:ST3_smx:INFO:	Total # of broken channels: 0
15:27:06:ST3_smx:INFO:	List of broken channels: []
15:27:06:ST3_smx:INFO:	Total # of broken channels: 0
15:27:06:ST3_smx:INFO:	List of broken channels: []
15:27:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:27:06:febtest:INFO:	23-00 | XA-000-09-004-006-008-003-10 |  47.3 | 1177.4
15:27:07:febtest:INFO:	30-01 | XA-000-09-004-006-007-003-14 |  60.0 | 1135.9
15:27:07:febtest:INFO:	21-02 | XA-000-09-004-006-006-005-03 |  40.9 | 1201.0
15:27:07:febtest:INFO:	28-03 | XA-000-09-004-006-007-005-14 |  53.6 | 1189.2
15:27:07:febtest:INFO:	19-04 | XA-000-09-004-006-009-002-07 |  47.3 | 1177.4
15:27:07:febtest:INFO:	26-05 | XA-000-09-004-006-007-004-14 |  53.6 | 1153.7
15:27:08:febtest:INFO:	17-06 | XA-000-09-004-006-008-002-10 |  44.1 | 1171.5
15:27:08:febtest:INFO:	24-07 | XA-000-09-004-006-007-006-14 |  47.3 | 1165.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_10_28-15_25_35
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4083| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	16334

MODULE_NAME:	L5UR601119 M5UR6B1011191B2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.5490', '1.849', '2.5570']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0530', '1.850', '2.6160']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9920', '1.850', '0.5346']
Comment.txt