
FEB_4085 25.10.24 14:11:10
TextEdit.txt
14:11:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:11:10:ST3_Shared:INFO: FEB-Microcable 14:11:10:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:11:10:febtest:INFO: Testing FEB with SN 4085 14:11:11:smx_tester:INFO: Scanning setup 14:11:11:elinks:INFO: Disabling clock on downlink 0 14:11:11:elinks:INFO: Disabling clock on downlink 1 14:11:11:elinks:INFO: Disabling clock on downlink 2 14:11:11:elinks:INFO: Disabling clock on downlink 3 14:11:12:elinks:INFO: Disabling clock on downlink 4 14:11:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:11:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:12:elinks:INFO: Disabling clock on downlink 0 14:11:12:elinks:INFO: Disabling clock on downlink 1 14:11:12:elinks:INFO: Disabling clock on downlink 2 14:11:12:elinks:INFO: Disabling clock on downlink 3 14:11:12:elinks:INFO: Disabling clock on downlink 4 14:11:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:11:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:12:elinks:INFO: Disabling clock on downlink 0 14:11:12:elinks:INFO: Disabling clock on downlink 1 14:11:12:elinks:INFO: Disabling clock on downlink 2 14:11:12:elinks:INFO: Disabling clock on downlink 3 14:11:12:elinks:INFO: Disabling clock on downlink 4 14:11:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:11:12:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:11:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:12:elinks:INFO: Disabling clock on downlink 0 14:11:12:elinks:INFO: Disabling clock on downlink 1 14:11:12:elinks:INFO: Disabling clock on downlink 2 14:11:12:elinks:INFO: Disabling clock on downlink 3 14:11:12:elinks:INFO: Disabling clock on downlink 4 14:11:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:11:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:12:elinks:INFO: Disabling clock on downlink 0 14:11:12:elinks:INFO: Disabling clock on downlink 1 14:11:12:elinks:INFO: Disabling clock on downlink 2 14:11:12:elinks:INFO: Disabling clock on downlink 3 14:11:12:elinks:INFO: Disabling clock on downlink 4 14:11:12:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:11:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:11:12:setup_element:INFO: Scanning clock phase 14:11:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:13:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:11:13:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________XXXXXX__________ Clock Delay: 26 14:11:13:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________XXXXXX__________ Clock Delay: 26 14:11:13:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________XXXXXX___________ Clock Delay: 25 14:11:13:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________XXXXXX___________ Clock Delay: 25 14:11:13:setup_element:INFO: Eye window for uplink 20: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 21: __________________________________________________________________XXXXX_________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________ Clock Delay: 40 14:11:13:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________ Clock Delay: 40 14:11:13:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXXX________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXXX________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXX________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXX________ Clock Delay: 28 14:11:13:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________ Clock Delay: 40 14:11:13:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________ Clock Delay: 40 14:11:13:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 14:11:13:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXX_______ Clock Delay: 29 14:11:13:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 14:11:13:setup_element:INFO: Scanning data phases 14:11:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:18:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:11:18:setup_element:INFO: Eye window for uplink 16: XX_______________________________XXXXXXX Data delay found: 17 14:11:18:setup_element:INFO: Eye window for uplink 17: ______________________________XXXXXXXX__ Data delay found: 13 14:11:18:setup_element:INFO: Eye window for uplink 18: X__________________________________XXXXX Data delay found: 17 14:11:18:setup_element:INFO: Eye window for uplink 19: _______________________________XXXXXXX__ Data delay found: 14 14:11:18:setup_element:INFO: Eye window for uplink 20: XXX________________________________XXXXX Data delay found: 18 14:11:18:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX Data delay found: 17 14:11:18:setup_element:INFO: Eye window for uplink 22: XXXX_________________________________XXX Data delay found: 20 14:11:18:setup_element:INFO: Eye window for uplink 23: XXXXX____________________________XXXXXXX Data delay found: 18 14:11:18:setup_element:INFO: Eye window for uplink 24: _____XXXXXXX____________________________ Data delay found: 28 14:11:18:setup_element:INFO: Eye window for uplink 25: ________XXXXXXX_________________________ Data delay found: 31 14:11:18:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________ Data delay found: 30 14:11:18:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXXX____________________ Data delay found: 35 14:11:18:setup_element:INFO: Eye window for uplink 28: ____________XXXXXXX_____________________ Data delay found: 35 14:11:18:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXX__________________ Data delay found: 38 14:11:18:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXXX_________________ Data delay found: 38 14:11:18:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXXX_________________ Data delay found: 38 14:11:18:setup_element:INFO: Setting the data phase to 17 for uplink 16 14:11:18:setup_element:INFO: Setting the data phase to 13 for uplink 17 14:11:18:setup_element:INFO: Setting the data phase to 17 for uplink 18 14:11:18:setup_element:INFO: Setting the data phase to 14 for uplink 19 14:11:18:setup_element:INFO: Setting the data phase to 18 for uplink 20 14:11:18:setup_element:INFO: Setting the data phase to 17 for uplink 21 14:11:18:setup_element:INFO: Setting the data phase to 20 for uplink 22 14:11:18:setup_element:INFO: Setting the data phase to 18 for uplink 23 14:11:18:setup_element:INFO: Setting the data phase to 28 for uplink 24 14:11:18:setup_element:INFO: Setting the data phase to 31 for uplink 25 14:11:18:setup_element:INFO: Setting the data phase to 30 for uplink 26 14:11:18:setup_element:INFO: Setting the data phase to 35 for uplink 27 14:11:18:setup_element:INFO: Setting the data phase to 35 for uplink 28 14:11:18:setup_element:INFO: Setting the data phase to 38 for uplink 29 14:11:18:setup_element:INFO: Setting the data phase to 38 for uplink 30 14:11:18:setup_element:INFO: Setting the data phase to 38 for uplink 31 14:11:18:setup_element:INFO: Beginning SMX ASICs map scan 14:11:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:18:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:11:18:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:11:18:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:11:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:11:18:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:11:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:11:18:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:11:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:11:18:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:11:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:11:19:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:11:19:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:11:19:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:11:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:11:19:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:11:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:11:19:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:11:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:11:19:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:11:21:setup_element:INFO: Performing Elink synchronization 14:11:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:11:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:11:21:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:11:21:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:11:21:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:11:21:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:11:21:febtest:INFO: Init all SMX (CSA): 30 14:11:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:11:39:febtest:INFO: 23-00 | XA-000-09-004-006-008-010-10 | 50.4 | 1130.0 14:11:39:febtest:INFO: 30-01 | XA-000-09-004-006-007-007-14 | 50.4 | 1130.0 14:11:39:febtest:INFO: 21-02 | XA-000-09-004-006-007-010-14 | 53.6 | 1112.1 14:11:40:febtest:INFO: 28-03 | XA-000-09-004-006-006-016-04 | 44.1 | 1159.7 14:11:40:febtest:INFO: 19-04 | XA-000-09-004-006-009-009-07 | 47.3 | 1141.9 14:11:40:febtest:INFO: 26-05 | XA-000-09-004-006-008-011-10 | 53.6 | 1112.1 14:11:40:febtest:INFO: 17-06 | XA-000-09-004-006-008-009-10 | 47.3 | 1135.9 14:11:41:febtest:INFO: 24-07 | XA-000-09-004-006-009-010-07 | 44.1 | 1141.9 14:11:42:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:11:43:ST3_smx:INFO: chip: 23-0 50.430383 C 1141.874115 mV 14:11:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:43:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:43:ST3_smx:INFO: Electrons 14:11:43:ST3_smx:INFO: # loops 0 14:11:45:ST3_smx:INFO: # loops 1 14:11:47:ST3_smx:INFO: # loops 2 14:11:49:ST3_smx:INFO: Total # of broken channels: 1 14:11:49:ST3_smx:INFO: List of broken channels: [36] 14:11:49:ST3_smx:INFO: Total # of broken channels: 0 14:11:49:ST3_smx:INFO: List of broken channels: [] 14:11:51:ST3_smx:INFO: chip: 30-1 50.430383 C 1141.874115 mV 14:11:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:51:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:51:ST3_smx:INFO: Electrons 14:11:51:ST3_smx:INFO: # loops 0 14:11:53:ST3_smx:INFO: # loops 1 14:11:55:ST3_smx:INFO: # loops 2 14:11:57:ST3_smx:INFO: Total # of broken channels: 0 14:11:57:ST3_smx:INFO: List of broken channels: [] 14:11:57:ST3_smx:INFO: Total # of broken channels: 0 14:11:57:ST3_smx:INFO: List of broken channels: [] 14:11:59:ST3_smx:INFO: chip: 21-2 53.612520 C 1124.048640 mV 14:11:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:11:59:ST3_smx:INFO: Electrons 14:11:59:ST3_smx:INFO: # loops 0 14:12:01:ST3_smx:INFO: # loops 1 14:12:03:ST3_smx:INFO: # loops 2 14:12:05:ST3_smx:INFO: Total # of broken channels: 0 14:12:05:ST3_smx:INFO: List of broken channels: [] 14:12:05:ST3_smx:INFO: Total # of broken channels: 0 14:12:05:ST3_smx:INFO: List of broken channels: [] 14:12:07:ST3_smx:INFO: chip: 28-3 47.250730 C 1171.483840 mV 14:12:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:07:ST3_smx:INFO: Electrons 14:12:07:ST3_smx:INFO: # loops 0 14:12:09:ST3_smx:INFO: # loops 1 14:12:11:ST3_smx:INFO: # loops 2 14:12:13:ST3_smx:INFO: Total # of broken channels: 0 14:12:13:ST3_smx:INFO: List of broken channels: [] 14:12:13:ST3_smx:INFO: Total # of broken channels: 0 14:12:13:ST3_smx:INFO: List of broken channels: [] 14:12:14:ST3_smx:INFO: chip: 19-4 47.250730 C 1153.732915 mV 14:12:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:14:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:14:ST3_smx:INFO: Electrons 14:12:14:ST3_smx:INFO: # loops 0 14:12:16:ST3_smx:INFO: # loops 1 14:12:18:ST3_smx:INFO: # loops 2 14:12:20:ST3_smx:INFO: Total # of broken channels: 0 14:12:20:ST3_smx:INFO: List of broken channels: [] 14:12:20:ST3_smx:INFO: Total # of broken channels: 0 14:12:20:ST3_smx:INFO: List of broken channels: [] 14:12:22:ST3_smx:INFO: chip: 26-5 56.797143 C 1124.048640 mV 14:12:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:22:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:22:ST3_smx:INFO: Electrons 14:12:22:ST3_smx:INFO: # loops 0 14:12:24:ST3_smx:INFO: # loops 1 14:12:25:ST3_smx:INFO: # loops 2 14:12:27:ST3_smx:INFO: Total # of broken channels: 0 14:12:27:ST3_smx:INFO: List of broken channels: [] 14:12:27:ST3_smx:INFO: Total # of broken channels: 0 14:12:27:ST3_smx:INFO: List of broken channels: [] 14:12:29:ST3_smx:INFO: chip: 17-6 47.250730 C 1141.874115 mV 14:12:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:29:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:29:ST3_smx:INFO: Electrons 14:12:29:ST3_smx:INFO: # loops 0 14:12:31:ST3_smx:INFO: # loops 1 14:12:33:ST3_smx:INFO: # loops 2 14:12:35:ST3_smx:INFO: Total # of broken channels: 0 14:12:35:ST3_smx:INFO: List of broken channels: [] 14:12:35:ST3_smx:INFO: Total # of broken channels: 0 14:12:35:ST3_smx:INFO: List of broken channels: [] 14:12:37:ST3_smx:INFO: chip: 24-7 47.250730 C 1153.732915 mV 14:12:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:37:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:12:37:ST3_smx:INFO: Electrons 14:12:37:ST3_smx:INFO: # loops 0 14:12:39:ST3_smx:INFO: # loops 1 14:12:41:ST3_smx:INFO: # loops 2 14:12:43:ST3_smx:INFO: Total # of broken channels: 0 14:12:43:ST3_smx:INFO: List of broken channels: [] 14:12:43:ST3_smx:INFO: Total # of broken channels: 0 14:12:43:ST3_smx:INFO: List of broken channels: [] 14:12:43:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:12:43:febtest:INFO: 23-00 | XA-000-09-004-006-008-010-10 | 53.6 | 1165.6 14:12:44:febtest:INFO: 30-01 | XA-000-09-004-006-007-007-14 | 53.6 | 1165.6 14:12:44:febtest:INFO: 21-02 | XA-000-09-004-006-007-010-14 | 56.8 | 1147.8 14:12:44:febtest:INFO: 28-03 | XA-000-09-004-006-006-016-04 | 47.3 | 1195.1 14:12:44:febtest:INFO: 19-04 | XA-000-09-004-006-009-009-07 | 47.3 | 1171.5 14:12:44:febtest:INFO: 26-05 | XA-000-09-004-006-008-011-10 | 56.8 | 1147.8 14:12:45:febtest:INFO: 17-06 | XA-000-09-004-006-008-009-10 | 50.4 | 1165.6 14:12:45:febtest:INFO: 24-07 | XA-000-09-004-006-009-010-07 | 47.3 | 1177.4 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_10_25-14_11_10 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4085| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5690', '1.849', '2.3950'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0250', '1.850', '2.5930'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9930', '1.850', '0.5313']