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FEB_4086 25.10.24 09:57:54
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09:57:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:57:54:ST3_Shared:INFO: FEB-Microcable
09:57:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:57:54:febtest:INFO: Testing FEB with SN 4086
09:57:56:smx_tester:INFO: Scanning setup
09:57:56:elinks:INFO: Disabling clock on downlink 0
09:57:56:elinks:INFO: Disabling clock on downlink 1
09:57:56:elinks:INFO: Disabling clock on downlink 2
09:57:56:elinks:INFO: Disabling clock on downlink 3
09:57:56:elinks:INFO: Disabling clock on downlink 4
09:57:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:57:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:57:56:elinks:INFO: Disabling clock on downlink 0
09:57:56:elinks:INFO: Disabling clock on downlink 1
09:57:56:elinks:INFO: Disabling clock on downlink 2
09:57:56:elinks:INFO: Disabling clock on downlink 3
09:57:56:elinks:INFO: Disabling clock on downlink 4
09:57:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:57:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:57:56:elinks:INFO: Disabling clock on downlink 0
09:57:56:elinks:INFO: Disabling clock on downlink 1
09:57:56:elinks:INFO: Disabling clock on downlink 2
09:57:56:elinks:INFO: Disabling clock on downlink 3
09:57:56:elinks:INFO: Disabling clock on downlink 4
09:57:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:57:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:57:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:57:56:elinks:INFO: Disabling clock on downlink 0
09:57:56:elinks:INFO: Disabling clock on downlink 1
09:57:56:elinks:INFO: Disabling clock on downlink 2
09:57:56:elinks:INFO: Disabling clock on downlink 3
09:57:56:elinks:INFO: Disabling clock on downlink 4
09:57:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:57:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:57:56:elinks:INFO: Disabling clock on downlink 0
09:57:56:elinks:INFO: Disabling clock on downlink 1
09:57:56:elinks:INFO: Disabling clock on downlink 2
09:57:56:elinks:INFO: Disabling clock on downlink 3
09:57:56:elinks:INFO: Disabling clock on downlink 4
09:57:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:57:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:57:56:setup_element:INFO: Scanning clock phase
09:57:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:57:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:57:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:57:57:setup_element:INFO: Eye window for uplink 16: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Eye window for uplink 17: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 22: _________________________________________________________________XXXXXX_________
Clock Delay: 27
09:57:57:setup_element:INFO: Eye window for uplink 23: _________________________________________________________________XXXXXX_________
Clock Delay: 27
09:57:57:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
09:57:57:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:57:57:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
09:57:57:setup_element:INFO: Scanning data phases
09:57:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:57:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:58:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:58:02:setup_element:INFO: Eye window for uplink 16: XXXXX______________________________XXXXX
Data delay found: 19
09:58:02:setup_element:INFO: Eye window for uplink 17: XX_______________________________XXXXXXX
Data delay found: 17
09:58:02:setup_element:INFO: Eye window for uplink 18: XXXXX______________________________XXXXX
Data delay found: 19
09:58:02:setup_element:INFO: Eye window for uplink 19: XX_______________________________XXXXXXX
Data delay found: 17
09:58:02:setup_element:INFO: Eye window for uplink 20: XX_________________________________XXXXX
Data delay found: 18
09:58:02:setup_element:INFO: Eye window for uplink 21: X_________________________________XXXXXX
Data delay found: 17
09:58:02:setup_element:INFO: Eye window for uplink 22: XX________________________________XXXXX_
Data delay found: 17
09:58:02:setup_element:INFO: Eye window for uplink 23: XXXX___________________________XXXXXXXXX
Data delay found: 17
09:58:02:setup_element:INFO: Eye window for uplink 24: __XXXXXXX_______________________________
Data delay found: 25
09:58:02:setup_element:INFO: Eye window for uplink 25: ____XXXXXXXX____________________________
Data delay found: 27
09:58:02:setup_element:INFO: Eye window for uplink 26: ____XXXXXXXXXX__________________________
Data delay found: 28
09:58:02:setup_element:INFO: Eye window for uplink 27: _________XXXXXXXXXX_____________________
Data delay found: 33
09:58:02:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXX_____________________
Data delay found: 34
09:58:02:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXXX_________________
Data delay found: 38
09:58:02:setup_element:INFO: Eye window for uplink 30: __________XXXXXXXXXXX___________________
Data delay found: 35
09:58:02:setup_element:INFO: Eye window for uplink 31: ____________XXXXXXXXX___________________
Data delay found: 36
09:58:02:setup_element:INFO: Setting the data phase to 19 for uplink 16
09:58:02:setup_element:INFO: Setting the data phase to 17 for uplink 17
09:58:02:setup_element:INFO: Setting the data phase to 19 for uplink 18
09:58:02:setup_element:INFO: Setting the data phase to 17 for uplink 19
09:58:02:setup_element:INFO: Setting the data phase to 18 for uplink 20
09:58:02:setup_element:INFO: Setting the data phase to 17 for uplink 21
09:58:02:setup_element:INFO: Setting the data phase to 17 for uplink 22
09:58:02:setup_element:INFO: Setting the data phase to 17 for uplink 23
09:58:02:setup_element:INFO: Setting the data phase to 25 for uplink 24
09:58:02:setup_element:INFO: Setting the data phase to 27 for uplink 25
09:58:02:setup_element:INFO: Setting the data phase to 28 for uplink 26
09:58:02:setup_element:INFO: Setting the data phase to 33 for uplink 27
09:58:02:setup_element:INFO: Setting the data phase to 34 for uplink 28
09:58:02:setup_element:INFO: Setting the data phase to 38 for uplink 29
09:58:02:setup_element:INFO: Setting the data phase to 35 for uplink 30
09:58:02:setup_element:INFO: Setting the data phase to 36 for uplink 31
09:58:02:setup_element:INFO: Beginning SMX ASICs map scan
09:58:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:58:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:58:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:58:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:58:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:58:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:58:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:58:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:58:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:58:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:58:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:58:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:58:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:58:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:58:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:58:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:58:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:58:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:58:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:58:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:58:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:58:05:setup_element:INFO: Performing Elink synchronization
09:58:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:58:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:58:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:58:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:58:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:58:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:58:06:febtest:INFO: Init all SMX (CSA): 30
09:58:19:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:58:19:febtest:INFO: 23-00 | XA-000-09-004-006-008-003-10 | 44.1 | 1141.9
09:58:19:febtest:INFO: 30-01 | XA-000-09-004-006-007-003-14 | 53.6 | 1100.2
09:58:19:febtest:INFO: 21-02 | XA-000-09-004-006-006-005-03 | 40.9 | 1165.6
09:58:20:febtest:INFO: 28-03 | XA-000-09-004-006-007-005-14 | 50.4 | 1124.0
09:58:20:febtest:INFO: 19-04 | XA-000-09-004-006-009-002-07 | 47.3 | 1135.9
09:58:20:febtest:INFO: 26-05 | XA-000-09-004-006-007-004-14 | 50.4 | 1118.1
09:58:20:febtest:INFO: 17-06 | XA-000-09-004-006-008-002-10 | 44.1 | 1135.9
09:58:21:febtest:INFO: 24-07 | XA-000-09-004-006-007-006-14 | 44.1 | 1141.9
09:58:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:58:23:ST3_smx:INFO: chip: 23-0 44.073563 C 1153.732915 mV
09:58:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:23:ST3_smx:INFO: Electrons
09:58:23:ST3_smx:INFO: # loops 0
09:58:25:ST3_smx:INFO: # loops 1
09:58:27:ST3_smx:INFO: # loops 2
09:58:28:ST3_smx:INFO: Total # of broken channels: 0
09:58:28:ST3_smx:INFO: List of broken channels: []
09:58:28:ST3_smx:INFO: Total # of broken channels: 0
09:58:28:ST3_smx:INFO: List of broken channels: []
09:58:30:ST3_smx:INFO: chip: 30-1 56.797143 C 1112.140140 mV
09:58:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:30:ST3_smx:INFO: Electrons
09:58:30:ST3_smx:INFO: # loops 0
09:58:31:ST3_smx:INFO: # loops 1
09:58:33:ST3_smx:INFO: # loops 2
09:58:35:ST3_smx:INFO: Total # of broken channels: 0
09:58:35:ST3_smx:INFO: List of broken channels: []
09:58:35:ST3_smx:INFO: Total # of broken channels: 0
09:58:35:ST3_smx:INFO: List of broken channels: []
09:58:36:ST3_smx:INFO: chip: 21-2 40.898880 C 1177.390875 mV
09:58:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:36:ST3_smx:INFO: Electrons
09:58:36:ST3_smx:INFO: # loops 0
09:58:38:ST3_smx:INFO: # loops 1
09:58:39:ST3_smx:INFO: # loops 2
09:58:41:ST3_smx:INFO: Total # of broken channels: 0
09:58:41:ST3_smx:INFO: List of broken channels: []
09:58:41:ST3_smx:INFO: Total # of broken channels: 0
09:58:41:ST3_smx:INFO: List of broken channels: []
09:58:42:ST3_smx:INFO: chip: 28-3 53.612520 C 1141.874115 mV
09:58:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:42:ST3_smx:INFO: Electrons
09:58:42:ST3_smx:INFO: # loops 0
09:58:44:ST3_smx:INFO: # loops 1
09:58:46:ST3_smx:INFO: # loops 2
09:58:47:ST3_smx:INFO: Total # of broken channels: 0
09:58:47:ST3_smx:INFO: List of broken channels: []
09:58:47:ST3_smx:INFO: Total # of broken channels: 0
09:58:47:ST3_smx:INFO: List of broken channels: []
09:58:49:ST3_smx:INFO: chip: 19-4 47.250730 C 1147.806000 mV
09:58:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:49:ST3_smx:INFO: Electrons
09:58:49:ST3_smx:INFO: # loops 0
09:58:50:ST3_smx:INFO: # loops 1
09:58:52:ST3_smx:INFO: # loops 2
09:58:54:ST3_smx:INFO: Total # of broken channels: 0
09:58:54:ST3_smx:INFO: List of broken channels: []
09:58:54:ST3_smx:INFO: Total # of broken channels: 0
09:58:54:ST3_smx:INFO: List of broken channels: []
09:58:55:ST3_smx:INFO: chip: 26-5 53.612520 C 1129.995435 mV
09:58:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:58:55:ST3_smx:INFO: Electrons
09:58:55:ST3_smx:INFO: # loops 0
09:58:57:ST3_smx:INFO: # loops 1
09:58:58:ST3_smx:INFO: # loops 2
09:59:00:ST3_smx:INFO: Total # of broken channels: 0
09:59:00:ST3_smx:INFO: List of broken channels: []
09:59:00:ST3_smx:INFO: Total # of broken channels: 0
09:59:00:ST3_smx:INFO: List of broken channels: []
09:59:01:ST3_smx:INFO: chip: 17-6 44.073563 C 1147.806000 mV
09:59:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:59:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:59:01:ST3_smx:INFO: Electrons
09:59:01:ST3_smx:INFO: # loops 0
09:59:03:ST3_smx:INFO: # loops 1
09:59:04:ST3_smx:INFO: # loops 2
09:59:06:ST3_smx:INFO: Total # of broken channels: 0
09:59:06:ST3_smx:INFO: List of broken channels: []
09:59:06:ST3_smx:INFO: Total # of broken channels: 0
09:59:06:ST3_smx:INFO: List of broken channels: []
09:59:08:ST3_smx:INFO: chip: 24-7 47.250730 C 1147.806000 mV
09:59:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:59:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:59:08:ST3_smx:INFO: Electrons
09:59:08:ST3_smx:INFO: # loops 0
09:59:09:ST3_smx:INFO: # loops 1
09:59:11:ST3_smx:INFO: # loops 2
09:59:13:ST3_smx:INFO: Total # of broken channels: 0
09:59:13:ST3_smx:INFO: List of broken channels: []
09:59:13:ST3_smx:INFO: Total # of broken channels: 0
09:59:13:ST3_smx:INFO: List of broken channels: []
09:59:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:59:13:febtest:INFO: 23-00 | XA-000-09-004-006-008-003-10 | 44.1 | 1177.4
09:59:14:febtest:INFO: 30-01 | XA-000-09-004-006-007-003-14 | 56.8 | 1135.9
09:59:14:febtest:INFO: 21-02 | XA-000-09-004-006-006-005-03 | 40.9 | 1195.1
09:59:14:febtest:INFO: 28-03 | XA-000-09-004-006-007-005-14 | 53.6 | 1171.5
09:59:14:febtest:INFO: 19-04 | XA-000-09-004-006-009-002-07 | 50.4 | 1171.5
09:59:14:febtest:INFO: 26-05 | XA-000-09-004-006-007-004-14 | 53.6 | 1153.7
09:59:15:febtest:INFO: 17-06 | XA-000-09-004-006-008-002-10 | 47.3 | 1165.6
09:59:15:febtest:INFO: 24-07 | XA-000-09-004-006-007-006-14 | 47.3 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_10_25-09_57_54
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4086| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.8810', '1.850', '2.4620']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0200', '1.849', '2.6050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.5331']