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FEB_4087 06.11.24 08:28:42
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08:28:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:28:42:ST3_Shared:INFO: FEB-Microcable
08:28:42:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:28:42:febtest:INFO: Testing FEB with SN 4087
08:28:43:smx_tester:INFO: Scanning setup
08:28:43:elinks:INFO: Disabling clock on downlink 0
08:28:43:elinks:INFO: Disabling clock on downlink 1
08:28:43:elinks:INFO: Disabling clock on downlink 2
08:28:43:elinks:INFO: Disabling clock on downlink 3
08:28:43:elinks:INFO: Disabling clock on downlink 4
08:28:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:28:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:28:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:28:43:elinks:INFO: Disabling clock on downlink 0
08:28:43:elinks:INFO: Disabling clock on downlink 1
08:28:43:elinks:INFO: Disabling clock on downlink 2
08:28:43:elinks:INFO: Disabling clock on downlink 3
08:28:43:elinks:INFO: Disabling clock on downlink 4
08:28:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:28:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:28:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:28:43:elinks:INFO: Disabling clock on downlink 0
08:28:43:elinks:INFO: Disabling clock on downlink 1
08:28:43:elinks:INFO: Disabling clock on downlink 2
08:28:43:elinks:INFO: Disabling clock on downlink 3
08:28:43:elinks:INFO: Disabling clock on downlink 4
08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:28:44:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:28:44:elinks:INFO: Disabling clock on downlink 0
08:28:44:elinks:INFO: Disabling clock on downlink 1
08:28:44:elinks:INFO: Disabling clock on downlink 2
08:28:44:elinks:INFO: Disabling clock on downlink 3
08:28:44:elinks:INFO: Disabling clock on downlink 4
08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:28:44:elinks:INFO: Disabling clock on downlink 0
08:28:44:elinks:INFO: Disabling clock on downlink 1
08:28:44:elinks:INFO: Disabling clock on downlink 2
08:28:44:elinks:INFO: Disabling clock on downlink 3
08:28:44:elinks:INFO: Disabling clock on downlink 4
08:28:44:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:28:44:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:28:44:setup_element:INFO: Scanning clock phase
08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:28:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:28:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:28:44:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:28:44:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________
Clock Delay: 27
08:28:44:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
08:28:44:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
08:28:44:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
08:28:44:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
08:28:44:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
08:28:44:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
08:28:44:setup_element:INFO: Setting the clock phase to 26 for group 0, downlink 2
08:28:44:setup_element:INFO: Scanning data phases
08:28:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:28:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:28:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:28:49:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
08:28:49:setup_element:INFO: Eye window for uplink 25: ____________XXXXXXX_____________________
Data delay found: 35
08:28:49:setup_element:INFO: Eye window for uplink 26: _______XXXXXXX__________________________
Data delay found: 30
08:28:49:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
08:28:49:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXX___________________
Data delay found: 37
08:28:49:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXXX________________
Data delay found: 39
08:28:49:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXXX________________
Data delay found: 39
08:28:49:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXXX_______________
Data delay found: 0
08:28:49:setup_element:INFO: Setting the data phase to 31 for uplink 24
08:28:49:setup_element:INFO: Setting the data phase to 35 for uplink 25
08:28:49:setup_element:INFO: Setting the data phase to 30 for uplink 26
08:28:49:setup_element:INFO: Setting the data phase to 34 for uplink 27
08:28:49:setup_element:INFO: Setting the data phase to 37 for uplink 28
08:28:49:setup_element:INFO: Setting the data phase to 39 for uplink 29
08:28:49:setup_element:INFO: Setting the data phase to 39 for uplink 30
08:28:49:setup_element:INFO: Setting the data phase to 0 for uplink 31
08:28:49:setup_element:INFO: Beginning SMX ASICs map scan
08:28:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:28:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:28:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:28:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:28:49:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:28:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:28:50:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:28:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:28:50:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:28:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:28:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:28:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:28:51:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:28:52:setup_element:INFO: Performing Elink synchronization
08:28:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:28:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:28:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:28:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:28:52:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:28:52:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:28:52:febtest:INFO: Init all SMX (CSA): 30
08:29:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:29:00:febtest:INFO: 30-01 | XA-000-09-004-004-005-010-04 | 21.9 | 1218.6
08:29:00:febtest:INFO: 28-03 | XA-000-09-004-004-005-011-04 | 44.1 | 1141.9
08:29:00:febtest:INFO: 26-05 | XA-000-09-004-004-005-012-04 | 34.6 | 1171.5
08:29:00:febtest:INFO: 24-07 | XA-000-09-004-004-005-013-04 | 31.4 | 1177.4
08:29:01:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:29:03:ST3_smx:INFO: chip: 30-1 21.902970 C 1230.330540 mV
08:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:03:ST3_smx:INFO: Electrons
08:29:03:ST3_smx:INFO: # loops 0
08:29:05:ST3_smx:INFO: # loops 1
08:29:07:ST3_smx:INFO: # loops 2
08:29:09:ST3_smx:INFO: Total # of broken channels: 0
08:29:09:ST3_smx:INFO: List of broken channels: []
08:29:09:ST3_smx:INFO: Total # of broken channels: 0
08:29:09:ST3_smx:INFO: List of broken channels: []
08:29:11:ST3_smx:INFO: chip: 28-3 44.073563 C 1147.806000 mV
08:29:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:11:ST3_smx:INFO: Electrons
08:29:11:ST3_smx:INFO: # loops 0
08:29:12:ST3_smx:INFO: # loops 1
08:29:14:ST3_smx:INFO: # loops 2
08:29:15:ST3_smx:INFO: Total # of broken channels: 0
08:29:15:ST3_smx:INFO: List of broken channels: []
08:29:15:ST3_smx:INFO: Total # of broken channels: 0
08:29:15:ST3_smx:INFO: List of broken channels: []
08:29:17:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
08:29:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:17:ST3_smx:INFO: Electrons
08:29:17:ST3_smx:INFO: # loops 0
08:29:19:ST3_smx:INFO: # loops 1
08:29:20:ST3_smx:INFO: # loops 2
08:29:22:ST3_smx:INFO: Total # of broken channels: 0
08:29:22:ST3_smx:INFO: List of broken channels: []
08:29:22:ST3_smx:INFO: Total # of broken channels: 0
08:29:22:ST3_smx:INFO: List of broken channels: []
08:29:24:ST3_smx:INFO: chip: 24-7 31.389742 C 1183.292940 mV
08:29:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:29:24:ST3_smx:INFO: Electrons
08:29:24:ST3_smx:INFO: # loops 0
08:29:25:ST3_smx:INFO: # loops 1
08:29:27:ST3_smx:INFO: # loops 2
08:29:28:ST3_smx:INFO: Total # of broken channels: 0
08:29:28:ST3_smx:INFO: List of broken channels: []
08:29:28:ST3_smx:INFO: Total # of broken channels: 0
08:29:28:ST3_smx:INFO: List of broken channels: []
08:29:29:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:29:29:febtest:INFO: 30-01 | XA-000-09-004-004-005-010-04 | 21.9 | 1247.9
08:29:29:febtest:INFO: 28-03 | XA-000-09-004-004-005-011-04 | 44.1 | 1171.5
08:29:29:febtest:INFO: 26-05 | XA-000-09-004-004-005-012-04 | 37.7 | 1195.1
08:29:29:febtest:INFO: 24-07 | XA-000-09-004-004-005-013-04 | 34.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_06-08_28_42
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4087| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '0.7465', '1.850', '1.2010']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '1.2400']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9908', '1.850', '0.2692']