
FEB_4087 06.11.24 14:13:12
TextEdit.txt
14:13:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:13:12:ST3_Shared:INFO: FEB-Microcable 14:13:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:13:12:febtest:INFO: Testing FEB with SN 4087 14:13:14:smx_tester:INFO: Scanning setup 14:13:14:elinks:INFO: Disabling clock on downlink 0 14:13:14:elinks:INFO: Disabling clock on downlink 1 14:13:14:elinks:INFO: Disabling clock on downlink 2 14:13:14:elinks:INFO: Disabling clock on downlink 3 14:13:14:elinks:INFO: Disabling clock on downlink 4 14:13:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:13:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:14:elinks:INFO: Disabling clock on downlink 0 14:13:14:elinks:INFO: Disabling clock on downlink 1 14:13:14:elinks:INFO: Disabling clock on downlink 2 14:13:14:elinks:INFO: Disabling clock on downlink 3 14:13:14:elinks:INFO: Disabling clock on downlink 4 14:13:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:13:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:14:elinks:INFO: Disabling clock on downlink 0 14:13:14:elinks:INFO: Disabling clock on downlink 1 14:13:14:elinks:INFO: Disabling clock on downlink 2 14:13:14:elinks:INFO: Disabling clock on downlink 3 14:13:14:elinks:INFO: Disabling clock on downlink 4 14:13:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:13:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:13:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:14:elinks:INFO: Disabling clock on downlink 0 14:13:14:elinks:INFO: Disabling clock on downlink 1 14:13:14:elinks:INFO: Disabling clock on downlink 2 14:13:14:elinks:INFO: Disabling clock on downlink 3 14:13:14:elinks:INFO: Disabling clock on downlink 4 14:13:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:13:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:14:elinks:INFO: Disabling clock on downlink 0 14:13:14:elinks:INFO: Disabling clock on downlink 1 14:13:14:elinks:INFO: Disabling clock on downlink 2 14:13:14:elinks:INFO: Disabling clock on downlink 3 14:13:14:elinks:INFO: Disabling clock on downlink 4 14:13:14:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:13:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:13:14:setup_element:INFO: Scanning clock phase 14:13:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:13:15:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 14:13:15:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 14:13:15:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 14:13:15:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________XXXXXXX_________ Clock Delay: 27 14:13:15:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXX________ Clock Delay: 28 14:13:15:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXX________ Clock Delay: 28 14:13:15:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 14:13:15:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 14:13:15:setup_element:INFO: Scanning data phases 14:13:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:20:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:13:20:setup_element:INFO: Eye window for uplink 16: XXXXX_______________________________XXXX Data delay found: 20 14:13:20:setup_element:INFO: Eye window for uplink 17: XXX_______________________________X_XXXX Data delay found: 18 14:13:20:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX Data delay found: 21 14:13:20:setup_element:INFO: Eye window for uplink 19: XXX________________________________XXXXX Data delay found: 18 14:13:20:setup_element:INFO: Eye window for uplink 20: X________________________________XXXXXXX Data delay found: 16 14:13:20:setup_element:INFO: Eye window for uplink 21: ________________________________XXXXXXX_ Data delay found: 15 14:13:20:setup_element:INFO: Eye window for uplink 22: XXXXX_________________________________XX Data delay found: 21 14:13:20:setup_element:INFO: Eye window for uplink 23: XXXXXXX____________________________XXXXX Data delay found: 20 14:13:20:setup_element:INFO: Eye window for uplink 24: _______XXXXXXX___________XXXXXXXXXXXXXXX Data delay found: 19 14:13:20:setup_element:INFO: Eye window for uplink 25: _________XXXXXXXXX_______XXXXXXXXXXXXXXX Data delay found: 4 14:13:20:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 14:13:20:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXX_____________________ Data delay found: 34 14:13:20:setup_element:INFO: Eye window for uplink 28: _______________XXXXXXX__________________ Data delay found: 38 14:13:20:setup_element:INFO: Eye window for uplink 29: _________________XXXXXXXX_______________ Data delay found: 0 14:13:20:setup_element:INFO: Eye window for uplink 30: ________________XXXXXXXX________________ Data delay found: 39 14:13:20:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXX_______________ Data delay found: 0 14:13:20:setup_element:INFO: Setting the data phase to 20 for uplink 16 14:13:20:setup_element:INFO: Setting the data phase to 18 for uplink 17 14:13:20:setup_element:INFO: Setting the data phase to 21 for uplink 18 14:13:20:setup_element:INFO: Setting the data phase to 18 for uplink 19 14:13:20:setup_element:INFO: Setting the data phase to 16 for uplink 20 14:13:20:setup_element:INFO: Setting the data phase to 15 for uplink 21 14:13:20:setup_element:INFO: Setting the data phase to 21 for uplink 22 14:13:20:setup_element:INFO: Setting the data phase to 20 for uplink 23 14:13:20:setup_element:INFO: Setting the data phase to 19 for uplink 24 14:13:20:setup_element:INFO: Setting the data phase to 4 for uplink 25 14:13:20:setup_element:INFO: Setting the data phase to 29 for uplink 26 14:13:20:setup_element:INFO: Setting the data phase to 34 for uplink 27 14:13:20:setup_element:INFO: Setting the data phase to 38 for uplink 28 14:13:20:setup_element:INFO: Setting the data phase to 0 for uplink 29 14:13:20:setup_element:INFO: Setting the data phase to 39 for uplink 30 14:13:20:setup_element:INFO: Setting the data phase to 0 for uplink 31 14:13:20:setup_element:INFO: Beginning SMX ASICs map scan 14:13:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:13:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:13:20:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] 14:13:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23 14:13:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22 14:13:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:13:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:13:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21 14:13:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20 14:13:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:13:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:13:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19 14:13:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18 14:13:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:13:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:13:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17 14:13:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16 14:13:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:13:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:13:22:setup_element:INFO: Performing Elink synchronization 14:13:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:13:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:13:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:13:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:13:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:13:22:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)] 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:13:23:febtest:INFO: Init all SMX (CSA): 30 14:13:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:13:37:febtest:INFO: 23-00 | XA-000-09-004-004-005-014-04 | 34.6 | 1165.6 14:13:37:febtest:INFO: 30-01 | XA-000-09-004-004-005-010-04 | 21.9 | 1212.7 14:13:37:febtest:INFO: 21-02 | XA-000-09-004-004-005-015-04 | 31.4 | 1183.3 14:13:38:febtest:INFO: 28-03 | XA-000-09-004-004-005-011-04 | 44.1 | 1135.9 14:13:38:febtest:INFO: 19-04 | XA-000-09-004-004-005-016-03 | 40.9 | 1153.7 14:13:38:febtest:INFO: 26-05 | XA-000-09-004-004-005-012-04 | 37.7 | 1165.6 14:13:38:febtest:INFO: 17-06 | XA-000-09-004-004-005-017-03 | 40.9 | 1153.7 14:13:39:febtest:INFO: 24-07 | XA-000-09-004-004-005-013-04 | 34.6 | 1171.5 14:13:40:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:13:41:ST3_smx:INFO: chip: 23-0 34.556970 C 1177.390875 mV 14:13:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:41:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:41:ST3_smx:INFO: Electrons 14:13:41:ST3_smx:INFO: # loops 0 14:13:43:ST3_smx:INFO: # loops 1 14:13:45:ST3_smx:INFO: # loops 2 14:13:46:ST3_smx:INFO: Total # of broken channels: 0 14:13:46:ST3_smx:INFO: List of broken channels: [] 14:13:46:ST3_smx:INFO: Total # of broken channels: 0 14:13:46:ST3_smx:INFO: List of broken channels: [] 14:13:48:ST3_smx:INFO: chip: 30-1 21.902970 C 1230.330540 mV 14:13:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:48:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:48:ST3_smx:INFO: Electrons 14:13:48:ST3_smx:INFO: # loops 0 14:13:49:ST3_smx:INFO: # loops 1 14:13:51:ST3_smx:INFO: # loops 2 14:13:53:ST3_smx:INFO: Total # of broken channels: 0 14:13:53:ST3_smx:INFO: List of broken channels: [] 14:13:53:ST3_smx:INFO: Total # of broken channels: 0 14:13:53:ST3_smx:INFO: List of broken channels: [] 14:13:54:ST3_smx:INFO: chip: 21-2 31.389742 C 1195.082160 mV 14:13:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:54:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:13:54:ST3_smx:INFO: Electrons 14:13:54:ST3_smx:INFO: # loops 0 14:13:56:ST3_smx:INFO: # loops 1 14:13:57:ST3_smx:INFO: # loops 2 14:13:59:ST3_smx:INFO: Total # of broken channels: 0 14:13:59:ST3_smx:INFO: List of broken channels: [] 14:13:59:ST3_smx:INFO: Total # of broken channels: 0 14:13:59:ST3_smx:INFO: List of broken channels: [] 14:14:01:ST3_smx:INFO: chip: 28-3 44.073563 C 1147.806000 mV 14:14:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:01:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:01:ST3_smx:INFO: Electrons 14:14:01:ST3_smx:INFO: # loops 0 14:14:02:ST3_smx:INFO: # loops 1 14:14:04:ST3_smx:INFO: # loops 2 14:14:05:ST3_smx:INFO: Total # of broken channels: 0 14:14:05:ST3_smx:INFO: List of broken channels: [] 14:14:05:ST3_smx:INFO: Total # of broken channels: 0 14:14:05:ST3_smx:INFO: List of broken channels: [] 14:14:07:ST3_smx:INFO: chip: 19-4 44.073563 C 1159.654860 mV 14:14:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:07:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:07:ST3_smx:INFO: Electrons 14:14:07:ST3_smx:INFO: # loops 0 14:14:09:ST3_smx:INFO: # loops 1 14:14:10:ST3_smx:INFO: # loops 2 14:14:12:ST3_smx:INFO: Total # of broken channels: 0 14:14:12:ST3_smx:INFO: List of broken channels: [] 14:14:12:ST3_smx:INFO: Total # of broken channels: 0 14:14:12:ST3_smx:INFO: List of broken channels: [] 14:14:13:ST3_smx:INFO: chip: 26-5 37.726682 C 1177.390875 mV 14:14:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:13:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:13:ST3_smx:INFO: Electrons 14:14:13:ST3_smx:INFO: # loops 0 14:14:15:ST3_smx:INFO: # loops 1 14:14:16:ST3_smx:INFO: # loops 2 14:14:18:ST3_smx:INFO: Total # of broken channels: 0 14:14:18:ST3_smx:INFO: List of broken channels: [] 14:14:18:ST3_smx:INFO: Total # of broken channels: 0 14:14:18:ST3_smx:INFO: List of broken channels: [] 14:14:20:ST3_smx:INFO: chip: 17-6 44.073563 C 1165.571835 mV 14:14:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:20:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:20:ST3_smx:INFO: Electrons 14:14:20:ST3_smx:INFO: # loops 0 14:14:21:ST3_smx:INFO: # loops 1 14:14:23:ST3_smx:INFO: # loops 2 14:14:25:ST3_smx:INFO: Total # of broken channels: 0 14:14:25:ST3_smx:INFO: List of broken channels: [] 14:14:25:ST3_smx:INFO: Total # of broken channels: 0 14:14:25:ST3_smx:INFO: List of broken channels: [] 14:14:26:ST3_smx:INFO: chip: 24-7 37.726682 C 1183.292940 mV 14:14:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:26:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:14:26:ST3_smx:INFO: Electrons 14:14:26:ST3_smx:INFO: # loops 0 14:14:28:ST3_smx:INFO: # loops 1 14:14:29:ST3_smx:INFO: # loops 2 14:14:31:ST3_smx:INFO: Total # of broken channels: 0 14:14:31:ST3_smx:INFO: List of broken channels: [] 14:14:31:ST3_smx:INFO: Total # of broken channels: 0 14:14:31:ST3_smx:INFO: List of broken channels: [] 14:14:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:14:31:febtest:INFO: 23-00 | XA-000-09-004-004-005-014-04 | 34.6 | 1195.1 14:14:31:febtest:INFO: 30-01 | XA-000-09-004-004-005-010-04 | 21.9 | 1247.9 14:14:32:febtest:INFO: 21-02 | XA-000-09-004-004-005-015-04 | 34.6 | 1212.7 14:14:32:febtest:INFO: 28-03 | XA-000-09-004-004-005-011-04 | 47.3 | 1171.5 14:14:32:febtest:INFO: 19-04 | XA-000-09-004-004-005-016-03 | 44.1 | 1183.3 14:14:32:febtest:INFO: 26-05 | XA-000-09-004-004-005-012-04 | 40.9 | 1201.0 14:14:32:febtest:INFO: 17-06 | XA-000-09-004-004-005-017-03 | 44.1 | 1183.3 14:14:33:febtest:INFO: 24-07 | XA-000-09-004-004-005-013-04 | 40.9 | 1201.0 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_11_06-14_13_12 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4087| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4710', '1.850', '2.0230'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9910', '1.850', '2.5880'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9670', '1.850', '0.5259']