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FEB_4088 06.11.24 10:38:18
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10:38:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:38:18:ST3_Shared:INFO: FEB-Microcable
10:38:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:38:18:febtest:INFO: Testing FEB with SN 4088
10:38:20:smx_tester:INFO: Scanning setup
10:38:20:elinks:INFO: Disabling clock on downlink 0
10:38:20:elinks:INFO: Disabling clock on downlink 1
10:38:20:elinks:INFO: Disabling clock on downlink 2
10:38:20:elinks:INFO: Disabling clock on downlink 3
10:38:20:elinks:INFO: Disabling clock on downlink 4
10:38:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:38:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:20:elinks:INFO: Disabling clock on downlink 0
10:38:20:elinks:INFO: Disabling clock on downlink 1
10:38:20:elinks:INFO: Disabling clock on downlink 2
10:38:20:elinks:INFO: Disabling clock on downlink 3
10:38:20:elinks:INFO: Disabling clock on downlink 4
10:38:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:38:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:20:elinks:INFO: Disabling clock on downlink 0
10:38:20:elinks:INFO: Disabling clock on downlink 1
10:38:20:elinks:INFO: Disabling clock on downlink 2
10:38:20:elinks:INFO: Disabling clock on downlink 3
10:38:20:elinks:INFO: Disabling clock on downlink 4
10:38:20:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:38:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:38:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:20:elinks:INFO: Disabling clock on downlink 0
10:38:20:elinks:INFO: Disabling clock on downlink 1
10:38:20:elinks:INFO: Disabling clock on downlink 2
10:38:20:elinks:INFO: Disabling clock on downlink 3
10:38:21:elinks:INFO: Disabling clock on downlink 4
10:38:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:38:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:21:elinks:INFO: Disabling clock on downlink 0
10:38:21:elinks:INFO: Disabling clock on downlink 1
10:38:21:elinks:INFO: Disabling clock on downlink 2
10:38:21:elinks:INFO: Disabling clock on downlink 3
10:38:21:elinks:INFO: Disabling clock on downlink 4
10:38:21:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:38:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:38:21:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:38:21:setup_element:INFO: Scanning clock phase
10:38:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:38:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:38:21:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:38:21:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:38:21:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:38:21:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________
Clock Delay: 27
10:38:21:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________XXXXXX____________
Clock Delay: 24
10:38:21:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________XXXXXX____________
Clock Delay: 24
10:38:21:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
10:38:21:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________XXXXXXX____________
Clock Delay: 24
10:38:21:setup_element:INFO: Setting the clock phase to 25 for group 0, downlink 2
10:38:21:setup_element:INFO: Scanning data phases
10:38:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:38:26:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:38:26:setup_element:INFO: Eye window for uplink 24: _________XXXXXXX________________________
Data delay found: 32
10:38:26:setup_element:INFO: Eye window for uplink 25: _____________XXXXXXX____________________
Data delay found: 36
10:38:26:setup_element:INFO: Eye window for uplink 26: ________XXXXXXXX________________________
Data delay found: 31
10:38:26:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXXXX___________________
Data delay found: 36
10:38:26:setup_element:INFO: Eye window for uplink 28: _____________XXXXXXX____________________
Data delay found: 36
10:38:26:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXXX_________________
Data delay found: 38
10:38:26:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXX___________________
Data delay found: 37
10:38:26:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXX__________________
Data delay found: 37
10:38:26:setup_element:INFO: Setting the data phase to 32 for uplink 24
10:38:26:setup_element:INFO: Setting the data phase to 36 for uplink 25
10:38:26:setup_element:INFO: Setting the data phase to 31 for uplink 26
10:38:26:setup_element:INFO: Setting the data phase to 36 for uplink 27
10:38:26:setup_element:INFO: Setting the data phase to 36 for uplink 28
10:38:26:setup_element:INFO: Setting the data phase to 38 for uplink 29
10:38:26:setup_element:INFO: Setting the data phase to 37 for uplink 30
10:38:26:setup_element:INFO: Setting the data phase to 37 for uplink 31
10:38:26:setup_element:INFO: Beginning SMX ASICs map scan
10:38:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:38:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:38:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:38:26:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:38:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:38:27:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:38:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:38:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:38:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:38:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:38:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:38:28:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:38:29:setup_element:INFO: Performing Elink synchronization
10:38:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:38:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:38:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:38:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:38:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:38:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:38:29:febtest:INFO: Init all SMX (CSA): 30
10:38:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:38:38:febtest:INFO: 30-01 | XA-000-09-004-004-007-009-07 | 44.1 | 1147.8
10:38:39:febtest:INFO: 28-03 | XA-000-09-004-004-007-006-07 | 47.3 | 1135.9
10:38:39:febtest:INFO: 26-05 | XA-000-09-004-004-007-003-07 | 37.7 | 1165.6
10:38:39:febtest:INFO: 24-07 | XA-000-09-004-004-008-004-03 | 44.1 | 1147.8
10:38:40:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:38:42:ST3_smx:INFO: chip: 30-1 44.073563 C 1159.654860 mV
10:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:42:ST3_smx:INFO: Electrons
10:38:42:ST3_smx:INFO: # loops 0
10:38:44:ST3_smx:INFO: # loops 1
10:38:46:ST3_smx:INFO: # loops 2
10:38:48:ST3_smx:INFO: Total # of broken channels: 0
10:38:48:ST3_smx:INFO: List of broken channels: []
10:38:48:ST3_smx:INFO: Total # of broken channels: 0
10:38:48:ST3_smx:INFO: List of broken channels: []
10:38:50:ST3_smx:INFO: chip: 28-3 47.250730 C 1147.806000 mV
10:38:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:50:ST3_smx:INFO: Electrons
10:38:50:ST3_smx:INFO: # loops 0
10:38:52:ST3_smx:INFO: # loops 1
10:38:54:ST3_smx:INFO: # loops 2
10:38:55:ST3_smx:INFO: Total # of broken channels: 0
10:38:55:ST3_smx:INFO: List of broken channels: []
10:38:55:ST3_smx:INFO: Total # of broken channels: 0
10:38:55:ST3_smx:INFO: List of broken channels: []
10:38:57:ST3_smx:INFO: chip: 26-5 37.726682 C 1171.483840 mV
10:38:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:38:57:ST3_smx:INFO: Electrons
10:38:57:ST3_smx:INFO: # loops 0
10:38:59:ST3_smx:INFO: # loops 1
10:39:01:ST3_smx:INFO: # loops 2
10:39:03:ST3_smx:INFO: Total # of broken channels: 0
10:39:03:ST3_smx:INFO: List of broken channels: []
10:39:03:ST3_smx:INFO: Total # of broken channels: 0
10:39:03:ST3_smx:INFO: List of broken channels: []
10:39:05:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV
10:39:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:39:05:ST3_smx:INFO: Electrons
10:39:05:ST3_smx:INFO: # loops 0
10:39:07:ST3_smx:INFO: # loops 1
10:39:09:ST3_smx:INFO: # loops 2
10:39:10:ST3_smx:INFO: Total # of broken channels: 0
10:39:10:ST3_smx:INFO: List of broken channels: []
10:39:10:ST3_smx:INFO: Total # of broken channels: 0
10:39:10:ST3_smx:INFO: List of broken channels: []
10:39:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:39:11:febtest:INFO: 30-01 | XA-000-09-004-004-007-009-07 | 47.3 | 1177.4
10:39:11:febtest:INFO: 28-03 | XA-000-09-004-004-007-006-07 | 47.3 | 1171.5
10:39:11:febtest:INFO: 26-05 | XA-000-09-004-004-007-003-07 | 40.9 | 1195.1
10:39:12:febtest:INFO: 24-07 | XA-000-09-004-004-008-004-03 | 44.1 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_06-10_38_18
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4088| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7596', '1.850', '1.0770']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0210', '1.850', '1.2760']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '0.2668']