Go Back
FEB_4090 08.11.24 09:03:04
TextEdit.txt
09:03:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:04:ST3_Shared:INFO: FEB-Microcable
09:03:04:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:03:05:febtest:INFO: Testing FEB with SN 4090
09:03:06:smx_tester:INFO: Scanning setup
09:03:06:elinks:INFO: Disabling clock on downlink 0
09:03:06:elinks:INFO: Disabling clock on downlink 1
09:03:06:elinks:INFO: Disabling clock on downlink 2
09:03:06:elinks:INFO: Disabling clock on downlink 3
09:03:06:elinks:INFO: Disabling clock on downlink 4
09:03:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:03:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:06:elinks:INFO: Disabling clock on downlink 0
09:03:06:elinks:INFO: Disabling clock on downlink 1
09:03:06:elinks:INFO: Disabling clock on downlink 2
09:03:06:elinks:INFO: Disabling clock on downlink 3
09:03:06:elinks:INFO: Disabling clock on downlink 4
09:03:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:03:06:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:06:elinks:INFO: Disabling clock on downlink 0
09:03:06:elinks:INFO: Disabling clock on downlink 1
09:03:06:elinks:INFO: Disabling clock on downlink 2
09:03:06:elinks:INFO: Disabling clock on downlink 3
09:03:06:elinks:INFO: Disabling clock on downlink 4
09:03:06:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:03:06:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:03:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:03:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:03:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:03:07:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:03:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:07:elinks:INFO: Disabling clock on downlink 0
09:03:07:elinks:INFO: Disabling clock on downlink 1
09:03:07:elinks:INFO: Disabling clock on downlink 2
09:03:07:elinks:INFO: Disabling clock on downlink 3
09:03:07:elinks:INFO: Disabling clock on downlink 4
09:03:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:03:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:07:elinks:INFO: Disabling clock on downlink 0
09:03:07:elinks:INFO: Disabling clock on downlink 1
09:03:07:elinks:INFO: Disabling clock on downlink 2
09:03:07:elinks:INFO: Disabling clock on downlink 3
09:03:07:elinks:INFO: Disabling clock on downlink 4
09:03:07:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:03:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:03:07:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:03:07:setup_element:INFO: Scanning clock phase
09:03:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:07:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:03:07:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:03:07:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________XXXXXXX__________
Clock Delay: 26
09:03:07:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:03:07:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:03:07:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:03:07:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:03:07:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:03:07:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:03:07:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
09:03:07:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2
09:03:07:setup_element:INFO: Scanning data phases
09:03:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:12:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:03:12:setup_element:INFO: Eye window for uplink 16: XXXX________________________________XXXX
Data delay found: 19
09:03:12:setup_element:INFO: Eye window for uplink 17: X_________________________________XXXXXX
Data delay found: 17
09:03:12:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
09:03:12:setup_element:INFO: Eye window for uplink 19: XXX________________________________XXXXX
Data delay found: 18
09:03:12:setup_element:INFO: Eye window for uplink 20: XX________________________________XXXXXX
Data delay found: 17
09:03:12:setup_element:INFO: Eye window for uplink 21: __________________________________XXXXXX
Data delay found: 16
09:03:12:setup_element:INFO: Eye window for uplink 22: XXXXX________________________________XXX
Data delay found: 20
09:03:12:setup_element:INFO: Eye window for uplink 23: XXXXXXX___________________________XXXXXX
Data delay found: 20
09:03:12:setup_element:INFO: Eye window for uplink 24: ________XXXXXXXX________________________
Data delay found: 31
09:03:12:setup_element:INFO: Eye window for uplink 25: ___________XXXXXXXXX____________________
Data delay found: 35
09:03:12:setup_element:INFO: Eye window for uplink 26: ________XXXXXXXX________________________
Data delay found: 31
09:03:12:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXXXX___________________
Data delay found: 36
09:03:12:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXX_________________
Data delay found: 38
09:03:12:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXXXX_______________
Data delay found: 0
09:03:12:setup_element:INFO: Eye window for uplink 30: _______________XXXXXXXXX________________
Data delay found: 39
09:03:12:setup_element:INFO: Eye window for uplink 31: ________________XXXXXXXX________________
Data delay found: 39
09:03:12:setup_element:INFO: Setting the data phase to 19 for uplink 16
09:03:12:setup_element:INFO: Setting the data phase to 17 for uplink 17
09:03:12:setup_element:INFO: Setting the data phase to 21 for uplink 18
09:03:12:setup_element:INFO: Setting the data phase to 18 for uplink 19
09:03:12:setup_element:INFO: Setting the data phase to 17 for uplink 20
09:03:12:setup_element:INFO: Setting the data phase to 16 for uplink 21
09:03:12:setup_element:INFO: Setting the data phase to 20 for uplink 22
09:03:12:setup_element:INFO: Setting the data phase to 20 for uplink 23
09:03:12:setup_element:INFO: Setting the data phase to 31 for uplink 24
09:03:12:setup_element:INFO: Setting the data phase to 35 for uplink 25
09:03:12:setup_element:INFO: Setting the data phase to 31 for uplink 26
09:03:12:setup_element:INFO: Setting the data phase to 36 for uplink 27
09:03:12:setup_element:INFO: Setting the data phase to 38 for uplink 28
09:03:13:setup_element:INFO: Setting the data phase to 0 for uplink 29
09:03:13:setup_element:INFO: Setting the data phase to 39 for uplink 30
09:03:13:setup_element:INFO: Setting the data phase to 39 for uplink 31
09:03:13:setup_element:INFO: Beginning SMX ASICs map scan
09:03:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:13:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:13:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:03:13:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:13:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:03:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:03:13:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:03:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:03:13:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:03:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:03:13:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:03:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:03:13:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:03:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:03:13:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:03:13:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:03:14:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:03:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:03:14:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:03:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:03:14:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:03:15:setup_element:INFO: Performing Elink synchronization
09:03:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:03:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:03:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:03:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:03:15:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:03:15:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:03:16:febtest:INFO: Init all SMX (CSA): 30
09:03:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:03:33:febtest:INFO: 23-00 | XA-000-09-004-004-009-014-14 | 50.4 | 1118.1
09:03:33:febtest:INFO: 30-01 | XA-000-09-004-004-010-014-00 | 44.1 | 1141.9
09:03:34:febtest:INFO: 21-02 | XA-000-09-004-004-009-018-09 | 40.9 | 1165.6
09:03:34:febtest:INFO: 28-03 | XA-000-09-004-004-010-019-07 | 44.1 | 1141.9
09:03:34:febtest:INFO: 19-04 | XA-000-09-004-004-009-010-14 | 44.1 | 1153.7
09:03:34:febtest:INFO: 26-05 | XA-000-09-004-004-010-022-07 | 31.4 | 1201.0
09:03:35:febtest:INFO: 17-06 | XA-000-09-004-004-009-006-14 | 34.6 | 1183.3
09:03:35:febtest:INFO: 24-07 | XA-000-09-004-004-011-002-13 | 37.7 | 1165.6
09:03:36:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:03:38:ST3_smx:INFO: chip: 23-0 50.430383 C 1129.995435 mV
09:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:38:ST3_smx:INFO: Electrons
09:03:38:ST3_smx:INFO: # loops 0
09:03:40:ST3_smx:INFO: # loops 1
09:03:42:ST3_smx:INFO: # loops 2
09:03:44:ST3_smx:INFO: Total # of broken channels: 0
09:03:44:ST3_smx:INFO: List of broken channels: []
09:03:44:ST3_smx:INFO: Total # of broken channels: 0
09:03:44:ST3_smx:INFO: List of broken channels: []
09:03:45:ST3_smx:INFO: chip: 30-1 44.073563 C 1153.732915 mV
09:03:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:45:ST3_smx:INFO: Electrons
09:03:45:ST3_smx:INFO: # loops 0
09:03:47:ST3_smx:INFO: # loops 1
09:03:49:ST3_smx:INFO: # loops 2
09:03:52:ST3_smx:INFO: Total # of broken channels: 0
09:03:52:ST3_smx:INFO: List of broken channels: []
09:03:52:ST3_smx:INFO: Total # of broken channels: 0
09:03:52:ST3_smx:INFO: List of broken channels: []
09:03:53:ST3_smx:INFO: chip: 21-2 37.726682 C 1177.390875 mV
09:03:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:03:53:ST3_smx:INFO: Electrons
09:03:53:ST3_smx:INFO: # loops 0
09:03:56:ST3_smx:INFO: # loops 1
09:03:58:ST3_smx:INFO: # loops 2
09:04:00:ST3_smx:INFO: Total # of broken channels: 0
09:04:00:ST3_smx:INFO: List of broken channels: []
09:04:00:ST3_smx:INFO: Total # of broken channels: 0
09:04:00:ST3_smx:INFO: List of broken channels: []
09:04:02:ST3_smx:INFO: chip: 28-3 47.250730 C 1153.732915 mV
09:04:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:02:ST3_smx:INFO: Electrons
09:04:02:ST3_smx:INFO: # loops 0
09:04:03:ST3_smx:INFO: # loops 1
09:04:05:ST3_smx:INFO: # loops 2
09:04:07:ST3_smx:INFO: Total # of broken channels: 0
09:04:07:ST3_smx:INFO: List of broken channels: []
09:04:07:ST3_smx:INFO: Total # of broken channels: 0
09:04:07:ST3_smx:INFO: List of broken channels: []
09:04:09:ST3_smx:INFO: chip: 19-4 44.073563 C 1165.571835 mV
09:04:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:09:ST3_smx:INFO: Electrons
09:04:09:ST3_smx:INFO: # loops 0
09:04:11:ST3_smx:INFO: # loops 1
09:04:14:ST3_smx:INFO: # loops 2
09:04:16:ST3_smx:INFO: Total # of broken channels: 0
09:04:16:ST3_smx:INFO: List of broken channels: []
09:04:16:ST3_smx:INFO: Total # of broken channels: 0
09:04:16:ST3_smx:INFO: List of broken channels: []
09:04:17:ST3_smx:INFO: chip: 26-5 31.389742 C 1212.728715 mV
09:04:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:17:ST3_smx:INFO: Electrons
09:04:17:ST3_smx:INFO: # loops 0
09:04:19:ST3_smx:INFO: # loops 1
09:04:21:ST3_smx:INFO: # loops 2
09:04:23:ST3_smx:INFO: Total # of broken channels: 0
09:04:23:ST3_smx:INFO: List of broken channels: []
09:04:23:ST3_smx:INFO: Total # of broken channels: 0
09:04:23:ST3_smx:INFO: List of broken channels: []
09:04:25:ST3_smx:INFO: chip: 17-6 34.556970 C 1195.082160 mV
09:04:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:25:ST3_smx:INFO: Electrons
09:04:25:ST3_smx:INFO: # loops 0
09:04:27:ST3_smx:INFO: # loops 1
09:04:29:ST3_smx:INFO: # loops 2
09:04:31:ST3_smx:INFO: Total # of broken channels: 0
09:04:31:ST3_smx:INFO: List of broken channels: []
09:04:31:ST3_smx:INFO: Total # of broken channels: 0
09:04:31:ST3_smx:INFO: List of broken channels: []
09:04:32:ST3_smx:INFO: chip: 24-7 40.898880 C 1177.390875 mV
09:04:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:04:32:ST3_smx:INFO: Electrons
09:04:32:ST3_smx:INFO: # loops 0
09:04:34:ST3_smx:INFO: # loops 1
09:04:36:ST3_smx:INFO: # loops 2
09:04:38:ST3_smx:INFO: Total # of broken channels: 0
09:04:38:ST3_smx:INFO: List of broken channels: []
09:04:38:ST3_smx:INFO: Total # of broken channels: 0
09:04:38:ST3_smx:INFO: List of broken channels: []
09:04:39:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:04:39:febtest:INFO: 23-00 | XA-000-09-004-004-009-014-14 | 53.6 | 1147.8
09:04:39:febtest:INFO: 30-01 | XA-000-09-004-004-010-014-00 | 47.3 | 1171.5
09:04:39:febtest:INFO: 21-02 | XA-000-09-004-004-009-018-09 | 40.9 | 1195.1
09:04:39:febtest:INFO: 28-03 | XA-000-09-004-004-010-019-07 | 47.3 | 1177.4
09:04:40:febtest:INFO: 19-04 | XA-000-09-004-004-009-010-14 | 44.1 | 1183.3
09:04:40:febtest:INFO: 26-05 | XA-000-09-004-004-010-022-07 | 31.4 | 1230.3
09:04:40:febtest:INFO: 17-06 | XA-000-09-004-004-009-006-14 | 37.7 | 1212.7
09:04:40:febtest:INFO: 24-07 | XA-000-09-004-004-011-002-13 | 44.1 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_11_08-09_03_04
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4090| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6830', '1.850', '2.2630']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.850', '2.5880']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5252']