
FEB_4091 07.11.24 13:40:18
TextEdit.txt
13:40:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:40:18:ST3_Shared:INFO: FEB-Microcable 13:40:18:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 13:40:18:febtest:INFO: Testing FEB with SN 4091 13:40:20:smx_tester:INFO: Scanning setup 13:40:20:elinks:INFO: Disabling clock on downlink 0 13:40:20:elinks:INFO: Disabling clock on downlink 1 13:40:20:elinks:INFO: Disabling clock on downlink 2 13:40:20:elinks:INFO: Disabling clock on downlink 3 13:40:20:elinks:INFO: Disabling clock on downlink 4 13:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 13:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:20:elinks:INFO: Disabling clock on downlink 0 13:40:20:elinks:INFO: Disabling clock on downlink 1 13:40:20:elinks:INFO: Disabling clock on downlink 2 13:40:20:elinks:INFO: Disabling clock on downlink 3 13:40:20:elinks:INFO: Disabling clock on downlink 4 13:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 13:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:20:elinks:INFO: Disabling clock on downlink 0 13:40:20:elinks:INFO: Disabling clock on downlink 1 13:40:20:elinks:INFO: Disabling clock on downlink 2 13:40:20:elinks:INFO: Disabling clock on downlink 3 13:40:20:elinks:INFO: Disabling clock on downlink 4 13:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 13:40:20:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 13:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:20:elinks:INFO: Disabling clock on downlink 0 13:40:20:elinks:INFO: Disabling clock on downlink 1 13:40:20:elinks:INFO: Disabling clock on downlink 2 13:40:20:elinks:INFO: Disabling clock on downlink 3 13:40:20:elinks:INFO: Disabling clock on downlink 4 13:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 13:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:20:elinks:INFO: Disabling clock on downlink 0 13:40:20:elinks:INFO: Disabling clock on downlink 1 13:40:20:elinks:INFO: Disabling clock on downlink 2 13:40:20:elinks:INFO: Disabling clock on downlink 3 13:40:20:elinks:INFO: Disabling clock on downlink 4 13:40:20:setup_element:INFO: Checking SOS, encoding_mode: SOS 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 13:40:20:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 13:40:20:setup_element:INFO: Scanning clock phase 13:40:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:21:setup_element:INFO: Clock phase scan results for group 0, downlink 2 13:40:21:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXX________ Clock Delay: 29 13:40:21:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXX________ Clock Delay: 29 13:40:21:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________ Clock Delay: 40 13:40:21:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________ Clock Delay: 40 13:40:21:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________XXXXXX__________ Clock Delay: 26 13:40:21:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________XXXXXX__________ Clock Delay: 26 13:40:21:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________ Clock Delay: 40 13:40:21:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________ Clock Delay: 40 13:40:21:setup_element:INFO: Setting the clock phase to 27 for group 0, downlink 2 13:40:21:setup_element:INFO: Scanning data phases 13:40:21:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:21:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:26:setup_element:INFO: Data phase scan results for group 0, downlink 2 13:40:26:setup_element:INFO: Eye window for uplink 24: _____X__XXXXXXXX________________________ Data delay found: 30 13:40:26:setup_element:INFO: Eye window for uplink 25: ____________XXXXXXX_____________________ Data delay found: 35 13:40:26:setup_element:INFO: Eye window for uplink 26: _____X__XXXXXX__________________________ Data delay found: 29 13:40:26:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXXX____________________ Data delay found: 35 13:40:26:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 5 13:40:26:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 6 13:40:26:setup_element:INFO: Eye window for uplink 30: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 3 13:40:26:setup_element:INFO: Eye window for uplink 31: ________XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX Data delay found: 3 13:40:26:setup_element:INFO: Setting the data phase to 30 for uplink 24 13:40:26:setup_element:INFO: Setting the data phase to 35 for uplink 25 13:40:26:setup_element:INFO: Setting the data phase to 29 for uplink 26 13:40:26:setup_element:INFO: Setting the data phase to 35 for uplink 27 13:40:26:setup_element:INFO: Setting the data phase to 5 for uplink 28 13:40:26:setup_element:INFO: Setting the data phase to 6 for uplink 29 13:40:26:setup_element:INFO: Setting the data phase to 3 for uplink 30 13:40:26:setup_element:INFO: Setting the data phase to 3 for uplink 31 13:40:26:setup_element:INFO: Beginning SMX ASICs map scan 13:40:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:40:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:40:26:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 13:40:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 13:40:26:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 13:40:26:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 13:40:27:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 13:40:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 13:40:27:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 13:40:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 13:40:27:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 13:40:28:setup_element:INFO: Performing Elink synchronization 13:40:28:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 13:40:28:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 13:40:29:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 13:40:29:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 13:40:29:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 13:40:29:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 13:40:29:febtest:INFO: Init all SMX (CSA): 30 13:40:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:40:36:febtest:INFO: 30-01 | XA-000-09-004-004-005-025-03 | 47.3 | 1130.0 13:40:37:febtest:INFO: 28-03 | XA-000-09-004-006-008-027-13 | 40.9 | 1135.9 13:40:37:febtest:INFO: 26-05 | XA-000-09-004-006-009-027-00 | 31.4 | 1171.5 13:40:37:febtest:INFO: 24-07 | XA-000-09-004-006-009-026-00 | 31.4 | 1212.7 13:40:38:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 13:40:40:ST3_smx:INFO: chip: 30-1 47.250730 C 1141.874115 mV 13:40:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:40:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:40:ST3_smx:INFO: Electrons 13:40:40:ST3_smx:INFO: # loops 0 13:40:42:ST3_smx:INFO: # loops 1 13:40:43:ST3_smx:INFO: # loops 2 13:40:45:ST3_smx:INFO: Total # of broken channels: 0 13:40:45:ST3_smx:INFO: List of broken channels: [] 13:40:45:ST3_smx:INFO: Total # of broken channels: 0 13:40:45:ST3_smx:INFO: List of broken channels: [] 13:40:46:ST3_smx:INFO: chip: 28-3 44.073563 C 1147.806000 mV 13:40:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:46:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:46:ST3_smx:INFO: Electrons 13:40:46:ST3_smx:INFO: # loops 0 13:40:48:ST3_smx:INFO: # loops 1 13:40:49:ST3_smx:INFO: # loops 2 13:40:51:ST3_smx:INFO: Total # of broken channels: 0 13:40:51:ST3_smx:INFO: List of broken channels: [] 13:40:51:ST3_smx:INFO: Total # of broken channels: 0 13:40:51:ST3_smx:INFO: List of broken channels: [] 13:40:53:ST3_smx:INFO: chip: 26-5 31.389742 C 1183.292940 mV 13:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:53:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:53:ST3_smx:INFO: Electrons 13:40:53:ST3_smx:INFO: # loops 0 13:40:54:ST3_smx:INFO: # loops 1 13:40:56:ST3_smx:INFO: # loops 2 13:40:57:ST3_smx:INFO: Total # of broken channels: 0 13:40:57:ST3_smx:INFO: List of broken channels: [] 13:40:57:ST3_smx:INFO: Total # of broken channels: 0 13:40:57:ST3_smx:INFO: List of broken channels: [] 13:40:59:ST3_smx:INFO: chip: 24-7 31.389742 C 1236.187875 mV 13:40:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:59:ST3_discr_histo:WARNING: Not enough entries for fit!!! 13:40:59:ST3_smx:INFO: Electrons 13:40:59:ST3_smx:INFO: # loops 0 13:41:00:ST3_smx:INFO: # loops 1 13:41:02:ST3_smx:INFO: # loops 2 13:41:04:ST3_smx:INFO: Total # of broken channels: 0 13:41:04:ST3_smx:INFO: List of broken channels: [] 13:41:04:ST3_smx:INFO: Total # of broken channels: 0 13:41:04:ST3_smx:INFO: List of broken channels: [] 13:41:04:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 13:41:04:febtest:INFO: 30-01 | XA-000-09-004-004-005-025-03 | 47.3 | 1165.6 13:41:04:febtest:INFO: 28-03 | XA-000-09-004-006-008-027-13 | 44.1 | 1171.5 13:41:04:febtest:INFO: 26-05 | XA-000-09-004-006-009-027-00 | 34.6 | 1201.0 13:41:05:febtest:INFO: 24-07 | XA-000-09-004-006-009-026-00 | 25.1 | 1578.5 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 24_11_07-13_40_18 OPERATOR : Benjamin; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4091| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.6690', '1.850', '1.2760'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0020', '1.850', '1.3020'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9784', '1.850', '0.2600']