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FEB_4098 20.01.25 14:22:11
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14:22:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:22:11:ST3_Shared:INFO: FEB-Microcable
14:22:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:22:11:febtest:INFO: Testing FEB with SN 4098
14:22:13:smx_tester:INFO: Scanning setup
14:22:13:elinks:INFO: Disabling clock on downlink 0
14:22:13:elinks:INFO: Disabling clock on downlink 1
14:22:13:elinks:INFO: Disabling clock on downlink 2
14:22:13:elinks:INFO: Disabling clock on downlink 3
14:22:13:elinks:INFO: Disabling clock on downlink 4
14:22:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:22:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:22:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:22:13:elinks:INFO: Disabling clock on downlink 0
14:22:13:elinks:INFO: Disabling clock on downlink 1
14:22:13:elinks:INFO: Disabling clock on downlink 2
14:22:13:elinks:INFO: Disabling clock on downlink 3
14:22:13:elinks:INFO: Disabling clock on downlink 4
14:22:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:22:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:22:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:22:13:elinks:INFO: Disabling clock on downlink 0
14:22:13:elinks:INFO: Disabling clock on downlink 1
14:22:13:elinks:INFO: Disabling clock on downlink 2
14:22:13:elinks:INFO: Disabling clock on downlink 3
14:22:13:elinks:INFO: Disabling clock on downlink 4
14:22:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:22:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:22:13:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:22:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:22:13:elinks:INFO: Disabling clock on downlink 0
14:22:13:elinks:INFO: Disabling clock on downlink 1
14:22:13:elinks:INFO: Disabling clock on downlink 2
14:22:13:elinks:INFO: Disabling clock on downlink 3
14:22:13:elinks:INFO: Disabling clock on downlink 4
14:22:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:22:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:22:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:22:14:elinks:INFO: Disabling clock on downlink 0
14:22:14:elinks:INFO: Disabling clock on downlink 1
14:22:14:elinks:INFO: Disabling clock on downlink 2
14:22:14:elinks:INFO: Disabling clock on downlink 3
14:22:14:elinks:INFO: Disabling clock on downlink 4
14:22:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:22:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:22:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:22:14:setup_element:INFO: Scanning clock phase
14:22:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:22:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:22:14:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:22:14:setup_element:INFO: Eye window for uplink 16: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:22:14:setup_element:INFO: Eye window for uplink 17: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:22:14:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 22: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 23: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:22:14:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:22:14:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:22:14:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:22:14:setup_element:INFO: Scanning data phases
14:22:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:22:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:22:19:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:22:19:setup_element:INFO: Eye window for uplink 16: _________________________________XXXX___
Data delay found: 14
14:22:19:setup_element:INFO: Eye window for uplink 17: _______________________________XXXX_____
Data delay found: 12
14:22:19:setup_element:INFO: Eye window for uplink 18: ____________________________________XXXX
Data delay found: 17
14:22:19:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXXX_
Data delay found: 15
14:22:19:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
14:22:19:setup_element:INFO: Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
14:22:19:setup_element:INFO: Eye window for uplink 22: ___________________________________XXXX_
Data delay found: 16
14:22:19:setup_element:INFO: Eye window for uplink 23: _______________________________XXXX_____
Data delay found: 12
14:22:19:setup_element:INFO: Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
14:22:19:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
14:22:19:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
14:22:19:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
14:22:19:setup_element:INFO: Eye window for uplink 28: ____________XXXXX_______________________
Data delay found: 34
14:22:19:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
14:22:19:setup_element:INFO: Eye window for uplink 30: _______________XXXXX____________________
Data delay found: 37
14:22:19:setup_element:INFO: Eye window for uplink 31: ________________XXX_____________________
Data delay found: 37
14:22:19:setup_element:INFO: Setting the data phase to 14 for uplink 16
14:22:19:setup_element:INFO: Setting the data phase to 12 for uplink 17
14:22:19:setup_element:INFO: Setting the data phase to 17 for uplink 18
14:22:19:setup_element:INFO: Setting the data phase to 15 for uplink 19
14:22:19:setup_element:INFO: Setting the data phase to 15 for uplink 20
14:22:19:setup_element:INFO: Setting the data phase to 15 for uplink 21
14:22:19:setup_element:INFO: Setting the data phase to 16 for uplink 22
14:22:19:setup_element:INFO: Setting the data phase to 12 for uplink 23
14:22:19:setup_element:INFO: Setting the data phase to 28 for uplink 24
14:22:19:setup_element:INFO: Setting the data phase to 30 for uplink 25
14:22:19:setup_element:INFO: Setting the data phase to 28 for uplink 26
14:22:19:setup_element:INFO: Setting the data phase to 32 for uplink 27
14:22:19:setup_element:INFO: Setting the data phase to 34 for uplink 28
14:22:19:setup_element:INFO: Setting the data phase to 36 for uplink 29
14:22:19:setup_element:INFO: Setting the data phase to 37 for uplink 30
14:22:19:setup_element:INFO: Setting the data phase to 37 for uplink 31
14:22:19:setup_element:INFO: Beginning SMX ASICs map scan
14:22:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:22:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:22:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:22:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:22:19:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
14:22:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
14:22:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
14:22:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:22:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:22:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
14:22:20:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
14:22:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:22:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:22:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
14:22:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
14:22:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:22:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:22:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
14:22:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
14:22:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:22:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:22:22:setup_element:INFO: Performing Elink synchronization
14:22:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:22:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:22:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:22:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:22:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:22:22:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:22:23:febtest:INFO: Init all SMX (CSA): 30
14:22:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:22:38:febtest:INFO: 23-00 | XA-000-09-004-006-008-013-10 | 40.9 | 1147.8
14:22:38:febtest:INFO: 30-01 | XA-000-09-004-006-009-016-00 | 50.4 | 1118.1
14:22:38:febtest:INFO: 21-02 | XA-000-09-004-006-007-013-14 | 37.7 | 1159.7
14:22:38:febtest:INFO: 28-03 | XA-000-09-004-006-008-016-13 | 37.7 | 1171.5
14:22:38:febtest:INFO: 19-04 | XA-000-09-004-004-005-018-03 | 44.1 | 1141.9
14:22:39:febtest:INFO: 26-05 | XA-000-09-004-006-007-016-09 | 34.6 | 1183.3
14:22:39:febtest:INFO: 17-06 | XA-000-09-004-006-008-012-10 | 47.3 | 1141.9
14:22:39:febtest:INFO: 24-07 | XA-000-09-004-006-009-013-07 | 34.6 | 1183.3
14:22:40:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:22:42:ST3_smx:INFO: chip: 23-0 40.898880 C 1159.654860 mV
14:22:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:42:ST3_smx:INFO: Electrons
14:22:42:ST3_smx:INFO: # loops 0
14:22:44:ST3_smx:INFO: # loops 1
14:22:45:ST3_smx:INFO: # loops 2
14:22:47:ST3_smx:INFO: Total # of broken channels: 0
14:22:47:ST3_smx:INFO: List of broken channels: []
14:22:47:ST3_smx:INFO: Total # of broken channels: 0
14:22:47:ST3_smx:INFO: List of broken channels: []
14:22:49:ST3_smx:INFO: chip: 30-1 50.430383 C 1129.995435 mV
14:22:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:49:ST3_smx:INFO: Electrons
14:22:49:ST3_smx:INFO: # loops 0
14:22:50:ST3_smx:INFO: # loops 1
14:22:52:ST3_smx:INFO: # loops 2
14:22:53:ST3_smx:INFO: Total # of broken channels: 0
14:22:53:ST3_smx:INFO: List of broken channels: []
14:22:53:ST3_smx:INFO: Total # of broken channels: 0
14:22:53:ST3_smx:INFO: List of broken channels: []
14:22:55:ST3_smx:INFO: chip: 21-2 37.726682 C 1171.483840 mV
14:22:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:22:55:ST3_smx:INFO: Electrons
14:22:55:ST3_smx:INFO: # loops 0
14:22:57:ST3_smx:INFO: # loops 1
14:22:58:ST3_smx:INFO: # loops 2
14:23:00:ST3_smx:INFO: Total # of broken channels: 0
14:23:00:ST3_smx:INFO: List of broken channels: []
14:23:00:ST3_smx:INFO: Total # of broken channels: 0
14:23:00:ST3_smx:INFO: List of broken channels: []
14:23:01:ST3_smx:INFO: chip: 28-3 37.726682 C 1183.292940 mV
14:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:01:ST3_smx:INFO: Electrons
14:23:01:ST3_smx:INFO: # loops 0
14:23:03:ST3_smx:INFO: # loops 1
14:23:05:ST3_smx:INFO: # loops 2
14:23:06:ST3_smx:INFO: Total # of broken channels: 0
14:23:06:ST3_smx:INFO: List of broken channels: []
14:23:06:ST3_smx:INFO: Total # of broken channels: 0
14:23:06:ST3_smx:INFO: List of broken channels: []
14:23:08:ST3_smx:INFO: chip: 19-4 47.250730 C 1159.654860 mV
14:23:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:08:ST3_smx:INFO: Electrons
14:23:08:ST3_smx:INFO: # loops 0
14:23:09:ST3_smx:INFO: # loops 1
14:23:11:ST3_smx:INFO: # loops 2
14:23:13:ST3_smx:INFO: Total # of broken channels: 0
14:23:13:ST3_smx:INFO: List of broken channels: []
14:23:13:ST3_smx:INFO: Total # of broken channels: 1
14:23:13:ST3_smx:INFO: List of broken channels: [83]
14:23:14:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
14:23:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:14:ST3_smx:INFO: Electrons
14:23:14:ST3_smx:INFO: # loops 0
14:23:16:ST3_smx:INFO: # loops 1
14:23:17:ST3_smx:INFO: # loops 2
14:23:19:ST3_smx:INFO: Total # of broken channels: 0
14:23:19:ST3_smx:INFO: List of broken channels: []
14:23:19:ST3_smx:INFO: Total # of broken channels: 0
14:23:19:ST3_smx:INFO: List of broken channels: []
14:23:21:ST3_smx:INFO: chip: 17-6 47.250730 C 1153.732915 mV
14:23:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:21:ST3_smx:INFO: Electrons
14:23:21:ST3_smx:INFO: # loops 0
14:23:22:ST3_smx:INFO: # loops 1
14:23:24:ST3_smx:INFO: # loops 2
14:23:25:ST3_smx:INFO: Total # of broken channels: 0
14:23:25:ST3_smx:INFO: List of broken channels: []
14:23:25:ST3_smx:INFO: Total # of broken channels: 0
14:23:25:ST3_smx:INFO: List of broken channels: []
14:23:27:ST3_smx:INFO: chip: 24-7 37.726682 C 1189.190035 mV
14:23:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:23:27:ST3_smx:INFO: Electrons
14:23:27:ST3_smx:INFO: # loops 0
14:23:29:ST3_smx:INFO: # loops 1
14:23:30:ST3_smx:INFO: # loops 2
14:23:32:ST3_smx:INFO: Total # of broken channels: 0
14:23:32:ST3_smx:INFO: List of broken channels: []
14:23:32:ST3_smx:INFO: Total # of broken channels: 0
14:23:32:ST3_smx:INFO: List of broken channels: []
14:23:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:23:33:febtest:INFO: 23-00 | XA-000-09-004-006-008-013-10 | 44.1 | 1177.4
14:23:33:febtest:INFO: 30-01 | XA-000-09-004-006-009-016-00 | 53.6 | 1153.7
14:23:33:febtest:INFO: 21-02 | XA-000-09-004-006-007-013-14 | 40.9 | 1195.1
14:23:33:febtest:INFO: 28-03 | XA-000-09-004-006-008-016-13 | 40.9 | 1206.9
14:23:33:febtest:INFO: 19-04 | XA-000-09-004-004-005-018-03 | 47.3 | 1177.4
14:23:34:febtest:INFO: 26-05 | XA-000-09-004-006-007-016-09 | 37.7 | 1212.7
14:23:34:febtest:INFO: 17-06 | XA-000-09-004-006-008-012-10 | 50.4 | 1171.5
14:23:34:febtest:INFO: 24-07 | XA-000-09-004-006-009-013-07 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_20-14_22_11
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4098| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0070', '1.849', '2.4940']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.850', '2.5250']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9760', '1.850', '0.5247']