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FEB_4099 15.01.25 11:55:59
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11:55:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:55:59:ST3_Shared:INFO: FEB-Microcable
11:55:59:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:55:59:febtest:INFO: Testing FEB with SN 4099
11:56:00:smx_tester:INFO: Scanning setup
11:56:00:elinks:INFO: Disabling clock on downlink 0
11:56:00:elinks:INFO: Disabling clock on downlink 1
11:56:00:elinks:INFO: Disabling clock on downlink 2
11:56:00:elinks:INFO: Disabling clock on downlink 3
11:56:00:elinks:INFO: Disabling clock on downlink 4
11:56:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:56:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:56:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:56:01:elinks:INFO: Disabling clock on downlink 0
11:56:01:elinks:INFO: Disabling clock on downlink 1
11:56:01:elinks:INFO: Disabling clock on downlink 2
11:56:01:elinks:INFO: Disabling clock on downlink 3
11:56:01:elinks:INFO: Disabling clock on downlink 4
11:56:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:56:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:56:01:elinks:INFO: Disabling clock on downlink 0
11:56:01:elinks:INFO: Disabling clock on downlink 1
11:56:01:elinks:INFO: Disabling clock on downlink 2
11:56:01:elinks:INFO: Disabling clock on downlink 3
11:56:01:elinks:INFO: Disabling clock on downlink 4
11:56:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:56:01:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:56:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:56:01:elinks:INFO: Disabling clock on downlink 0
11:56:01:elinks:INFO: Disabling clock on downlink 1
11:56:01:elinks:INFO: Disabling clock on downlink 2
11:56:01:elinks:INFO: Disabling clock on downlink 3
11:56:01:elinks:INFO: Disabling clock on downlink 4
11:56:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:56:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:56:01:elinks:INFO: Disabling clock on downlink 0
11:56:01:elinks:INFO: Disabling clock on downlink 1
11:56:01:elinks:INFO: Disabling clock on downlink 2
11:56:01:elinks:INFO: Disabling clock on downlink 3
11:56:01:elinks:INFO: Disabling clock on downlink 4
11:56:01:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:56:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:56:01:setup_element:INFO: Scanning clock phase
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:56:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:56:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:56:01:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:56:01:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
11:56:01:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
11:56:01:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
11:56:01:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:56:01:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:56:01:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:56:01:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:56:01:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:56:01:setup_element:INFO: Scanning data phases
11:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:56:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:56:06:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:56:07:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
11:56:07:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
11:56:07:setup_element:INFO: Eye window for uplink 26: _____XXXXXX_____________________________
Data delay found: 27
11:56:07:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
11:56:07:setup_element:INFO: Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
11:56:07:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
11:56:07:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
11:56:07:setup_element:INFO: Eye window for uplink 31: ________________XXX_____________________
Data delay found: 37
11:56:07:setup_element:INFO: Setting the data phase to 28 for uplink 24
11:56:07:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:56:07:setup_element:INFO: Setting the data phase to 27 for uplink 26
11:56:07:setup_element:INFO: Setting the data phase to 32 for uplink 27
11:56:07:setup_element:INFO: Setting the data phase to 32 for uplink 28
11:56:07:setup_element:INFO: Setting the data phase to 34 for uplink 29
11:56:07:setup_element:INFO: Setting the data phase to 36 for uplink 30
11:56:07:setup_element:INFO: Setting the data phase to 37 for uplink 31
11:56:07:setup_element:INFO: Beginning SMX ASICs map scan
11:56:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:56:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:56:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:56:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:56:07:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:56:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:56:07:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:56:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:56:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:56:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:56:08:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:56:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:56:08:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:56:09:setup_element:INFO: Performing Elink synchronization
11:56:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:56:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:56:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:56:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:56:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:56:09:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:56:10:febtest:INFO: Init all SMX (CSA): 30
11:56:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:56:17:febtest:INFO: 30-01 | XA-000-09-004-004-010-008-00 | 31.4 | 1177.4
11:56:17:febtest:INFO: 28-03 | XA-000-09-004-004-010-006-00 | 28.2 | 1189.2
11:56:17:febtest:INFO: 26-05 | XA-000-09-004-004-010-003-00 | 37.7 | 1165.6
11:56:18:febtest:INFO: 24-07 | XA-000-09-004-004-010-007-00 | 34.6 | 1165.6
11:56:19:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:56:20:ST3_smx:INFO: chip: 30-1 31.389742 C 1189.190035 mV
11:56:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:20:ST3_smx:INFO: Electrons
11:56:21:ST3_smx:INFO: # loops 0
11:56:22:ST3_smx:INFO: # loops 1
11:56:24:ST3_smx:INFO: # loops 2
11:56:25:ST3_smx:INFO: Total # of broken channels: 0
11:56:25:ST3_smx:INFO: List of broken channels: []
11:56:25:ST3_smx:INFO: Total # of broken channels: 0
11:56:25:ST3_smx:INFO: List of broken channels: []
11:56:27:ST3_smx:INFO: chip: 28-3 28.225000 C 1200.969315 mV
11:56:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:27:ST3_smx:INFO: Electrons
11:56:27:ST3_smx:INFO: # loops 0
11:56:28:ST3_smx:INFO: # loops 1
11:56:30:ST3_smx:INFO: # loops 2
11:56:31:ST3_smx:INFO: Total # of broken channels: 0
11:56:31:ST3_smx:INFO: List of broken channels: []
11:56:31:ST3_smx:INFO: Total # of broken channels: 0
11:56:31:ST3_smx:INFO: List of broken channels: []
11:56:33:ST3_smx:INFO: chip: 26-5 37.726682 C 1171.483840 mV
11:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:33:ST3_smx:INFO: Electrons
11:56:33:ST3_smx:INFO: # loops 0
11:56:35:ST3_smx:INFO: # loops 1
11:56:36:ST3_smx:INFO: # loops 2
11:56:38:ST3_smx:INFO: Total # of broken channels: 0
11:56:38:ST3_smx:INFO: List of broken channels: []
11:56:38:ST3_smx:INFO: Total # of broken channels: 0
11:56:38:ST3_smx:INFO: List of broken channels: []
11:56:39:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV
11:56:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:39:ST3_smx:INFO: Electrons
11:56:39:ST3_smx:INFO: # loops 0
11:56:41:ST3_smx:INFO: # loops 1
11:56:42:ST3_smx:INFO: # loops 2
11:56:44:ST3_smx:INFO: Total # of broken channels: 0
11:56:44:ST3_smx:INFO: List of broken channels: []
11:56:44:ST3_smx:INFO: Total # of broken channels: 0
11:56:44:ST3_smx:INFO: List of broken channels: []
11:56:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:56:44:febtest:INFO: 30-01 | XA-000-09-004-004-010-008-00 | 34.6 | 1212.7
11:56:45:febtest:INFO: 28-03 | XA-000-09-004-004-010-006-00 | 28.2 | 1218.6
11:56:45:febtest:INFO: 26-05 | XA-000-09-004-004-010-003-00 | 37.7 | 1201.0
11:56:45:febtest:INFO: 24-07 | XA-000-09-004-004-010-007-00 | 37.7 | 1195.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_15-11_55_59
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4099| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7221', '1.850', '1.4050']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '1.2920']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9905', '1.850', '0.2687']