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FEB_4099 21.01.25 11:08:55
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11:08:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:55:ST3_Shared:INFO: FEB-Microcable
11:08:55:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:08:55:febtest:INFO: Testing FEB with SN 4099
11:08:56:smx_tester:INFO: Scanning setup
11:08:56:elinks:INFO: Disabling clock on downlink 0
11:08:56:elinks:INFO: Disabling clock on downlink 1
11:08:56:elinks:INFO: Disabling clock on downlink 2
11:08:56:elinks:INFO: Disabling clock on downlink 3
11:08:56:elinks:INFO: Disabling clock on downlink 4
11:08:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:08:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:57:elinks:INFO: Disabling clock on downlink 0
11:08:57:elinks:INFO: Disabling clock on downlink 1
11:08:57:elinks:INFO: Disabling clock on downlink 2
11:08:57:elinks:INFO: Disabling clock on downlink 3
11:08:57:elinks:INFO: Disabling clock on downlink 4
11:08:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:08:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:57:elinks:INFO: Disabling clock on downlink 0
11:08:57:elinks:INFO: Disabling clock on downlink 1
11:08:57:elinks:INFO: Disabling clock on downlink 2
11:08:57:elinks:INFO: Disabling clock on downlink 3
11:08:57:elinks:INFO: Disabling clock on downlink 4
11:08:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:08:57:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:08:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:57:elinks:INFO: Disabling clock on downlink 0
11:08:57:elinks:INFO: Disabling clock on downlink 1
11:08:57:elinks:INFO: Disabling clock on downlink 2
11:08:57:elinks:INFO: Disabling clock on downlink 3
11:08:57:elinks:INFO: Disabling clock on downlink 4
11:08:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:08:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:57:elinks:INFO: Disabling clock on downlink 0
11:08:57:elinks:INFO: Disabling clock on downlink 1
11:08:57:elinks:INFO: Disabling clock on downlink 2
11:08:57:elinks:INFO: Disabling clock on downlink 3
11:08:57:elinks:INFO: Disabling clock on downlink 4
11:08:57:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:08:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:08:57:setup_element:INFO: Scanning clock phase
11:08:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:08:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:08:57:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:08:57:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:08:57:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXX____
Clock Delay: 33
11:08:57:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXX____
Clock Delay: 33
11:08:57:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
11:08:57:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
11:08:57:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:08:57:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:08:57:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:08:57:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:08:57:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:08:57:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:08:58:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:08:58:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:08:58:setup_element:INFO: Eye window for uplink 30: _________________________________________________________________________XXXX___
Clock Delay: 34
11:08:58:setup_element:INFO: Eye window for uplink 31: _________________________________________________________________________XXXX___
Clock Delay: 34
11:08:58:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:08:58:setup_element:INFO: Scanning data phases
11:08:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:08:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:03:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:09:03:setup_element:INFO: Eye window for uplink 16: XXX_________________________________XXXX
Data delay found: 19
11:09:03:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
11:09:03:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXXX
Data delay found: 17
11:09:03:setup_element:INFO: Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
11:09:03:setup_element:INFO: Eye window for uplink 20: X___________________________________XXXX
Data delay found: 18
11:09:03:setup_element:INFO: Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
11:09:03:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
11:09:03:setup_element:INFO: Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
11:09:03:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
11:09:03:setup_element:INFO: Eye window for uplink 25: _________XXXXX__________________________
Data delay found: 31
11:09:03:setup_element:INFO: Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:09:03:setup_element:INFO: Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
11:09:03:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
11:09:03:setup_element:INFO: Eye window for uplink 29: _____________XXXXX______________________
Data delay found: 35
11:09:03:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
11:09:03:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
11:09:03:setup_element:INFO: Setting the data phase to 19 for uplink 16
11:09:03:setup_element:INFO: Setting the data phase to 17 for uplink 17
11:09:03:setup_element:INFO: Setting the data phase to 17 for uplink 18
11:09:03:setup_element:INFO: Setting the data phase to 15 for uplink 19
11:09:03:setup_element:INFO: Setting the data phase to 18 for uplink 20
11:09:03:setup_element:INFO: Setting the data phase to 17 for uplink 21
11:09:03:setup_element:INFO: Setting the data phase to 19 for uplink 22
11:09:03:setup_element:INFO: Setting the data phase to 15 for uplink 23
11:09:03:setup_element:INFO: Setting the data phase to 28 for uplink 24
11:09:03:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:09:03:setup_element:INFO: Setting the data phase to 28 for uplink 26
11:09:03:setup_element:INFO: Setting the data phase to 32 for uplink 27
11:09:03:setup_element:INFO: Setting the data phase to 33 for uplink 28
11:09:03:setup_element:INFO: Setting the data phase to 35 for uplink 29
11:09:03:setup_element:INFO: Setting the data phase to 38 for uplink 30
11:09:03:setup_element:INFO: Setting the data phase to 39 for uplink 31
11:09:03:setup_element:INFO: Beginning SMX ASICs map scan
11:09:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:09:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:09:03:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:09:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:09:03:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:09:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:09:03:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:09:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:09:03:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:09:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:09:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:09:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:09:04:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:09:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:09:04:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:09:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:09:04:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:09:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:09:04:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:09:05:setup_element:INFO: Performing Elink synchronization
11:09:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:09:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:09:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:09:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:09:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:09:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:09:06:febtest:INFO: Init all SMX (CSA): 30
11:09:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:09:20:febtest:INFO: 23-00 | XA-000-09-004-004-010-002-00 | 44.1 | 1130.0
11:09:20:febtest:INFO: 30-01 | XA-000-09-004-004-010-008-00 | 37.7 | 1171.5
11:09:20:febtest:INFO: 21-02 | XA-000-09-004-004-009-002-14 | 56.8 | 1112.1
11:09:20:febtest:INFO: 28-03 | XA-000-09-004-004-010-006-00 | 37.7 | 1183.3
11:09:21:febtest:INFO: 19-04 | XA-000-09-004-004-009-003-14 | 50.4 | 1124.0
11:09:21:febtest:INFO: 26-05 | XA-000-09-004-004-010-003-00 | 44.1 | 1159.7
11:09:21:febtest:INFO: 17-06 | XA-000-09-004-004-009-022-09 | 47.3 | 1147.8
11:09:21:febtest:INFO: 24-07 | XA-000-09-004-004-010-007-00 | 44.1 | 1159.7
11:09:22:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:09:24:ST3_smx:INFO: chip: 23-0 44.073563 C 1141.874115 mV
11:09:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:24:ST3_smx:INFO: Electrons
11:09:24:ST3_smx:INFO: # loops 0
11:09:26:ST3_smx:INFO: # loops 1
11:09:27:ST3_smx:INFO: # loops 2
11:09:29:ST3_smx:INFO: Total # of broken channels: 0
11:09:29:ST3_smx:INFO: List of broken channels: []
11:09:29:ST3_smx:INFO: Total # of broken channels: 0
11:09:29:ST3_smx:INFO: List of broken channels: []
11:09:30:ST3_smx:INFO: chip: 30-1 37.726682 C 1183.292940 mV
11:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:30:ST3_smx:INFO: Electrons
11:09:30:ST3_smx:INFO: # loops 0
11:09:32:ST3_smx:INFO: # loops 1
11:09:34:ST3_smx:INFO: # loops 2
11:09:35:ST3_smx:INFO: Total # of broken channels: 0
11:09:35:ST3_smx:INFO: List of broken channels: []
11:09:35:ST3_smx:INFO: Total # of broken channels: 0
11:09:35:ST3_smx:INFO: List of broken channels: []
11:09:37:ST3_smx:INFO: chip: 21-2 53.612520 C 1129.995435 mV
11:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:37:ST3_smx:INFO: Electrons
11:09:37:ST3_smx:INFO: # loops 0
11:09:38:ST3_smx:INFO: # loops 1
11:09:40:ST3_smx:INFO: # loops 2
11:09:41:ST3_smx:INFO: Total # of broken channels: 0
11:09:41:ST3_smx:INFO: List of broken channels: []
11:09:41:ST3_smx:INFO: Total # of broken channels: 0
11:09:41:ST3_smx:INFO: List of broken channels: []
11:09:43:ST3_smx:INFO: chip: 28-3 37.726682 C 1200.969315 mV
11:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:43:ST3_smx:INFO: Electrons
11:09:43:ST3_smx:INFO: # loops 0
11:09:45:ST3_smx:INFO: # loops 1
11:09:46:ST3_smx:INFO: # loops 2
11:09:47:ST3_smx:INFO: Total # of broken channels: 0
11:09:47:ST3_smx:INFO: List of broken channels: []
11:09:47:ST3_smx:INFO: Total # of broken channels: 3
11:09:47:ST3_smx:INFO: List of broken channels: [1, 3, 5]
11:09:49:ST3_smx:INFO: chip: 19-4 50.430383 C 1135.937260 mV
11:09:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:49:ST3_smx:INFO: Electrons
11:09:49:ST3_smx:INFO: # loops 0
11:09:51:ST3_smx:INFO: # loops 1
11:09:52:ST3_smx:INFO: # loops 2
11:09:54:ST3_smx:INFO: Total # of broken channels: 0
11:09:54:ST3_smx:INFO: List of broken channels: []
11:09:54:ST3_smx:INFO: Total # of broken channels: 0
11:09:54:ST3_smx:INFO: List of broken channels: []
11:09:55:ST3_smx:INFO: chip: 26-5 44.073563 C 1177.390875 mV
11:09:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:09:55:ST3_smx:INFO: Electrons
11:09:55:ST3_smx:INFO: # loops 0
11:09:57:ST3_smx:INFO: # loops 1
11:09:58:ST3_smx:INFO: # loops 2
11:10:00:ST3_smx:INFO: Total # of broken channels: 0
11:10:00:ST3_smx:INFO: List of broken channels: []
11:10:00:ST3_smx:INFO: Total # of broken channels: 0
11:10:00:ST3_smx:INFO: List of broken channels: []
11:10:01:ST3_smx:INFO: chip: 17-6 47.250730 C 1159.654860 mV
11:10:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:01:ST3_smx:INFO: Electrons
11:10:01:ST3_smx:INFO: # loops 0
11:10:03:ST3_smx:INFO: # loops 1
11:10:05:ST3_smx:INFO: # loops 2
11:10:06:ST3_smx:INFO: Total # of broken channels: 0
11:10:06:ST3_smx:INFO: List of broken channels: []
11:10:06:ST3_smx:INFO: Total # of broken channels: 0
11:10:06:ST3_smx:INFO: List of broken channels: []
11:10:08:ST3_smx:INFO: chip: 24-7 47.250730 C 1171.483840 mV
11:10:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:10:08:ST3_smx:INFO: Electrons
11:10:08:ST3_smx:INFO: # loops 0
11:10:09:ST3_smx:INFO: # loops 1
11:10:11:ST3_smx:INFO: # loops 2
11:10:12:ST3_smx:INFO: Total # of broken channels: 0
11:10:12:ST3_smx:INFO: List of broken channels: []
11:10:12:ST3_smx:INFO: Total # of broken channels: 0
11:10:12:ST3_smx:INFO: List of broken channels: []
11:10:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:10:13:febtest:INFO: 23-00 | XA-000-09-004-004-010-002-00 | 47.3 | 1165.6
11:10:13:febtest:INFO: 30-01 | XA-000-09-004-004-010-008-00 | 37.7 | 1206.9
11:10:13:febtest:INFO: 21-02 | XA-000-09-004-004-009-002-14 | 56.8 | 1153.7
11:10:14:febtest:INFO: 28-03 | XA-000-09-004-004-010-006-00 | 37.7 | 1218.6
11:10:14:febtest:INFO: 19-04 | XA-000-09-004-004-009-003-14 | 53.6 | 1159.7
11:10:14:febtest:INFO: 26-05 | XA-000-09-004-004-010-003-00 | 47.3 | 1201.0
11:10:14:febtest:INFO: 17-06 | XA-000-09-004-004-009-022-09 | 50.4 | 1183.3
11:10:14:febtest:INFO: 24-07 | XA-000-09-004-004-010-007-00 | 47.3 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_21-11_08_55
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4099| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5040', '1.849', '2.8030']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0120', '1.850', '2.6360']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9840', '1.850', '0.5318']