DTL-STS tests database

FEB_4100 22.01.25 12:07:40

link: XA-000-09-004-002-005-020-01
...SMX_0.root
link: XA-000-09-004-002-005-022-01
...SMX_2.root
link: XA-000-09-004-002-011-019-08
...SMX_4.root
link: XA-000-09-004-002-008-020-06
...SMX_6.root
link: XA-000-09-004-002-005-019-01
...SMX_1.root
link: XA-000-09-004-002-002-019-09
...SMX_3.root
link: XA-000-09-004-002-008-022-06
...SMX_5.root
link: XA-000-09-004-002-008-019-06
...SMX_7.root
link: XA-000-09-004-002-008-019-06
...VddmCSAstatus.root
TextEdit.txt
            12:07:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:07:40:ST3_Shared:INFO:	                       FEB-Microcable                       
12:07:40:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:07:40:febtest:INFO:	Testing FEB with SN 4100
12:07:42:smx_tester:INFO:	Scanning setup
12:07:42:elinks:INFO:	Disabling clock on downlink 0
12:07:42:elinks:INFO:	Disabling clock on downlink 1
12:07:42:elinks:INFO:	Disabling clock on downlink 2
12:07:42:elinks:INFO:	Disabling clock on downlink 3
12:07:42:elinks:INFO:	Disabling clock on downlink 4
12:07:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:07:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:07:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:07:42:elinks:INFO:	Disabling clock on downlink 0
12:07:42:elinks:INFO:	Disabling clock on downlink 1
12:07:42:elinks:INFO:	Disabling clock on downlink 2
12:07:42:elinks:INFO:	Disabling clock on downlink 3
12:07:42:elinks:INFO:	Disabling clock on downlink 4
12:07:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:07:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:07:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:07:42:elinks:INFO:	Disabling clock on downlink 0
12:07:42:elinks:INFO:	Disabling clock on downlink 1
12:07:42:elinks:INFO:	Disabling clock on downlink 2
12:07:42:elinks:INFO:	Disabling clock on downlink 3
12:07:42:elinks:INFO:	Disabling clock on downlink 4
12:07:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:07:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:07:42:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:07:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:07:42:elinks:INFO:	Disabling clock on downlink 0
12:07:42:elinks:INFO:	Disabling clock on downlink 1
12:07:42:elinks:INFO:	Disabling clock on downlink 2
12:07:42:elinks:INFO:	Disabling clock on downlink 3
12:07:42:elinks:INFO:	Disabling clock on downlink 4
12:07:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:07:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:07:42:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:07:42:elinks:INFO:	Disabling clock on downlink 0
12:07:42:elinks:INFO:	Disabling clock on downlink 1
12:07:42:elinks:INFO:	Disabling clock on downlink 2
12:07:42:elinks:INFO:	Disabling clock on downlink 3
12:07:42:elinks:INFO:	Disabling clock on downlink 4
12:07:42:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:07:42:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:07:43:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:07:43:setup_element:INFO:	Scanning clock phase
12:07:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:07:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:07:43:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:07:43:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:07:43:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:07:43:setup_element:INFO:	Eye window for uplink 28: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:07:43:setup_element:INFO:	Eye window for uplink 29: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:07:43:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:07:43:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXX__
Clock Delay: 35
12:07:43:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
12:07:43:setup_element:INFO:	Scanning data phases
12:07:43:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:07:43:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:07:48:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:07:48:setup_element:INFO:	Eye window for uplink 16: X__________________________________XXXXX
Data delay found: 17
12:07:48:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
12:07:48:setup_element:INFO:	Eye window for uplink 18: ___________________________________XXXXX
Data delay found: 17
12:07:48:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
12:07:48:setup_element:INFO:	Eye window for uplink 20: X__________________________________XXXX_
Data delay found: 17
12:07:48:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
12:07:48:setup_element:INFO:	Eye window for uplink 22: X___________________________________XXXX
Data delay found: 18
12:07:48:setup_element:INFO:	Eye window for uplink 23: ________________________________XXXX__XX
Data delay found: 15
12:07:48:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
12:07:48:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
12:07:48:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
12:07:48:setup_element:INFO:	Eye window for uplink 27: _________XXXXXXX________________________
Data delay found: 32
12:07:48:setup_element:INFO:	Eye window for uplink 28: _______________XXXXX____________________
Data delay found: 37
12:07:48:setup_element:INFO:	Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
12:07:48:setup_element:INFO:	Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
12:07:48:setup_element:INFO:	Eye window for uplink 31: ________________XXXXX___________________
Data delay found: 38
12:07:48:setup_element:INFO:	Setting the data phase to 17 for uplink 16
12:07:48:setup_element:INFO:	Setting the data phase to 15 for uplink 17
12:07:48:setup_element:INFO:	Setting the data phase to 17 for uplink 18
12:07:48:setup_element:INFO:	Setting the data phase to 15 for uplink 19
12:07:48:setup_element:INFO:	Setting the data phase to 17 for uplink 20
12:07:48:setup_element:INFO:	Setting the data phase to 16 for uplink 21
12:07:48:setup_element:INFO:	Setting the data phase to 18 for uplink 22
12:07:48:setup_element:INFO:	Setting the data phase to 15 for uplink 23
12:07:48:setup_element:INFO:	Setting the data phase to 27 for uplink 24
12:07:48:setup_element:INFO:	Setting the data phase to 29 for uplink 25
12:07:48:setup_element:INFO:	Setting the data phase to 28 for uplink 26
12:07:48:setup_element:INFO:	Setting the data phase to 32 for uplink 27
12:07:48:setup_element:INFO:	Setting the data phase to 37 for uplink 28
12:07:48:setup_element:INFO:	Setting the data phase to 39 for uplink 29
12:07:48:setup_element:INFO:	Setting the data phase to 37 for uplink 30
12:07:48:setup_element:INFO:	Setting the data phase to 38 for uplink 31
12:07:48:setup_element:INFO:	Beginning SMX ASICs map scan
12:07:48:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:07:48:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:07:48:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:07:48:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:07:48:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:07:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:07:48:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:07:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:07:48:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:07:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:07:49:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:07:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:07:49:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:07:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:07:49:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:07:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:07:49:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:07:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:07:49:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:07:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:07:49:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:07:51:setup_element:INFO:	Performing Elink synchronization
12:07:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:07:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:07:51:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:07:51:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:07:51:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:07:51:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:07:52:febtest:INFO:	Init all SMX (CSA): 30
12:08:04:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:08:05:febtest:INFO:	23-00 | XA-000-09-004-002-005-020-01 |  44.1 | 1147.8
12:08:05:febtest:INFO:	30-01 | XA-000-09-004-002-005-019-01 |  50.4 | 1124.0
12:08:05:febtest:INFO:	21-02 | XA-000-09-004-002-005-022-01 |  47.3 | 1141.9
12:08:05:febtest:INFO:	28-03 | XA-000-09-004-002-002-019-09 |  40.9 | 1159.7
12:08:05:febtest:INFO:	19-04 | XA-000-09-004-002-011-019-08 |  47.3 | 1153.7
12:08:06:febtest:INFO:	26-05 | XA-000-09-004-002-008-022-06 |  53.6 | 1124.0
12:08:06:febtest:INFO:	17-06 | XA-000-09-004-002-008-020-06 |  50.4 | 1147.8
12:08:06:febtest:INFO:	24-07 | XA-000-09-004-002-008-019-06 |  56.8 | 1124.0
12:08:07:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:08:09:ST3_smx:INFO:	chip: 23-0 	 44.073563 C 	 1165.571835 mV
12:08:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:09:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:09:ST3_smx:INFO:		Electrons
12:08:09:ST3_smx:INFO:	# loops 0
12:08:10:ST3_smx:INFO:	# loops 1
12:08:12:ST3_smx:INFO:	# loops 2
12:08:14:ST3_smx:INFO:	Total # of broken channels: 0
12:08:14:ST3_smx:INFO:	List of broken channels: []
12:08:14:ST3_smx:INFO:	Total # of broken channels: 8
12:08:14:ST3_smx:INFO:	List of broken channels: [0, 2, 4, 6, 8, 10, 12, 14]
12:08:15:ST3_smx:INFO:	chip: 30-1 	 50.430383 C 	 1141.874115 mV
12:08:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:15:ST3_smx:INFO:		Electrons
12:08:15:ST3_smx:INFO:	# loops 0
12:08:17:ST3_smx:INFO:	# loops 1
12:08:18:ST3_smx:INFO:	# loops 2
12:08:20:ST3_smx:INFO:	Total # of broken channels: 0
12:08:20:ST3_smx:INFO:	List of broken channels: []
12:08:20:ST3_smx:INFO:	Total # of broken channels: 17
12:08:20:ST3_smx:INFO:	List of broken channels: [89, 93, 95, 97, 99, 101, 103, 105, 107, 109, 111, 113, 115, 117, 119, 121, 123]
12:08:21:ST3_smx:INFO:	chip: 21-2 	 47.250730 C 	 1153.732915 mV
12:08:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:21:ST3_smx:INFO:		Electrons
12:08:21:ST3_smx:INFO:	# loops 0
12:08:23:ST3_smx:INFO:	# loops 1
12:08:24:ST3_smx:INFO:	# loops 2
12:08:26:ST3_smx:INFO:	Total # of broken channels: 0
12:08:26:ST3_smx:INFO:	List of broken channels: []
12:08:26:ST3_smx:INFO:	Total # of broken channels: 0
12:08:26:ST3_smx:INFO:	List of broken channels: []
12:08:27:ST3_smx:INFO:	chip: 28-3 	 40.898880 C 	 1171.483840 mV
12:08:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:27:ST3_smx:INFO:		Electrons
12:08:27:ST3_smx:INFO:	# loops 0
12:08:29:ST3_smx:INFO:	# loops 1
12:08:30:ST3_smx:INFO:	# loops 2
12:08:32:ST3_smx:INFO:	Total # of broken channels: 0
12:08:32:ST3_smx:INFO:	List of broken channels: []
12:08:32:ST3_smx:INFO:	Total # of broken channels: 0
12:08:32:ST3_smx:INFO:	List of broken channels: []
12:08:34:ST3_smx:INFO:	chip: 19-4 	 50.430383 C 	 1159.654860 mV
12:08:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:34:ST3_smx:INFO:		Electrons
12:08:34:ST3_smx:INFO:	# loops 0
12:08:35:ST3_smx:INFO:	# loops 1
12:08:37:ST3_smx:INFO:	# loops 2
12:08:38:ST3_smx:INFO:	Total # of broken channels: 0
12:08:38:ST3_smx:INFO:	List of broken channels: []
12:08:38:ST3_smx:INFO:	Total # of broken channels: 0
12:08:38:ST3_smx:INFO:	List of broken channels: []
12:08:40:ST3_smx:INFO:	chip: 26-5 	 53.612520 C 	 1135.937260 mV
12:08:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:40:ST3_smx:INFO:		Electrons
12:08:40:ST3_smx:INFO:	# loops 0
12:08:41:ST3_smx:INFO:	# loops 1
12:08:43:ST3_smx:INFO:	# loops 2
12:08:44:ST3_smx:INFO:	Total # of broken channels: 0
12:08:44:ST3_smx:INFO:	List of broken channels: []
12:08:44:ST3_smx:INFO:	Total # of broken channels: 0
12:08:44:ST3_smx:INFO:	List of broken channels: []
12:08:46:ST3_smx:INFO:	chip: 17-6 	 53.612520 C 	 1153.732915 mV
12:08:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:46:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:46:ST3_smx:INFO:		Electrons
12:08:46:ST3_smx:INFO:	# loops 0
12:08:47:ST3_smx:INFO:	# loops 1
12:08:49:ST3_smx:INFO:	# loops 2
12:08:50:ST3_smx:INFO:	Total # of broken channels: 0
12:08:50:ST3_smx:INFO:	List of broken channels: []
12:08:50:ST3_smx:INFO:	Total # of broken channels: 0
12:08:50:ST3_smx:INFO:	List of broken channels: []
12:08:52:ST3_smx:INFO:	chip: 24-7 	 56.797143 C 	 1135.937260 mV
12:08:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:08:52:ST3_smx:INFO:		Electrons
12:08:52:ST3_smx:INFO:	# loops 0
12:08:53:ST3_smx:INFO:	# loops 1
12:08:55:ST3_smx:INFO:	# loops 2
12:08:56:ST3_smx:INFO:	Total # of broken channels: 0
12:08:56:ST3_smx:INFO:	List of broken channels: []
12:08:56:ST3_smx:INFO:	Total # of broken channels: 0
12:08:56:ST3_smx:INFO:	List of broken channels: []
12:08:57:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:08:57:febtest:INFO:	23-00 | XA-000-09-004-002-005-020-01 |  44.1 | 1183.3
12:08:57:febtest:INFO:	30-01 | XA-000-09-004-002-005-019-01 |  50.4 | 1159.7
12:08:57:febtest:INFO:	21-02 | XA-000-09-004-002-005-022-01 |  47.3 | 1177.4
12:08:57:febtest:INFO:	28-03 | XA-000-09-004-002-002-019-09 |  40.9 | 1189.2
12:08:58:febtest:INFO:	19-04 | XA-000-09-004-002-011-019-08 |  50.4 | 1183.3
12:08:58:febtest:INFO:	26-05 | XA-000-09-004-002-008-022-06 |  56.8 | 1159.7
12:08:58:febtest:INFO:	17-06 | XA-000-09-004-002-008-020-06 |  53.6 | 1177.4
12:08:58:febtest:INFO:	24-07 | XA-000-09-004-002-008-019-06 |  60.0 | 1159.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_22-12_07_40
OPERATOR  : Henrik; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4100| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4610', '1.849', '3.0590']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.849', '2.5930']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5304']
Comment.txt