DTL-STS tests database

FEB_4104 28.01.25 11:06:33

Ladder: L5UR401117
Module: M5UR4T2011172A2
Sensor: 14104
link: XA-000-09-004-002-003-007-03
...SMX_0.root
link: XA-000-09-004-002-003-008-03
...SMX_2.root
link: XA-000-09-004-002-003-010-03
...SMX_4.root
link: XA-000-09-004-002-006-007-08
...SMX_6.root
link: XA-000-09-004-002-011-006-15
...SMX_1.root
link: XA-000-09-004-002-011-009-15
...SMX_3.root
link: XA-000-09-004-002-005-006-06
...SMX_5.root
link: XA-000-09-004-002-008-006-01
...SMX_7.root
link: XA-000-09-004-002-008-006-01
...VddmCSAstatus.root
TextEdit.txt
            11:06:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:33:ST3_Shared:INFO:	                         FEB-Sensor                         
11:06:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:06:58:ST3_ModuleSelector:INFO:	L5UR401117 M5UR4T2011172A2 124 C

11:06:58:ST3_ModuleSelector:INFO:	14104

11:06:58:febtest:INFO:	Testing FEB with SN 4104
11:06:59:smx_tester:INFO:	Scanning setup
11:06:59:elinks:INFO:	Disabling clock on downlink 0
11:06:59:elinks:INFO:	Disabling clock on downlink 1
11:06:59:elinks:INFO:	Disabling clock on downlink 2
11:06:59:elinks:INFO:	Disabling clock on downlink 3
11:06:59:elinks:INFO:	Disabling clock on downlink 4
11:06:59:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:06:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
11:07:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:00:elinks:INFO:	Disabling clock on downlink 0
11:07:00:elinks:INFO:	Disabling clock on downlink 1
11:07:00:elinks:INFO:	Disabling clock on downlink 2
11:07:00:elinks:INFO:	Disabling clock on downlink 3
11:07:00:elinks:INFO:	Disabling clock on downlink 4
11:07:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
11:07:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:00:elinks:INFO:	Disabling clock on downlink 0
11:07:00:elinks:INFO:	Disabling clock on downlink 1
11:07:00:elinks:INFO:	Disabling clock on downlink 2
11:07:00:elinks:INFO:	Disabling clock on downlink 3
11:07:00:elinks:INFO:	Disabling clock on downlink 4
11:07:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
11:07:00:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
11:07:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:00:elinks:INFO:	Disabling clock on downlink 0
11:07:00:elinks:INFO:	Disabling clock on downlink 1
11:07:00:elinks:INFO:	Disabling clock on downlink 2
11:07:00:elinks:INFO:	Disabling clock on downlink 3
11:07:00:elinks:INFO:	Disabling clock on downlink 4
11:07:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
11:07:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:00:elinks:INFO:	Disabling clock on downlink 0
11:07:00:elinks:INFO:	Disabling clock on downlink 1
11:07:00:elinks:INFO:	Disabling clock on downlink 2
11:07:00:elinks:INFO:	Disabling clock on downlink 3
11:07:00:elinks:INFO:	Disabling clock on downlink 4
11:07:00:setup_element:INFO:	Checking SOS, encoding_mode: SOS
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
11:07:00:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
11:07:00:setup_element:INFO:	Scanning clock phase
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:00:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:00:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
11:07:00:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________________XXXX___
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________________XXXX___
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 20: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 21: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:07:00:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
11:07:00:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:07:00:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:07:00:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:07:00:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:07:00:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:07:00:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:07:00:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
11:07:00:setup_element:INFO:	Scanning data phases
11:07:00:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:01:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:06:setup_element:INFO:	Data phase scan results for group 0, downlink 2
11:07:06:setup_element:INFO:	Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
11:07:06:setup_element:INFO:	Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
11:07:06:setup_element:INFO:	Eye window for uplink 18: XX___________________________________XXX
Data delay found: 19
11:07:06:setup_element:INFO:	Eye window for uplink 19: ___________________________________XXXXX
Data delay found: 17
11:07:06:setup_element:INFO:	Eye window for uplink 20: X_________________________________XXXXX_
Data delay found: 17
11:07:06:setup_element:INFO:	Eye window for uplink 21: __________________________________XXXXX_
Data delay found: 16
11:07:06:setup_element:INFO:	Eye window for uplink 22: XX___________________________________XXX
Data delay found: 19
11:07:06:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXX___
Data delay found: 14
11:07:06:setup_element:INFO:	Eye window for uplink 24: ___XXXXX________________________________
Data delay found: 25
11:07:06:setup_element:INFO:	Eye window for uplink 25: _____XXXXX______________________________
Data delay found: 27
11:07:06:setup_element:INFO:	Eye window for uplink 26: ______XXXXX_____________________________
Data delay found: 28
11:07:06:setup_element:INFO:	Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
11:07:06:setup_element:INFO:	Eye window for uplink 28: __________XXXX__________________________
Data delay found: 31
11:07:06:setup_element:INFO:	Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
11:07:06:setup_element:INFO:	Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
11:07:06:setup_element:INFO:	Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
11:07:06:setup_element:INFO:	Setting the data phase to 19 for uplink 16
11:07:06:setup_element:INFO:	Setting the data phase to 16 for uplink 17
11:07:06:setup_element:INFO:	Setting the data phase to 19 for uplink 18
11:07:06:setup_element:INFO:	Setting the data phase to 17 for uplink 19
11:07:06:setup_element:INFO:	Setting the data phase to 17 for uplink 20
11:07:06:setup_element:INFO:	Setting the data phase to 16 for uplink 21
11:07:06:setup_element:INFO:	Setting the data phase to 19 for uplink 22
11:07:06:setup_element:INFO:	Setting the data phase to 14 for uplink 23
11:07:06:setup_element:INFO:	Setting the data phase to 25 for uplink 24
11:07:06:setup_element:INFO:	Setting the data phase to 27 for uplink 25
11:07:06:setup_element:INFO:	Setting the data phase to 28 for uplink 26
11:07:06:setup_element:INFO:	Setting the data phase to 32 for uplink 27
11:07:06:setup_element:INFO:	Setting the data phase to 31 for uplink 28
11:07:06:setup_element:INFO:	Setting the data phase to 34 for uplink 29
11:07:06:setup_element:INFO:	Setting the data phase to 35 for uplink 30
11:07:06:setup_element:INFO:	Setting the data phase to 35 for uplink 31
11:07:06:setup_element:INFO:	Beginning SMX ASICs map scan
11:07:06:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:06:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:06:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:07:06:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:07:06:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:07:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:07:06:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:07:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:07:06:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:07:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:07:06:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:07:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:07:06:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:07:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:07:06:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:07:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:07:07:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:07:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:07:07:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:07:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:07:07:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:07:08:setup_element:INFO:	Performing Elink synchronization
11:07:08:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
11:07:08:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:07:08:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
11:07:08:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
11:07:08:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
11:07:08:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:07:09:febtest:INFO:	Init all SMX (CSA): 30
11:07:25:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:07:25:febtest:INFO:	23-00 | XA-000-09-004-002-003-007-03 |  40.9 | 1141.9
11:07:25:febtest:INFO:	30-01 | XA-000-09-004-002-011-006-15 |  44.1 | 1141.9
11:07:25:febtest:INFO:	21-02 | XA-000-09-004-002-003-008-03 |  44.1 | 1135.9
11:07:25:febtest:INFO:	28-03 | XA-000-09-004-002-011-009-15 |  31.4 | 1183.3
11:07:26:febtest:INFO:	19-04 | XA-000-09-004-002-003-010-03 |  31.4 | 1177.4
11:07:26:febtest:INFO:	26-05 | XA-000-09-004-002-005-006-06 |  37.7 | 1165.6
11:07:26:febtest:INFO:	17-06 | XA-000-09-004-002-006-007-08 |  31.4 | 1206.9
11:07:26:febtest:INFO:	24-07 | XA-000-09-004-002-008-006-01 |  50.4 | 1112.1
11:07:27:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:07:29:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1153.732915 mV
11:07:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:29:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:29:ST3_smx:INFO:		Electrons
11:07:29:ST3_smx:INFO:	# loops 0
11:07:31:ST3_smx:INFO:	# loops 1
11:07:32:ST3_smx:INFO:	# loops 2
11:07:34:ST3_smx:INFO:	Total # of broken channels: 0
11:07:34:ST3_smx:INFO:	List of broken channels: []
11:07:34:ST3_smx:INFO:	Total # of broken channels: 0
11:07:34:ST3_smx:INFO:	List of broken channels: []
11:07:36:ST3_smx:INFO:	chip: 30-1 	 44.073563 C 	 1153.732915 mV
11:07:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:36:ST3_smx:INFO:		Electrons
11:07:36:ST3_smx:INFO:	# loops 0
11:07:37:ST3_smx:INFO:	# loops 1
11:07:39:ST3_smx:INFO:	# loops 2
11:07:40:ST3_smx:INFO:	Total # of broken channels: 0
11:07:40:ST3_smx:INFO:	List of broken channels: []
11:07:40:ST3_smx:INFO:	Total # of broken channels: 0
11:07:40:ST3_smx:INFO:	List of broken channels: []
11:07:42:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1147.806000 mV
11:07:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:42:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:42:ST3_smx:INFO:		Electrons
11:07:42:ST3_smx:INFO:	# loops 0
11:07:44:ST3_smx:INFO:	# loops 1
11:07:45:ST3_smx:INFO:	# loops 2
11:07:47:ST3_smx:INFO:	Total # of broken channels: 0
11:07:47:ST3_smx:INFO:	List of broken channels: []
11:07:47:ST3_smx:INFO:	Total # of broken channels: 0
11:07:47:ST3_smx:INFO:	List of broken channels: []
11:07:49:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1200.969315 mV
11:07:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:49:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:49:ST3_smx:INFO:		Electrons
11:07:49:ST3_smx:INFO:	# loops 0
11:07:50:ST3_smx:INFO:	# loops 1
11:07:52:ST3_smx:INFO:	# loops 2
11:07:53:ST3_smx:INFO:	Total # of broken channels: 0
11:07:53:ST3_smx:INFO:	List of broken channels: []
11:07:53:ST3_smx:INFO:	Total # of broken channels: 0
11:07:53:ST3_smx:INFO:	List of broken channels: []
11:07:55:ST3_smx:INFO:	chip: 19-4 	 34.556970 C 	 1189.190035 mV
11:07:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:55:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:07:55:ST3_smx:INFO:		Electrons
11:07:55:ST3_smx:INFO:	# loops 0
11:07:57:ST3_smx:INFO:	# loops 1
11:07:58:ST3_smx:INFO:	# loops 2
11:08:00:ST3_smx:INFO:	Total # of broken channels: 0
11:08:00:ST3_smx:INFO:	List of broken channels: []
11:08:00:ST3_smx:INFO:	Total # of broken channels: 0
11:08:00:ST3_smx:INFO:	List of broken channels: []
11:08:02:ST3_smx:INFO:	chip: 26-5 	 37.726682 C 	 1183.292940 mV
11:08:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:02:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:02:ST3_smx:INFO:		Electrons
11:08:02:ST3_smx:INFO:	# loops 0
11:08:03:ST3_smx:INFO:	# loops 1
11:08:05:ST3_smx:INFO:	# loops 2
11:08:07:ST3_smx:INFO:	Total # of broken channels: 0
11:08:07:ST3_smx:INFO:	List of broken channels: []
11:08:07:ST3_smx:INFO:	Total # of broken channels: 0
11:08:07:ST3_smx:INFO:	List of broken channels: []
11:08:08:ST3_smx:INFO:	chip: 17-6 	 31.389742 C 	 1224.468235 mV
11:08:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:08:ST3_smx:INFO:		Electrons
11:08:08:ST3_smx:INFO:	# loops 0
11:08:10:ST3_smx:INFO:	# loops 1
11:08:12:ST3_smx:INFO:	# loops 2
11:08:14:ST3_smx:INFO:	Total # of broken channels: 0
11:08:14:ST3_smx:INFO:	List of broken channels: []
11:08:14:ST3_smx:INFO:	Total # of broken channels: 0
11:08:14:ST3_smx:INFO:	List of broken channels: []
11:08:15:ST3_smx:INFO:	chip: 24-7 	 53.612520 C 	 1124.048640 mV
11:08:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:15:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
11:08:15:ST3_smx:INFO:		Electrons
11:08:16:ST3_smx:INFO:	# loops 0
11:08:17:ST3_smx:INFO:	# loops 1
11:08:19:ST3_smx:INFO:	# loops 2
11:08:20:ST3_smx:INFO:	Total # of broken channels: 0
11:08:20:ST3_smx:INFO:	List of broken channels: []
11:08:20:ST3_smx:INFO:	Total # of broken channels: 0
11:08:20:ST3_smx:INFO:	List of broken channels: []
11:08:21:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:08:21:febtest:INFO:	23-00 | XA-000-09-004-002-003-007-03 |  44.1 | 1177.4
11:08:21:febtest:INFO:	30-01 | XA-000-09-004-002-011-006-15 |  47.3 | 1177.4
11:08:21:febtest:INFO:	21-02 | XA-000-09-004-002-003-008-03 |  47.3 | 1165.6
11:08:22:febtest:INFO:	28-03 | XA-000-09-004-002-011-009-15 |  34.6 | 1218.6
11:08:22:febtest:INFO:	19-04 | XA-000-09-004-002-003-010-03 |  37.7 | 1206.9
11:08:22:febtest:INFO:	26-05 | XA-000-09-004-002-005-006-06 |  37.7 | 1218.6
11:08:22:febtest:INFO:	17-06 | XA-000-09-004-002-006-007-08 |  31.4 | 1317.7
11:08:22:febtest:INFO:	24-07 | XA-000-09-004-002-008-006-01 |  56.8 | 1141.9
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_01_28-11_06_33
OPERATOR  : Benjamin; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4104| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	14104

MODULE_NAME:	L5UR401117 M5UR4T2011172A2 124 C

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.451', '1.8000', '1.850', '2.7900']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0000', '1.849', '2.5880']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9800', '1.850', '0.5262']
Comment.txt