
FEB_4106 17.01.25 14:19:15
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14:19:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:19:15:ST3_Shared:INFO: FEB-Microcable 14:19:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo 14:19:15:febtest:INFO: Testing FEB with SN 4106 14:19:16:smx_tester:INFO: Scanning setup 14:19:16:elinks:INFO: Disabling clock on downlink 0 14:19:16:elinks:INFO: Disabling clock on downlink 1 14:19:16:elinks:INFO: Disabling clock on downlink 2 14:19:16:elinks:INFO: Disabling clock on downlink 3 14:19:16:elinks:INFO: Disabling clock on downlink 4 14:19:16:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0] 14:19:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:17:elinks:INFO: Disabling clock on downlink 0 14:19:17:elinks:INFO: Disabling clock on downlink 1 14:19:17:elinks:INFO: Disabling clock on downlink 2 14:19:17:elinks:INFO: Disabling clock on downlink 3 14:19:17:elinks:INFO: Disabling clock on downlink 4 14:19:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1] 14:19:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:17:elinks:INFO: Disabling clock on downlink 0 14:19:17:elinks:INFO: Disabling clock on downlink 1 14:19:17:elinks:INFO: Disabling clock on downlink 2 14:19:17:elinks:INFO: Disabling clock on downlink 3 14:19:17:elinks:INFO: Disabling clock on downlink 4 14:19:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30 14:19:17:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31 14:19:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:17:elinks:INFO: Disabling clock on downlink 0 14:19:17:elinks:INFO: Disabling clock on downlink 1 14:19:17:elinks:INFO: Disabling clock on downlink 2 14:19:17:elinks:INFO: Disabling clock on downlink 3 14:19:17:elinks:INFO: Disabling clock on downlink 4 14:19:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3] 14:19:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:17:elinks:INFO: Disabling clock on downlink 0 14:19:17:elinks:INFO: Disabling clock on downlink 1 14:19:17:elinks:INFO: Disabling clock on downlink 2 14:19:17:elinks:INFO: Disabling clock on downlink 3 14:19:17:elinks:INFO: Disabling clock on downlink 4 14:19:17:setup_element:INFO: Checking SOS, encoding_mode: SOS 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4] 14:19:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection 14:19:17:setup_element:INFO: Scanning clock phase 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:19:17:setup_element:INFO: Clock phase scan results for group 0, downlink 2 14:19:17:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____ Clock Delay: 32 14:19:17:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____ Clock Delay: 32 14:19:17:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:19:17:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXXX____ Clock Delay: 32 14:19:17:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:19:17:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____ Clock Delay: 33 14:19:17:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____ Clock Delay: 32 14:19:17:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____ Clock Delay: 32 14:19:17:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2 14:19:17:setup_element:INFO: Scanning data phases 14:19:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:19:22:setup_element:INFO: Data phase scan results for group 0, downlink 2 14:19:22:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________ Data delay found: 27 14:19:22:setup_element:INFO: Eye window for uplink 25: _______XXXXXX___________________________ Data delay found: 29 14:19:22:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________ Data delay found: 29 14:19:22:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________ Data delay found: 33 14:19:22:setup_element:INFO: Eye window for uplink 28: _____________XXXXX______________________ Data delay found: 35 14:19:22:setup_element:INFO: Eye window for uplink 29: _______________XXXXXX___________________ Data delay found: 37 14:19:22:setup_element:INFO: Eye window for uplink 30: ___________XXXXXX_______________________ Data delay found: 33 14:19:22:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________ Data delay found: 34 14:19:22:setup_element:INFO: Setting the data phase to 27 for uplink 24 14:19:22:setup_element:INFO: Setting the data phase to 29 for uplink 25 14:19:22:setup_element:INFO: Setting the data phase to 29 for uplink 26 14:19:22:setup_element:INFO: Setting the data phase to 33 for uplink 27 14:19:22:setup_element:INFO: Setting the data phase to 35 for uplink 28 14:19:22:setup_element:INFO: Setting the data phase to 37 for uplink 29 14:19:22:setup_element:INFO: Setting the data phase to 33 for uplink 30 14:19:22:setup_element:INFO: Setting the data phase to 34 for uplink 31 14:19:22:setup_element:INFO: Beginning SMX ASICs map scan 14:19:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:19:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:19:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:19:23:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31] 14:19:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30 14:19:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31 14:19:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28 14:19:23:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29 14:19:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26 14:19:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27 14:19:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24 14:19:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25 14:19:25:setup_element:INFO: Performing Elink synchronization 14:19:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2] 14:19:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2] 14:19:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2] 14:19:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2] 14:19:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2 14:19:25:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31] |_________________________________________________________________________| _addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_ 1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)] 3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)] 5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)] 7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)] |_________________________________________________________________________| 14:19:26:febtest:INFO: Init all SMX (CSA): 30 14:19:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:19:33:febtest:INFO: 30-01 | XA-000-09-004-002-010-009-02 | 34.6 | 1165.6 14:19:33:febtest:INFO: 28-03 | XA-000-09-004-002-010-005-02 | 47.3 | 1112.1 14:19:33:febtest:INFO: 26-05 | XA-000-09-004-002-010-008-02 | 44.1 | 1130.0 14:19:33:febtest:INFO: 24-07 | XA-000-09-004-002-007-009-05 | 37.7 | 1159.7 14:19:34:febtest:INFO: Set all CSA to ZERO FEB type: B FEB_A: 0 FEB_B: 1 14:19:36:ST3_smx:INFO: chip: 30-1 34.556970 C 1177.390875 mV 14:19:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:36:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:36:ST3_smx:INFO: Electrons 14:19:36:ST3_smx:INFO: # loops 0 14:19:38:ST3_smx:INFO: # loops 1 14:19:39:ST3_smx:INFO: # loops 2 14:19:41:ST3_smx:INFO: Total # of broken channels: 0 14:19:41:ST3_smx:INFO: List of broken channels: [] 14:19:41:ST3_smx:INFO: Total # of broken channels: 0 14:19:41:ST3_smx:INFO: List of broken channels: [] 14:19:42:ST3_smx:INFO: chip: 28-3 47.250730 C 1124.048640 mV 14:19:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:42:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:42:ST3_smx:INFO: Electrons 14:19:42:ST3_smx:INFO: # loops 0 14:19:44:ST3_smx:INFO: # loops 1 14:19:46:ST3_smx:INFO: # loops 2 14:19:47:ST3_smx:INFO: Total # of broken channels: 0 14:19:47:ST3_smx:INFO: List of broken channels: [] 14:19:47:ST3_smx:INFO: Total # of broken channels: 0 14:19:47:ST3_smx:INFO: List of broken channels: [] 14:19:49:ST3_smx:INFO: chip: 26-5 44.073563 C 1141.874115 mV 14:19:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:49:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:49:ST3_smx:INFO: Electrons 14:19:49:ST3_smx:INFO: # loops 0 14:19:50:ST3_smx:INFO: # loops 1 14:19:52:ST3_smx:INFO: # loops 2 14:19:53:ST3_smx:INFO: Total # of broken channels: 0 14:19:53:ST3_smx:INFO: List of broken channels: [] 14:19:53:ST3_smx:INFO: Total # of broken channels: 0 14:19:53:ST3_smx:INFO: List of broken channels: [] 14:19:55:ST3_smx:INFO: chip: 24-7 37.726682 C 1171.483840 mV 14:19:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:55:ST3_discr_histo:WARNING: Not enough entries for fit!!! 14:19:55:ST3_smx:INFO: Electrons 14:19:55:ST3_smx:INFO: # loops 0 14:19:57:ST3_smx:INFO: # loops 1 14:19:58:ST3_smx:INFO: # loops 2 14:20:00:ST3_smx:INFO: Total # of broken channels: 0 14:20:00:ST3_smx:INFO: List of broken channels: [] 14:20:00:ST3_smx:INFO: Total # of broken channels: 0 14:20:00:ST3_smx:INFO: List of broken channels: [] 14:20:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_ 14:20:00:febtest:INFO: 30-01 | XA-000-09-004-002-010-009-02 | 34.6 | 1195.1 14:20:00:febtest:INFO: 28-03 | XA-000-09-004-002-010-005-02 | 47.3 | 1147.8 14:20:01:febtest:INFO: 26-05 | XA-000-09-004-002-010-008-02 | 44.1 | 1165.6 14:20:01:febtest:INFO: 24-07 | XA-000-09-004-002-007-009-05 | 37.7 | 1189.2 ############################################################ # S U M M A R Y # ############################################################ {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== {'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31} =============================== ############################################################ # S U M M A R Y # ############################################################ TEST_NAME : FEB-Microcable TEST_DATE : 25_01_17-14_19_15 OPERATOR : Henrik; SITE : KIT | SETUP : KIT_TEST_SETUP_1 ------------------------------------------------------------ | FEB_SN : 4106| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B ------------------------------------------------------------ ------------------------------------------------------------ VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7443', '1.850', '0.8672'] VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0000', '1.850', '1.3250'] VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9943', '1.850', '0.2689']