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FEB_4107 16.01.25 10:31:46
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10:31:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:31:46:ST3_Shared:INFO: FEB-Microcable
10:31:46:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:31:46:febtest:INFO: Testing FEB with SN 4107
10:31:48:smx_tester:INFO: Scanning setup
10:31:48:elinks:INFO: Disabling clock on downlink 0
10:31:48:elinks:INFO: Disabling clock on downlink 1
10:31:48:elinks:INFO: Disabling clock on downlink 2
10:31:48:elinks:INFO: Disabling clock on downlink 3
10:31:48:elinks:INFO: Disabling clock on downlink 4
10:31:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:31:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:48:elinks:INFO: Disabling clock on downlink 0
10:31:48:elinks:INFO: Disabling clock on downlink 1
10:31:48:elinks:INFO: Disabling clock on downlink 2
10:31:48:elinks:INFO: Disabling clock on downlink 3
10:31:48:elinks:INFO: Disabling clock on downlink 4
10:31:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:31:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:48:elinks:INFO: Disabling clock on downlink 0
10:31:48:elinks:INFO: Disabling clock on downlink 1
10:31:48:elinks:INFO: Disabling clock on downlink 2
10:31:48:elinks:INFO: Disabling clock on downlink 3
10:31:48:elinks:INFO: Disabling clock on downlink 4
10:31:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:31:48:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:31:48:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:48:elinks:INFO: Disabling clock on downlink 0
10:31:48:elinks:INFO: Disabling clock on downlink 1
10:31:48:elinks:INFO: Disabling clock on downlink 2
10:31:48:elinks:INFO: Disabling clock on downlink 3
10:31:48:elinks:INFO: Disabling clock on downlink 4
10:31:48:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:48:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:31:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:49:elinks:INFO: Disabling clock on downlink 0
10:31:49:elinks:INFO: Disabling clock on downlink 1
10:31:49:elinks:INFO: Disabling clock on downlink 2
10:31:49:elinks:INFO: Disabling clock on downlink 3
10:31:49:elinks:INFO: Disabling clock on downlink 4
10:31:49:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:31:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:31:49:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:31:49:setup_element:INFO: Scanning clock phase
10:31:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:31:49:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:31:49:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:31:49:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:31:49:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:31:49:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:31:49:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:31:49:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXX______
Clock Delay: 31
10:31:49:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:31:49:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXX_____
Clock Delay: 32
10:31:49:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
10:31:49:setup_element:INFO: Scanning data phases
10:31:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:31:54:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:31:54:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
10:31:54:setup_element:INFO: Eye window for uplink 25: ___________XXXX_________________________
Data delay found: 32
10:31:54:setup_element:INFO: Eye window for uplink 26: _______XXXXXX___________________________
Data delay found: 29
10:31:54:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXX______________________
Data delay found: 34
10:31:54:setup_element:INFO: Eye window for uplink 28: _________XXXXXX_________________________
Data delay found: 31
10:31:54:setup_element:INFO: Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
10:31:54:setup_element:INFO: Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
10:31:54:setup_element:INFO: Eye window for uplink 31: _______________XXXX_____________________
Data delay found: 36
10:31:54:setup_element:INFO: Setting the data phase to 30 for uplink 24
10:31:54:setup_element:INFO: Setting the data phase to 32 for uplink 25
10:31:54:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:31:54:setup_element:INFO: Setting the data phase to 34 for uplink 27
10:31:54:setup_element:INFO: Setting the data phase to 31 for uplink 28
10:31:54:setup_element:INFO: Setting the data phase to 34 for uplink 29
10:31:54:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:31:54:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:31:54:setup_element:INFO: Beginning SMX ASICs map scan
10:31:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:31:54:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:31:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:31:54:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:31:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:31:54:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:31:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:31:55:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:31:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:31:55:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:31:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:31:55:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:31:57:setup_element:INFO: Performing Elink synchronization
10:31:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:31:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:31:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:31:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:31:57:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:31:57:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:31:57:febtest:INFO: Init all SMX (CSA): 30
10:32:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:05:febtest:INFO: 30-01 | XA-000-09-004-002-008-013-01 | 37.7 | 1153.7
10:32:05:febtest:INFO: 28-03 | XA-000-09-004-002-011-015-15 | 44.1 | 1124.0
10:32:05:febtest:INFO: 26-05 | XA-000-09-004-002-002-012-14 | 31.4 | 1171.5
10:32:05:febtest:INFO: 24-07 | XA-000-09-004-002-005-013-06 | 34.6 | 1159.7
10:32:06:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:32:08:ST3_smx:INFO: chip: 30-1 37.726682 C 1165.571835 mV
10:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:08:ST3_smx:INFO: Electrons
10:32:08:ST3_smx:INFO: # loops 0
10:32:10:ST3_smx:INFO: # loops 1
10:32:12:ST3_smx:INFO: # loops 2
10:32:13:ST3_smx:INFO: Total # of broken channels: 0
10:32:13:ST3_smx:INFO: List of broken channels: []
10:32:13:ST3_smx:INFO: Total # of broken channels: 0
10:32:13:ST3_smx:INFO: List of broken channels: []
10:32:15:ST3_smx:INFO: chip: 28-3 44.073563 C 1129.995435 mV
10:32:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:15:ST3_smx:INFO: Electrons
10:32:15:ST3_smx:INFO: # loops 0
10:32:17:ST3_smx:INFO: # loops 1
10:32:19:ST3_smx:INFO: # loops 2
10:32:20:ST3_smx:INFO: Total # of broken channels: 0
10:32:20:ST3_smx:INFO: List of broken channels: []
10:32:20:ST3_smx:INFO: Total # of broken channels: 0
10:32:20:ST3_smx:INFO: List of broken channels: []
10:32:22:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
10:32:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:22:ST3_smx:INFO: Electrons
10:32:22:ST3_smx:INFO: # loops 0
10:32:23:ST3_smx:INFO: # loops 1
10:32:25:ST3_smx:INFO: # loops 2
10:32:26:ST3_smx:INFO: Total # of broken channels: 0
10:32:26:ST3_smx:INFO: List of broken channels: []
10:32:26:ST3_smx:INFO: Total # of broken channels: 0
10:32:26:ST3_smx:INFO: List of broken channels: []
10:32:28:ST3_smx:INFO: chip: 24-7 34.556970 C 1171.483840 mV
10:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:32:28:ST3_smx:INFO: Electrons
10:32:28:ST3_smx:INFO: # loops 0
10:32:30:ST3_smx:INFO: # loops 1
10:32:31:ST3_smx:INFO: # loops 2
10:32:33:ST3_smx:INFO: Total # of broken channels: 0
10:32:33:ST3_smx:INFO: List of broken channels: []
10:32:33:ST3_smx:INFO: Total # of broken channels: 0
10:32:33:ST3_smx:INFO: List of broken channels: []
10:32:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:32:33:febtest:INFO: 30-01 | XA-000-09-004-002-008-013-01 | 37.7 | 1195.1
10:32:33:febtest:INFO: 28-03 | XA-000-09-004-002-011-015-15 | 44.1 | 1153.7
10:32:34:febtest:INFO: 26-05 | XA-000-09-004-002-002-012-14 | 34.6 | 1201.0
10:32:34:febtest:INFO: 24-07 | XA-000-09-004-002-005-013-06 | 34.6 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_16-10_31_46
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4107| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.7416', '1.850', '1.1630']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0150', '1.850', '1.3150']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9875', '1.850', '0.2667']