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FEB_4109 28.01.25 11:04:06
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11:04:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:06:ST3_Shared:INFO: FEB-Microcable
11:04:06:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:04:06:febtest:INFO: Testing FEB with SN 4109
11:04:08:smx_tester:INFO: Scanning setup
11:04:08:elinks:INFO: Disabling clock on downlink 0
11:04:08:elinks:INFO: Disabling clock on downlink 1
11:04:08:elinks:INFO: Disabling clock on downlink 2
11:04:08:elinks:INFO: Disabling clock on downlink 3
11:04:08:elinks:INFO: Disabling clock on downlink 4
11:04:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:04:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:08:elinks:INFO: Disabling clock on downlink 0
11:04:08:elinks:INFO: Disabling clock on downlink 1
11:04:08:elinks:INFO: Disabling clock on downlink 2
11:04:08:elinks:INFO: Disabling clock on downlink 3
11:04:08:elinks:INFO: Disabling clock on downlink 4
11:04:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:04:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:08:elinks:INFO: Disabling clock on downlink 0
11:04:08:elinks:INFO: Disabling clock on downlink 1
11:04:08:elinks:INFO: Disabling clock on downlink 2
11:04:08:elinks:INFO: Disabling clock on downlink 3
11:04:08:elinks:INFO: Disabling clock on downlink 4
11:04:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:04:08:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:04:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:08:elinks:INFO: Disabling clock on downlink 0
11:04:08:elinks:INFO: Disabling clock on downlink 1
11:04:08:elinks:INFO: Disabling clock on downlink 2
11:04:08:elinks:INFO: Disabling clock on downlink 3
11:04:08:elinks:INFO: Disabling clock on downlink 4
11:04:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:04:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:09:elinks:INFO: Disabling clock on downlink 0
11:04:09:elinks:INFO: Disabling clock on downlink 1
11:04:09:elinks:INFO: Disabling clock on downlink 2
11:04:09:elinks:INFO: Disabling clock on downlink 3
11:04:09:elinks:INFO: Disabling clock on downlink 4
11:04:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:04:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:04:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:04:09:setup_element:INFO: Scanning clock phase
11:04:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:09:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:04:09:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:04:09:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:04:09:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:04:09:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:04:09:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
11:04:09:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
11:04:09:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:04:09:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:04:09:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
11:04:09:setup_element:INFO: Scanning data phases
11:04:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:14:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:04:14:setup_element:INFO: Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
11:04:14:setup_element:INFO: Eye window for uplink 25: _______XXXXX____________________________
Data delay found: 29
11:04:14:setup_element:INFO: Eye window for uplink 26: ______XXXXXXX___________________________
Data delay found: 29
11:04:14:setup_element:INFO: Eye window for uplink 27: __________XXXXXXXX______________________
Data delay found: 33
11:04:14:setup_element:INFO: Eye window for uplink 28: ________XXXXX___________________________
Data delay found: 30
11:04:14:setup_element:INFO: Eye window for uplink 29: __________XXXXX_________________________
Data delay found: 32
11:04:14:setup_element:INFO: Eye window for uplink 30: ___________XXXXXXX______________________
Data delay found: 34
11:04:14:setup_element:INFO: Eye window for uplink 31: ____________XXXXX_______________________
Data delay found: 34
11:04:14:setup_element:INFO: Setting the data phase to 27 for uplink 24
11:04:14:setup_element:INFO: Setting the data phase to 29 for uplink 25
11:04:14:setup_element:INFO: Setting the data phase to 29 for uplink 26
11:04:14:setup_element:INFO: Setting the data phase to 33 for uplink 27
11:04:14:setup_element:INFO: Setting the data phase to 30 for uplink 28
11:04:14:setup_element:INFO: Setting the data phase to 32 for uplink 29
11:04:14:setup_element:INFO: Setting the data phase to 34 for uplink 30
11:04:14:setup_element:INFO: Setting the data phase to 34 for uplink 31
11:04:14:setup_element:INFO: Beginning SMX ASICs map scan
11:04:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:14:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:14:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:04:14:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
11:04:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:04:14:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:04:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:04:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:04:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:04:15:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:04:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:04:15:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:04:17:setup_element:INFO: Performing Elink synchronization
11:04:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:04:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:04:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:04:17:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:04:17:febtest:INFO: Init all SMX (CSA): 30
11:04:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:04:27:febtest:INFO: 30-01 | XA-000-09-004-002-008-016-06 | 37.7 | 1177.4
11:04:27:febtest:INFO: 28-03 | XA-000-09-004-002-008-018-06 | 28.2 | 1201.0
11:04:27:febtest:INFO: 26-05 | XA-000-09-004-002-002-016-09 | 50.4 | 1130.0
11:04:27:febtest:INFO: 24-07 | XA-000-09-004-002-011-016-08 | 34.6 | 1183.3
11:04:28:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:04:30:ST3_smx:INFO: chip: 30-1 37.726682 C 1189.190035 mV
11:04:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:30:ST3_smx:INFO: Electrons
11:04:30:ST3_smx:INFO: # loops 0
11:04:32:ST3_smx:INFO: # loops 1
11:04:34:ST3_smx:INFO: # loops 2
11:04:36:ST3_smx:INFO: Total # of broken channels: 0
11:04:36:ST3_smx:INFO: List of broken channels: []
11:04:36:ST3_smx:INFO: Total # of broken channels: 0
11:04:36:ST3_smx:INFO: List of broken channels: []
11:04:38:ST3_smx:INFO: chip: 28-3 28.225000 C 1212.728715 mV
11:04:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:38:ST3_smx:INFO: Electrons
11:04:38:ST3_smx:INFO: # loops 0
11:04:39:ST3_smx:INFO: # loops 1
11:04:41:ST3_smx:INFO: # loops 2
11:04:42:ST3_smx:INFO: Total # of broken channels: 0
11:04:42:ST3_smx:INFO: List of broken channels: []
11:04:42:ST3_smx:INFO: Total # of broken channels: 0
11:04:42:ST3_smx:INFO: List of broken channels: []
11:04:44:ST3_smx:INFO: chip: 26-5 50.430383 C 1141.874115 mV
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:44:ST3_smx:INFO: Electrons
11:04:44:ST3_smx:INFO: # loops 0
11:04:45:ST3_smx:INFO: # loops 1
11:04:47:ST3_smx:INFO: # loops 2
11:04:48:ST3_smx:INFO: Total # of broken channels: 0
11:04:48:ST3_smx:INFO: List of broken channels: []
11:04:48:ST3_smx:INFO: Total # of broken channels: 0
11:04:48:ST3_smx:INFO: List of broken channels: []
11:04:50:ST3_smx:INFO: chip: 24-7 37.726682 C 1189.190035 mV
11:04:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:04:50:ST3_smx:INFO: Electrons
11:04:50:ST3_smx:INFO: # loops 0
11:04:52:ST3_smx:INFO: # loops 1
11:04:54:ST3_smx:INFO: # loops 2
11:04:56:ST3_smx:INFO: Total # of broken channels: 0
11:04:56:ST3_smx:INFO: List of broken channels: []
11:04:56:ST3_smx:INFO: Total # of broken channels: 0
11:04:56:ST3_smx:INFO: List of broken channels: []
11:04:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:04:56:febtest:INFO: 30-01 | XA-000-09-004-002-008-016-06 | 37.7 | 1224.5
11:04:56:febtest:INFO: 28-03 | XA-000-09-004-002-008-018-06 | 28.2 | 1236.2
11:04:56:febtest:INFO: 26-05 | XA-000-09-004-002-002-016-09 | 50.4 | 1159.7
11:04:57:febtest:INFO: 24-07 | XA-000-09-004-002-011-016-08 | 37.7 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_28-11_04_06
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4109| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '0.7249', '1.850', '1.1930']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9982', '1.850', '1.2550']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9831', '1.850', '0.2664']