DTL-STS tests database

FEB_4109 17.02.25 15:25:33

link: XA-000-09-004-002-002-017-09
...SMX_0.root
link: XA-000-09-004-002-002-015-14
...SMX_2.root
link: XA-000-09-004-002-011-017-08
...SMX_4.root
link: XA-000-09-004-002-002-018-09
...SMX_6.root
link: XA-000-09-004-002-008-016-06
...SMX_1.root
link: XA-000-09-004-002-008-018-06
...SMX_3.root
link: XA-000-09-004-002-002-016-09
...SMX_5.root
link: XA-000-09-004-002-011-016-08
...SMX_7.root
link: XA-000-09-004-002-011-016-08
...VddmCSAstatus.root
TextEdit.txt
            15:25:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:25:33:ST3_Shared:INFO:	                         FEB-Sensor                         
15:25:33:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:25:49:ST3_ModuleSelector:INFO:	L5UR401117 M5UR4B3011173B2 124 D

15:25:49:ST3_ModuleSelector:INFO:	19224

15:25:49:febtest:INFO:	Testing FEB with SN 4109
15:25:50:smx_tester:INFO:	Scanning setup
15:25:50:elinks:INFO:	Disabling clock on downlink 0
15:25:50:elinks:INFO:	Disabling clock on downlink 1
15:25:50:elinks:INFO:	Disabling clock on downlink 2
15:25:50:elinks:INFO:	Disabling clock on downlink 3
15:25:50:elinks:INFO:	Disabling clock on downlink 4
15:25:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:25:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:50:elinks:INFO:	Disabling clock on downlink 0
15:25:50:elinks:INFO:	Disabling clock on downlink 1
15:25:50:elinks:INFO:	Disabling clock on downlink 2
15:25:50:elinks:INFO:	Disabling clock on downlink 3
15:25:50:elinks:INFO:	Disabling clock on downlink 4
15:25:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:25:50:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:50:elinks:INFO:	Disabling clock on downlink 0
15:25:50:elinks:INFO:	Disabling clock on downlink 1
15:25:50:elinks:INFO:	Disabling clock on downlink 2
15:25:50:elinks:INFO:	Disabling clock on downlink 3
15:25:50:elinks:INFO:	Disabling clock on downlink 4
15:25:50:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:50:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
15:25:51:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
15:25:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:51:elinks:INFO:	Disabling clock on downlink 0
15:25:51:elinks:INFO:	Disabling clock on downlink 1
15:25:51:elinks:INFO:	Disabling clock on downlink 2
15:25:51:elinks:INFO:	Disabling clock on downlink 3
15:25:51:elinks:INFO:	Disabling clock on downlink 4
15:25:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:25:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:51:elinks:INFO:	Disabling clock on downlink 0
15:25:51:elinks:INFO:	Disabling clock on downlink 1
15:25:51:elinks:INFO:	Disabling clock on downlink 2
15:25:51:elinks:INFO:	Disabling clock on downlink 3
15:25:51:elinks:INFO:	Disabling clock on downlink 4
15:25:51:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:25:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:25:51:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:25:51:setup_element:INFO:	Scanning clock phase
15:25:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:51:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
15:25:51:setup_element:INFO:	Eye window for uplink 16: _________________________________________________________________________XXXX___
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 17: _________________________________________________________________________XXXX___
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
15:25:51:setup_element:INFO:	Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
15:25:51:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:25:51:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:25:51:setup_element:INFO:	Eye window for uplink 26: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 27: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:25:51:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:25:51:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:25:51:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
15:25:51:setup_element:INFO:	Scanning data phases
15:25:51:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:51:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:56:setup_element:INFO:	Data phase scan results for group 0, downlink 2
15:25:56:setup_element:INFO:	Eye window for uplink 16: XX_________________________________XXXXX
Data delay found: 18
15:25:56:setup_element:INFO:	Eye window for uplink 17: __________________________________XXXX__
Data delay found: 15
15:25:56:setup_element:INFO:	Eye window for uplink 18: ___________________________________XXXXX
Data delay found: 17
15:25:56:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
15:25:56:setup_element:INFO:	Eye window for uplink 20: _________________________________XXXXX__
Data delay found: 15
15:25:56:setup_element:INFO:	Eye window for uplink 21: _________________________________XXXXX__
Data delay found: 15
15:25:56:setup_element:INFO:	Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
15:25:56:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
15:25:57:setup_element:INFO:	Eye window for uplink 24: _____XXXXX______________________________
Data delay found: 27
15:25:57:setup_element:INFO:	Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
15:25:57:setup_element:INFO:	Eye window for uplink 26: ________XXXXXX__________________________
Data delay found: 30
15:25:57:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
15:25:57:setup_element:INFO:	Eye window for uplink 28: __________XXXXX_________________________
Data delay found: 32
15:25:57:setup_element:INFO:	Eye window for uplink 29: ____________XXXXX_______________________
Data delay found: 34
15:25:57:setup_element:INFO:	Eye window for uplink 30: ______________XXXXXX____________________
Data delay found: 36
15:25:57:setup_element:INFO:	Eye window for uplink 31: _______________XXXX_____________________
Data delay found: 36
15:25:57:setup_element:INFO:	Setting the data phase to 18 for uplink 16
15:25:57:setup_element:INFO:	Setting the data phase to 15 for uplink 17
15:25:57:setup_element:INFO:	Setting the data phase to 17 for uplink 18
15:25:57:setup_element:INFO:	Setting the data phase to 15 for uplink 19
15:25:57:setup_element:INFO:	Setting the data phase to 15 for uplink 20
15:25:57:setup_element:INFO:	Setting the data phase to 15 for uplink 21
15:25:57:setup_element:INFO:	Setting the data phase to 19 for uplink 22
15:25:57:setup_element:INFO:	Setting the data phase to 15 for uplink 23
15:25:57:setup_element:INFO:	Setting the data phase to 27 for uplink 24
15:25:57:setup_element:INFO:	Setting the data phase to 30 for uplink 25
15:25:57:setup_element:INFO:	Setting the data phase to 30 for uplink 26
15:25:57:setup_element:INFO:	Setting the data phase to 34 for uplink 27
15:25:57:setup_element:INFO:	Setting the data phase to 32 for uplink 28
15:25:57:setup_element:INFO:	Setting the data phase to 34 for uplink 29
15:25:57:setup_element:INFO:	Setting the data phase to 36 for uplink 30
15:25:57:setup_element:INFO:	Setting the data phase to 36 for uplink 31
15:25:57:setup_element:INFO:	Beginning SMX ASICs map scan
15:25:57:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:57:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:57:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:25:57:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:25:57:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:25:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:25:57:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:25:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:25:57:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:25:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:25:57:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:25:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:25:57:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:25:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:25:57:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:25:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:25:58:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:25:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:25:58:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:25:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:25:58:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:25:59:setup_element:INFO:	Performing Elink synchronization
15:25:59:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:25:59:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:25:59:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:25:59:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:25:59:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
15:25:59:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:26:00:febtest:INFO:	Init all SMX (CSA): 30
15:26:19:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:26:19:febtest:INFO:	23-00 | XA-000-09-004-002-002-017-09 |  37.7 | 1165.6
15:26:19:febtest:INFO:	30-01 | XA-000-09-004-002-008-016-06 |  37.7 | 1177.4
15:26:20:febtest:INFO:	21-02 | XA-000-09-004-002-002-015-14 |  34.6 | 1183.3
15:26:20:febtest:INFO:	28-03 | XA-000-09-004-002-008-018-06 |  31.4 | 1201.0
15:26:20:febtest:INFO:	19-04 | XA-000-09-004-002-011-017-08 |  40.9 | 1159.7
15:26:20:febtest:INFO:	26-05 | XA-000-09-004-002-002-016-09 |  53.6 | 1130.0
15:26:20:febtest:INFO:	17-06 | XA-000-09-004-002-002-018-09 |  47.3 | 1141.9
15:26:21:febtest:INFO:	24-07 | XA-000-09-004-002-011-016-08 |  37.7 | 1183.3
15:26:22:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:26:24:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1177.390875 mV
15:26:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:24:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:24:ST3_smx:INFO:		Electrons
15:26:24:ST3_smx:INFO:	# loops 0
15:26:26:ST3_smx:INFO:	# loops 1
15:26:28:ST3_smx:INFO:	# loops 2
15:26:30:ST3_smx:INFO:	Total # of broken channels: 0
15:26:30:ST3_smx:INFO:	List of broken channels: []
15:26:30:ST3_smx:INFO:	Total # of broken channels: 0
15:26:30:ST3_smx:INFO:	List of broken channels: []
15:26:32:ST3_smx:INFO:	chip: 30-1 	 40.898880 C 	 1195.082160 mV
15:26:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:32:ST3_smx:INFO:		Electrons
15:26:32:ST3_smx:INFO:	# loops 0
15:26:34:ST3_smx:INFO:	# loops 1
15:26:36:ST3_smx:INFO:	# loops 2
15:26:38:ST3_smx:INFO:	Total # of broken channels: 0
15:26:38:ST3_smx:INFO:	List of broken channels: []
15:26:38:ST3_smx:INFO:	Total # of broken channels: 0
15:26:38:ST3_smx:INFO:	List of broken channels: []
15:26:40:ST3_smx:INFO:	chip: 21-2 	 34.556970 C 	 1189.190035 mV
15:26:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:40:ST3_smx:INFO:		Electrons
15:26:40:ST3_smx:INFO:	# loops 0
15:26:42:ST3_smx:INFO:	# loops 1
15:26:44:ST3_smx:INFO:	# loops 2
15:26:46:ST3_smx:INFO:	Total # of broken channels: 0
15:26:46:ST3_smx:INFO:	List of broken channels: []
15:26:46:ST3_smx:INFO:	Total # of broken channels: 0
15:26:46:ST3_smx:INFO:	List of broken channels: []
15:26:48:ST3_smx:INFO:	chip: 28-3 	 31.389742 C 	 1212.728715 mV
15:26:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:48:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:48:ST3_smx:INFO:		Electrons
15:26:48:ST3_smx:INFO:	# loops 0
15:26:50:ST3_smx:INFO:	# loops 1
15:26:52:ST3_smx:INFO:	# loops 2
15:26:55:ST3_smx:INFO:	Total # of broken channels: 0
15:26:55:ST3_smx:INFO:	List of broken channels: []
15:26:55:ST3_smx:INFO:	Total # of broken channels: 0
15:26:55:ST3_smx:INFO:	List of broken channels: []
15:26:56:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1171.483840 mV
15:26:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:56:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:26:56:ST3_smx:INFO:		Electrons
15:26:56:ST3_smx:INFO:	# loops 0
15:26:58:ST3_smx:INFO:	# loops 1
15:27:00:ST3_smx:INFO:	# loops 2
15:27:02:ST3_smx:INFO:	Total # of broken channels: 0
15:27:02:ST3_smx:INFO:	List of broken channels: []
15:27:02:ST3_smx:INFO:	Total # of broken channels: 3
15:27:02:ST3_smx:INFO:	List of broken channels: [77, 79, 81]
15:27:04:ST3_smx:INFO:	chip: 26-5 	 53.612520 C 	 1135.937260 mV
15:27:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:04:ST3_smx:INFO:		Electrons
15:27:04:ST3_smx:INFO:	# loops 0
15:27:06:ST3_smx:INFO:	# loops 1
15:27:08:ST3_smx:INFO:	# loops 2
15:27:11:ST3_smx:INFO:	Total # of broken channels: 0
15:27:11:ST3_smx:INFO:	List of broken channels: []
15:27:11:ST3_smx:INFO:	Total # of broken channels: 0
15:27:11:ST3_smx:INFO:	List of broken channels: []
15:27:12:ST3_smx:INFO:	chip: 17-6 	 50.430383 C 	 1153.732915 mV
15:27:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:12:ST3_smx:INFO:		Electrons
15:27:12:ST3_smx:INFO:	# loops 0
15:27:14:ST3_smx:INFO:	# loops 1
15:27:17:ST3_smx:INFO:	# loops 2
15:27:19:ST3_smx:INFO:	Total # of broken channels: 0
15:27:19:ST3_smx:INFO:	List of broken channels: []
15:27:19:ST3_smx:INFO:	Total # of broken channels: 0
15:27:19:ST3_smx:INFO:	List of broken channels: []
15:27:20:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1200.969315 mV
15:27:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:27:20:ST3_smx:INFO:		Electrons
15:27:20:ST3_smx:INFO:	# loops 0
15:27:22:ST3_smx:INFO:	# loops 1
15:27:24:ST3_smx:INFO:	# loops 2
15:27:27:ST3_smx:INFO:	Total # of broken channels: 0
15:27:27:ST3_smx:INFO:	List of broken channels: []
15:27:27:ST3_smx:INFO:	Total # of broken channels: 6
15:27:27:ST3_smx:INFO:	List of broken channels: [39, 41, 43, 45, 47, 51]
15:27:27:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:27:27:febtest:INFO:	23-00 | XA-000-09-004-002-002-017-09 |  40.9 | 1189.2
15:27:27:febtest:INFO:	30-01 | XA-000-09-004-002-008-016-06 |  40.9 | 1236.2
15:27:28:febtest:INFO:	21-02 | XA-000-09-004-002-002-015-14 |  37.7 | 1212.7
15:27:28:febtest:INFO:	28-03 | XA-000-09-004-002-008-018-06 |  34.6 | 1236.2
15:27:28:febtest:INFO:	19-04 | XA-000-09-004-002-011-017-08 |  44.1 | 1195.1
15:27:28:febtest:INFO:	26-05 | XA-000-09-004-002-002-016-09 |  56.8 | 1159.7
15:27:29:febtest:INFO:	17-06 | XA-000-09-004-002-002-018-09 |  53.6 | 1171.5
15:27:29:febtest:INFO:	24-07 | XA-000-09-004-002-011-016-08 |  40.9 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 25_02_17-15_25_33
OPERATOR  : Henrik; 
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4109| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	19224

MODULE_NAME:	L5UR401117 M5UR4B3011173B2 124 D

MODULE_TYPE:	
MODULE_LADDER:	
MODULE_MODULE:	
MODULE_SIZE:	0
MODULE_GRADE:	
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.449', '1.8600', '1.850', '2.2850']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0100', '1.850', '2.5790']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9550', '1.850', '0.5231']
Comment.txt