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FEB_4110 28.01.25 10:56:12
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10:56:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:12:ST3_Shared:INFO: FEB-Microcable
10:56:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:12:febtest:INFO: Testing FEB with SN 4110
10:56:14:smx_tester:INFO: Scanning setup
10:56:14:elinks:INFO: Disabling clock on downlink 0
10:56:14:elinks:INFO: Disabling clock on downlink 1
10:56:14:elinks:INFO: Disabling clock on downlink 2
10:56:14:elinks:INFO: Disabling clock on downlink 3
10:56:14:elinks:INFO: Disabling clock on downlink 4
10:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:14:elinks:INFO: Disabling clock on downlink 0
10:56:14:elinks:INFO: Disabling clock on downlink 1
10:56:14:elinks:INFO: Disabling clock on downlink 2
10:56:14:elinks:INFO: Disabling clock on downlink 3
10:56:14:elinks:INFO: Disabling clock on downlink 4
10:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:14:elinks:INFO: Disabling clock on downlink 0
10:56:14:elinks:INFO: Disabling clock on downlink 1
10:56:14:elinks:INFO: Disabling clock on downlink 2
10:56:14:elinks:INFO: Disabling clock on downlink 3
10:56:14:elinks:INFO: Disabling clock on downlink 4
10:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:56:14:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:56:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:14:elinks:INFO: Disabling clock on downlink 0
10:56:14:elinks:INFO: Disabling clock on downlink 1
10:56:14:elinks:INFO: Disabling clock on downlink 2
10:56:14:elinks:INFO: Disabling clock on downlink 3
10:56:14:elinks:INFO: Disabling clock on downlink 4
10:56:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:56:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:15:elinks:INFO: Disabling clock on downlink 0
10:56:15:elinks:INFO: Disabling clock on downlink 1
10:56:15:elinks:INFO: Disabling clock on downlink 2
10:56:15:elinks:INFO: Disabling clock on downlink 3
10:56:15:elinks:INFO: Disabling clock on downlink 4
10:56:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:56:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:15:setup_element:INFO: Scanning clock phase
10:56:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:15:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:56:15:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:56:15:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
10:56:15:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:15:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:15:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:15:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:15:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:15:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:15:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:56:15:setup_element:INFO: Scanning data phases
10:56:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:20:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:56:20:setup_element:INFO: Eye window for uplink 24: ______XXXXXX____________________________
Data delay found: 28
10:56:20:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
10:56:20:setup_element:INFO: Eye window for uplink 26: _______XXXXX____________________________
Data delay found: 29
10:56:20:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_______________________
Data delay found: 33
10:56:20:setup_element:INFO: Eye window for uplink 28: ____________XXXX________________________
Data delay found: 33
10:56:20:setup_element:INFO: Eye window for uplink 29: ______________XXXX______________________
Data delay found: 35
10:56:20:setup_element:INFO: Eye window for uplink 30: _____________XXXXXX_____________________
Data delay found: 35
10:56:20:setup_element:INFO: Eye window for uplink 31: ______________XXXX______________________
Data delay found: 35
10:56:20:setup_element:INFO: Setting the data phase to 28 for uplink 24
10:56:20:setup_element:INFO: Setting the data phase to 31 for uplink 25
10:56:20:setup_element:INFO: Setting the data phase to 29 for uplink 26
10:56:20:setup_element:INFO: Setting the data phase to 33 for uplink 27
10:56:20:setup_element:INFO: Setting the data phase to 33 for uplink 28
10:56:20:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:56:20:setup_element:INFO: Setting the data phase to 35 for uplink 30
10:56:20:setup_element:INFO: Setting the data phase to 35 for uplink 31
10:56:20:setup_element:INFO: Beginning SMX ASICs map scan
10:56:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:56:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:56:20:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:56:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:56:20:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:56:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:56:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:56:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:56:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:56:21:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:56:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:56:23:setup_element:INFO: Performing Elink synchronization
10:56:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:56:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:56:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:56:23:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:56:23:febtest:INFO: Init all SMX (CSA): 30
10:56:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:56:33:febtest:INFO: 30-01 | XA-000-09-004-002-010-014-02 | 40.9 | 1147.8
10:56:33:febtest:INFO: 28-03 | XA-000-09-004-002-007-014-05 | 53.6 | 1118.1
10:56:34:febtest:INFO: 26-05 | XA-000-09-004-002-004-014-11 | 31.4 | 1183.3
10:56:34:febtest:INFO: 24-07 | XA-000-09-004-002-004-013-11 | 44.1 | 1141.9
10:56:35:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:56:37:ST3_smx:INFO: chip: 30-1 44.073563 C 1159.654860 mV
10:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:37:ST3_smx:INFO: Electrons
10:56:37:ST3_smx:INFO: # loops 0
10:56:39:ST3_smx:INFO: # loops 1
10:56:41:ST3_smx:INFO: # loops 2
10:56:43:ST3_smx:INFO: Total # of broken channels: 0
10:56:43:ST3_smx:INFO: List of broken channels: []
10:56:43:ST3_smx:INFO: Total # of broken channels: 0
10:56:43:ST3_smx:INFO: List of broken channels: []
10:56:45:ST3_smx:INFO: chip: 28-3 53.612520 C 1129.995435 mV
10:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:45:ST3_smx:INFO: Electrons
10:56:45:ST3_smx:INFO: # loops 0
10:56:48:ST3_smx:INFO: # loops 1
10:56:50:ST3_smx:INFO: # loops 2
10:56:52:ST3_smx:INFO: Total # of broken channels: 0
10:56:52:ST3_smx:INFO: List of broken channels: []
10:56:52:ST3_smx:INFO: Total # of broken channels: 0
10:56:52:ST3_smx:INFO: List of broken channels: []
10:56:54:ST3_smx:INFO: chip: 26-5 34.556970 C 1195.082160 mV
10:56:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:54:ST3_smx:INFO: Electrons
10:56:54:ST3_smx:INFO: # loops 0
10:56:56:ST3_smx:INFO: # loops 1
10:56:58:ST3_smx:INFO: # loops 2
10:57:00:ST3_smx:INFO: Total # of broken channels: 0
10:57:00:ST3_smx:INFO: List of broken channels: []
10:57:00:ST3_smx:INFO: Total # of broken channels: 0
10:57:00:ST3_smx:INFO: List of broken channels: []
10:57:02:ST3_smx:INFO: chip: 24-7 44.073563 C 1153.732915 mV
10:57:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:02:ST3_smx:INFO: Electrons
10:57:02:ST3_smx:INFO: # loops 0
10:57:04:ST3_smx:INFO: # loops 1
10:57:06:ST3_smx:INFO: # loops 2
10:57:08:ST3_smx:INFO: Total # of broken channels: 0
10:57:08:ST3_smx:INFO: List of broken channels: []
10:57:08:ST3_smx:INFO: Total # of broken channels: 0
10:57:08:ST3_smx:INFO: List of broken channels: []
10:57:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:57:09:febtest:INFO: 30-01 | XA-000-09-004-002-010-014-02 | 44.1 | 1183.3
10:57:09:febtest:INFO: 28-03 | XA-000-09-004-002-007-014-05 | 53.6 | 1153.7
10:57:09:febtest:INFO: 26-05 | XA-000-09-004-002-004-014-11 | 34.6 | 1212.7
10:57:09:febtest:INFO: 24-07 | XA-000-09-004-002-004-013-11 | 44.1 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_28-10_56_12
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4110| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.453', '0.8292', '1.850', '1.3840']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0070', '1.850', '1.3100']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9883', '1.850', '0.2687']