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FEB_4110 11.02.25 08:56:14
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08:56:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:14:ST3_Shared:INFO: FEB-Microcable
08:56:14:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:14:febtest:INFO: Testing FEB with SN 4110
08:56:16:smx_tester:INFO: Scanning setup
08:56:16:elinks:INFO: Disabling clock on downlink 0
08:56:16:elinks:INFO: Disabling clock on downlink 1
08:56:16:elinks:INFO: Disabling clock on downlink 2
08:56:16:elinks:INFO: Disabling clock on downlink 3
08:56:16:elinks:INFO: Disabling clock on downlink 4
08:56:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:16:elinks:INFO: Disabling clock on downlink 0
08:56:16:elinks:INFO: Disabling clock on downlink 1
08:56:16:elinks:INFO: Disabling clock on downlink 2
08:56:16:elinks:INFO: Disabling clock on downlink 3
08:56:16:elinks:INFO: Disabling clock on downlink 4
08:56:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:16:elinks:INFO: Disabling clock on downlink 0
08:56:16:elinks:INFO: Disabling clock on downlink 1
08:56:16:elinks:INFO: Disabling clock on downlink 2
08:56:16:elinks:INFO: Disabling clock on downlink 3
08:56:16:elinks:INFO: Disabling clock on downlink 4
08:56:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:56:16:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:56:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:16:elinks:INFO: Disabling clock on downlink 0
08:56:16:elinks:INFO: Disabling clock on downlink 1
08:56:16:elinks:INFO: Disabling clock on downlink 2
08:56:16:elinks:INFO: Disabling clock on downlink 3
08:56:16:elinks:INFO: Disabling clock on downlink 4
08:56:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:56:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:16:elinks:INFO: Disabling clock on downlink 0
08:56:16:elinks:INFO: Disabling clock on downlink 1
08:56:16:elinks:INFO: Disabling clock on downlink 2
08:56:16:elinks:INFO: Disabling clock on downlink 3
08:56:16:elinks:INFO: Disabling clock on downlink 4
08:56:16:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:56:16:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:16:setup_element:INFO: Scanning clock phase
08:56:16:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:16:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:17:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:56:17:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
08:56:17:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
08:56:17:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:56:17:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:17:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:56:17:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
08:56:17:setup_element:INFO: Scanning data phases
08:56:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:22:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:56:22:setup_element:INFO: Eye window for uplink 16: X____________________________________XXX
Data delay found: 18
08:56:22:setup_element:INFO: Eye window for uplink 17: __________________________________XXXXX_
Data delay found: 16
08:56:22:setup_element:INFO: Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
08:56:22:setup_element:INFO: Eye window for uplink 19: _______________________________XXXXX____
Data delay found: 13
08:56:22:setup_element:INFO: Eye window for uplink 20: _______________________________XXXX_____
Data delay found: 12
08:56:22:setup_element:INFO: Eye window for uplink 21: _______________________________XXXX_____
Data delay found: 12
08:56:22:setup_element:INFO: Eye window for uplink 22: _______________________________XXXXX____
Data delay found: 13
08:56:22:setup_element:INFO: Eye window for uplink 23: ___________________________XXXXX________
Data delay found: 9
08:56:22:setup_element:INFO: Eye window for uplink 24: _____XXXXXX_____________________________
Data delay found: 27
08:56:22:setup_element:INFO: Eye window for uplink 25: ________XXXXX___________________________
Data delay found: 30
08:56:22:setup_element:INFO: Eye window for uplink 26: ______XXXXXX____________________________
Data delay found: 28
08:56:22:setup_element:INFO: Eye window for uplink 27: __________XXXXXX________________________
Data delay found: 32
08:56:22:setup_element:INFO: Eye window for uplink 28: ____________XXXX________________________
Data delay found: 33
08:56:22:setup_element:INFO: Eye window for uplink 29: ______________XXXXX_____________________
Data delay found: 36
08:56:22:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
08:56:22:setup_element:INFO: Eye window for uplink 31: _______________XXX______________________
Data delay found: 36
08:56:22:setup_element:INFO: Setting the data phase to 18 for uplink 16
08:56:22:setup_element:INFO: Setting the data phase to 16 for uplink 17
08:56:22:setup_element:INFO: Setting the data phase to 15 for uplink 18
08:56:22:setup_element:INFO: Setting the data phase to 13 for uplink 19
08:56:22:setup_element:INFO: Setting the data phase to 12 for uplink 20
08:56:22:setup_element:INFO: Setting the data phase to 12 for uplink 21
08:56:22:setup_element:INFO: Setting the data phase to 13 for uplink 22
08:56:22:setup_element:INFO: Setting the data phase to 9 for uplink 23
08:56:22:setup_element:INFO: Setting the data phase to 27 for uplink 24
08:56:22:setup_element:INFO: Setting the data phase to 30 for uplink 25
08:56:22:setup_element:INFO: Setting the data phase to 28 for uplink 26
08:56:22:setup_element:INFO: Setting the data phase to 32 for uplink 27
08:56:22:setup_element:INFO: Setting the data phase to 33 for uplink 28
08:56:22:setup_element:INFO: Setting the data phase to 36 for uplink 29
08:56:22:setup_element:INFO: Setting the data phase to 36 for uplink 30
08:56:22:setup_element:INFO: Setting the data phase to 36 for uplink 31
08:56:22:setup_element:INFO: Beginning SMX ASICs map scan
08:56:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:56:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:56:22:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:56:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:56:22:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:56:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:56:22:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:56:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:56:22:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:56:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:56:22:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:56:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:56:23:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:56:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:56:23:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:56:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:56:23:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:56:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:56:23:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:56:24:setup_element:INFO: Performing Elink synchronization
08:56:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:25:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:56:25:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:56:25:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:56:25:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:56:25:febtest:INFO: Init all SMX (CSA): 30
08:56:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:56:41:febtest:INFO: 23-00 | XA-000-09-004-002-010-015-02 | 53.6 | 1106.2
08:56:41:febtest:INFO: 30-01 | XA-000-09-004-002-010-014-02 | 44.1 | 1153.7
08:56:41:febtest:INFO: 21-02 | XA-000-09-004-002-007-015-05 | 44.1 | 1147.8
08:56:42:febtest:INFO: 28-03 | XA-000-09-004-002-007-014-05 | 53.6 | 1118.1
08:56:42:febtest:INFO: 19-04 | XA-000-09-004-002-004-015-11 | 40.9 | 1153.7
08:56:42:febtest:INFO: 26-05 | XA-000-09-004-002-004-014-11 | 37.7 | 1183.3
08:56:42:febtest:INFO: 17-06 | XA-000-09-004-002-004-016-12 | 44.1 | 1165.6
08:56:42:febtest:INFO: 24-07 | XA-000-09-004-002-004-013-11 | 47.3 | 1135.9
08:56:43:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:56:45:ST3_smx:INFO: chip: 23-0 56.797143 C 1118.096875 mV
08:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:45:ST3_smx:INFO: Electrons
08:56:45:ST3_smx:INFO: # loops 0
08:56:47:ST3_smx:INFO: # loops 1
08:56:49:ST3_smx:INFO: # loops 2
08:56:51:ST3_smx:INFO: Total # of broken channels: 0
08:56:51:ST3_smx:INFO: List of broken channels: []
08:56:51:ST3_smx:INFO: Total # of broken channels: 0
08:56:51:ST3_smx:INFO: List of broken channels: []
08:56:52:ST3_smx:INFO: chip: 30-1 44.073563 C 1165.571835 mV
08:56:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:52:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:52:ST3_smx:INFO: Electrons
08:56:52:ST3_smx:INFO: # loops 0
08:56:54:ST3_smx:INFO: # loops 1
08:56:56:ST3_smx:INFO: # loops 2
08:56:58:ST3_smx:INFO: Total # of broken channels: 0
08:56:58:ST3_smx:INFO: List of broken channels: []
08:56:58:ST3_smx:INFO: Total # of broken channels: 0
08:56:58:ST3_smx:INFO: List of broken channels: []
08:56:59:ST3_smx:INFO: chip: 21-2 44.073563 C 1159.654860 mV
08:56:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:56:59:ST3_smx:INFO: Electrons
08:56:59:ST3_smx:INFO: # loops 0
08:57:01:ST3_smx:INFO: # loops 1
08:57:02:ST3_smx:INFO: # loops 2
08:57:04:ST3_smx:INFO: Total # of broken channels: 0
08:57:04:ST3_smx:INFO: List of broken channels: []
08:57:04:ST3_smx:INFO: Total # of broken channels: 0
08:57:04:ST3_smx:INFO: List of broken channels: []
08:57:06:ST3_smx:INFO: chip: 28-3 56.797143 C 1129.995435 mV
08:57:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:06:ST3_smx:INFO: Electrons
08:57:06:ST3_smx:INFO: # loops 0
08:57:07:ST3_smx:INFO: # loops 1
08:57:09:ST3_smx:INFO: # loops 2
08:57:11:ST3_smx:INFO: Total # of broken channels: 0
08:57:11:ST3_smx:INFO: List of broken channels: []
08:57:11:ST3_smx:INFO: Total # of broken channels: 0
08:57:11:ST3_smx:INFO: List of broken channels: []
08:57:12:ST3_smx:INFO: chip: 19-4 40.898880 C 1171.483840 mV
08:57:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:12:ST3_smx:INFO: Electrons
08:57:12:ST3_smx:INFO: # loops 0
08:57:14:ST3_smx:INFO: # loops 1
08:57:15:ST3_smx:INFO: # loops 2
08:57:17:ST3_smx:INFO: Total # of broken channels: 0
08:57:17:ST3_smx:INFO: List of broken channels: []
08:57:17:ST3_smx:INFO: Total # of broken channels: 0
08:57:17:ST3_smx:INFO: List of broken channels: []
08:57:18:ST3_smx:INFO: chip: 26-5 37.726682 C 1195.082160 mV
08:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:18:ST3_smx:INFO: Electrons
08:57:18:ST3_smx:INFO: # loops 0
08:57:20:ST3_smx:INFO: # loops 1
08:57:22:ST3_smx:INFO: # loops 2
08:57:24:ST3_smx:INFO: Total # of broken channels: 0
08:57:24:ST3_smx:INFO: List of broken channels: []
08:57:24:ST3_smx:INFO: Total # of broken channels: 0
08:57:24:ST3_smx:INFO: List of broken channels: []
08:57:26:ST3_smx:INFO: chip: 17-6 44.073563 C 1171.483840 mV
08:57:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:26:ST3_smx:INFO: Electrons
08:57:26:ST3_smx:INFO: # loops 0
08:57:27:ST3_smx:INFO: # loops 1
08:57:29:ST3_smx:INFO: # loops 2
08:57:31:ST3_smx:INFO: Total # of broken channels: 0
08:57:31:ST3_smx:INFO: List of broken channels: []
08:57:31:ST3_smx:INFO: Total # of broken channels: 0
08:57:31:ST3_smx:INFO: List of broken channels: []
08:57:32:ST3_smx:INFO: chip: 24-7 50.430383 C 1147.806000 mV
08:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:32:ST3_smx:INFO: Electrons
08:57:32:ST3_smx:INFO: # loops 0
08:57:34:ST3_smx:INFO: # loops 1
08:57:36:ST3_smx:INFO: # loops 2
08:57:38:ST3_smx:INFO: Total # of broken channels: 0
08:57:38:ST3_smx:INFO: List of broken channels: []
08:57:38:ST3_smx:INFO: Total # of broken channels: 0
08:57:38:ST3_smx:INFO: List of broken channels: []
08:57:38:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:38:febtest:INFO: 23-00 | XA-000-09-004-002-010-015-02 | 56.8 | 1141.9
08:57:39:febtest:INFO: 30-01 | XA-000-09-004-002-010-014-02 | 47.3 | 1189.2
08:57:39:febtest:INFO: 21-02 | XA-000-09-004-002-007-015-05 | 47.3 | 1183.3
08:57:39:febtest:INFO: 28-03 | XA-000-09-004-002-007-014-05 | 56.8 | 1153.7
08:57:39:febtest:INFO: 19-04 | XA-000-09-004-002-004-015-11 | 44.1 | 1189.2
08:57:39:febtest:INFO: 26-05 | XA-000-09-004-002-004-014-11 | 40.9 | 1212.7
08:57:40:febtest:INFO: 17-06 | XA-000-09-004-002-004-016-12 | 47.3 | 1195.1
08:57:40:febtest:INFO: 24-07 | XA-000-09-004-002-004-013-11 | 50.4 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_02_11-08_56_14
OPERATOR : Henrik;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4110| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.452', '1.6180', '1.850', '2.7940']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0150', '1.850', '2.5050']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9720', '1.850', '0.5288']