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FEB_4113 31.01.25 08:39:41
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08:39:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:39:41:ST3_Shared:INFO: FEB-Microcable
08:39:41:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:39:41:febtest:INFO: Testing FEB with SN 4113
08:39:43:smx_tester:INFO: Scanning setup
08:39:43:elinks:INFO: Disabling clock on downlink 0
08:39:43:elinks:INFO: Disabling clock on downlink 1
08:39:43:elinks:INFO: Disabling clock on downlink 2
08:39:43:elinks:INFO: Disabling clock on downlink 3
08:39:43:elinks:INFO: Disabling clock on downlink 4
08:39:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:39:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:43:elinks:INFO: Disabling clock on downlink 0
08:39:43:elinks:INFO: Disabling clock on downlink 1
08:39:43:elinks:INFO: Disabling clock on downlink 2
08:39:43:elinks:INFO: Disabling clock on downlink 3
08:39:43:elinks:INFO: Disabling clock on downlink 4
08:39:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:39:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:43:elinks:INFO: Disabling clock on downlink 0
08:39:43:elinks:INFO: Disabling clock on downlink 1
08:39:43:elinks:INFO: Disabling clock on downlink 2
08:39:43:elinks:INFO: Disabling clock on downlink 3
08:39:43:elinks:INFO: Disabling clock on downlink 4
08:39:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:39:43:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:39:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:43:elinks:INFO: Disabling clock on downlink 0
08:39:43:elinks:INFO: Disabling clock on downlink 1
08:39:43:elinks:INFO: Disabling clock on downlink 2
08:39:43:elinks:INFO: Disabling clock on downlink 3
08:39:43:elinks:INFO: Disabling clock on downlink 4
08:39:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:39:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:43:elinks:INFO: Disabling clock on downlink 0
08:39:43:elinks:INFO: Disabling clock on downlink 1
08:39:43:elinks:INFO: Disabling clock on downlink 2
08:39:43:elinks:INFO: Disabling clock on downlink 3
08:39:43:elinks:INFO: Disabling clock on downlink 4
08:39:43:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:39:43:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:39:43:setup_element:INFO: Scanning clock phase
08:39:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:39:44:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:39:44:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:39:44:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:39:44:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:39:44:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:39:44:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:39:44:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:39:44:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXX_____
Clock Delay: 32
08:39:44:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXX_____
Clock Delay: 32
08:39:44:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
08:39:44:setup_element:INFO: Scanning data phases
08:39:44:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:44:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:39:49:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:39:49:setup_element:INFO: Eye window for uplink 24: _______XXXXX____________________________
Data delay found: 29
08:39:49:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
08:39:49:setup_element:INFO: Eye window for uplink 26: ____XXXXX_______________________________
Data delay found: 26
08:39:49:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
08:39:49:setup_element:INFO: Eye window for uplink 28: ___________XXXXXXX______________________
Data delay found: 34
08:39:49:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXX___________________
Data delay found: 37
08:39:49:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
08:39:49:setup_element:INFO: Eye window for uplink 31: _______________XXXX_X___________________
Data delay found: 37
08:39:49:setup_element:INFO: Setting the data phase to 29 for uplink 24
08:39:49:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:39:49:setup_element:INFO: Setting the data phase to 26 for uplink 26
08:39:49:setup_element:INFO: Setting the data phase to 30 for uplink 27
08:39:49:setup_element:INFO: Setting the data phase to 34 for uplink 28
08:39:49:setup_element:INFO: Setting the data phase to 37 for uplink 29
08:39:49:setup_element:INFO: Setting the data phase to 37 for uplink 30
08:39:49:setup_element:INFO: Setting the data phase to 37 for uplink 31
08:39:49:setup_element:INFO: Beginning SMX ASICs map scan
08:39:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:39:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:39:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:39:49:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:39:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:39:49:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:39:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:39:49:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:39:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:39:50:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:39:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:39:50:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:39:51:setup_element:INFO: Performing Elink synchronization
08:39:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:39:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:39:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:39:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:39:51:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:39:51:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:39:52:febtest:INFO: Init all SMX (CSA): 30
08:39:59:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:39:59:febtest:INFO: 30-01 | XA-000-09-004-005-007-013-15 | 47.3 | 1135.9
08:39:59:febtest:INFO: 28-03 | XA-000-09-004-005-010-014-08 | 40.9 | 1153.7
08:40:00:febtest:INFO: 26-05 | XA-000-09-004-005-010-012-08 | 40.9 | 1153.7
08:40:00:febtest:INFO: 24-07 | XA-000-09-004-005-004-013-01 | 37.7 | 1159.7
08:40:01:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:40:03:ST3_smx:INFO: chip: 30-1 47.250730 C 1147.806000 mV
08:40:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:03:ST3_smx:INFO: Electrons
08:40:03:ST3_smx:INFO: # loops 0
08:40:04:ST3_smx:INFO: # loops 1
08:40:06:ST3_smx:INFO: # loops 2
08:40:08:ST3_smx:INFO: Total # of broken channels: 0
08:40:08:ST3_smx:INFO: List of broken channels: []
08:40:08:ST3_smx:INFO: Total # of broken channels: 0
08:40:08:ST3_smx:INFO: List of broken channels: []
08:40:09:ST3_smx:INFO: chip: 28-3 44.073563 C 1165.571835 mV
08:40:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:09:ST3_smx:INFO: Electrons
08:40:09:ST3_smx:INFO: # loops 0
08:40:11:ST3_smx:INFO: # loops 1
08:40:13:ST3_smx:INFO: # loops 2
08:40:14:ST3_smx:INFO: Total # of broken channels: 0
08:40:14:ST3_smx:INFO: List of broken channels: []
08:40:14:ST3_smx:INFO: Total # of broken channels: 0
08:40:14:ST3_smx:INFO: List of broken channels: []
08:40:16:ST3_smx:INFO: chip: 26-5 44.073563 C 1165.571835 mV
08:40:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:16:ST3_smx:INFO: Electrons
08:40:16:ST3_smx:INFO: # loops 0
08:40:17:ST3_smx:INFO: # loops 1
08:40:19:ST3_smx:INFO: # loops 2
08:40:20:ST3_smx:INFO: Total # of broken channels: 0
08:40:20:ST3_smx:INFO: List of broken channels: []
08:40:20:ST3_smx:INFO: Total # of broken channels: 0
08:40:20:ST3_smx:INFO: List of broken channels: []
08:40:22:ST3_smx:INFO: chip: 24-7 44.073563 C 1165.571835 mV
08:40:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:40:22:ST3_smx:INFO: Electrons
08:40:22:ST3_smx:INFO: # loops 0
08:40:24:ST3_smx:INFO: # loops 1
08:40:25:ST3_smx:INFO: # loops 2
08:40:27:ST3_smx:INFO: Total # of broken channels: 0
08:40:27:ST3_smx:INFO: List of broken channels: []
08:40:27:ST3_smx:INFO: Total # of broken channels: 0
08:40:27:ST3_smx:INFO: List of broken channels: []
08:40:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:40:27:febtest:INFO: 30-01 | XA-000-09-004-005-007-013-15 | 50.4 | 1171.5
08:40:28:febtest:INFO: 28-03 | XA-000-09-004-005-010-014-08 | 44.1 | 1189.2
08:40:28:febtest:INFO: 26-05 | XA-000-09-004-005-010-012-08 | 47.3 | 1183.3
08:40:28:febtest:INFO: 24-07 | XA-000-09-004-005-004-013-01 | 44.1 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_01_31-08_39_41
OPERATOR : Benjamin;
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4113| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8050', '1.850', '1.4860']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9640', '1.850', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9880', '1.850', '0.2674']